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1# SPDX-License-Identifier: GPL-2.02#3# Makefile for the drm device driver. This driver provides support for the4# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.5 6# Enable W=1 warnings not enabled in drm subsystem Makefile7subdir-ccflags-y += $(call cc-option, -Wformat-truncation)8 9# Enable -Werror in CI and development10subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror11 12# Support compiling the display code separately for both i915 and xe13# drivers. Define I915 when building i915.14subdir-ccflags-y += -DI91515 16subdir-ccflags-y += -I$(src)17 18# Please keep these build lists sorted!19 20# core driver code21i915-y += \22 i915_config.o \23 i915_driver.o \24 i915_drm_client.o \25 i915_getparam.o \26 i915_ioctl.o \27 i915_irq.o \28 i915_mitigations.o \29 i915_module.o \30 i915_params.o \31 i915_pci.o \32 i915_scatterlist.o \33 i915_suspend.o \34 i915_switcheroo.o \35 i915_sysfs.o \36 i915_utils.o \37 intel_clock_gating.o \38 intel_device_info.o \39 intel_memory_region.o \40 intel_pcode.o \41 intel_region_ttm.o \42 intel_runtime_pm.o \43 intel_sbi.o \44 intel_step.o \45 intel_uncore.o \46 intel_wakeref.o \47 vlv_sideband.o \48 vlv_suspend.o49 50# core peripheral code51i915-y += \52 soc/intel_dram.o \53 soc/intel_gmch.o \54 soc/intel_pch.o55 56# core library code57i915-y += \58 i915_memcpy.o \59 i915_mm.o \60 i915_sw_fence.o \61 i915_sw_fence_work.o \62 i915_syncmap.o \63 i915_user_extensions.o64 65i915-$(CONFIG_COMPAT) += \66 i915_ioc32.o67i915-$(CONFIG_DEBUG_FS) += \68 i915_debugfs.o \69 i915_debugfs_params.o70i915-$(CONFIG_PERF_EVENTS) += \71 i915_pmu.o72 73# "Graphics Technology" (aka we talk to the gpu)74gt-y += \75 gt/gen2_engine_cs.o \76 gt/gen6_engine_cs.o \77 gt/gen6_ppgtt.o \78 gt/gen7_renderclear.o \79 gt/gen8_engine_cs.o \80 gt/gen8_ppgtt.o \81 gt/intel_breadcrumbs.o \82 gt/intel_context.o \83 gt/intel_context_sseu.o \84 gt/intel_engine_cs.o \85 gt/intel_engine_heartbeat.o \86 gt/intel_engine_pm.o \87 gt/intel_engine_user.o \88 gt/intel_execlists_submission.o \89 gt/intel_ggtt.o \90 gt/intel_ggtt_fencing.o \91 gt/intel_gt.o \92 gt/intel_gt_buffer_pool.o \93 gt/intel_gt_ccs_mode.o \94 gt/intel_gt_clock_utils.o \95 gt/intel_gt_debugfs.o \96 gt/intel_gt_engines_debugfs.o \97 gt/intel_gt_irq.o \98 gt/intel_gt_mcr.o \99 gt/intel_gt_pm.o \100 gt/intel_gt_pm_debugfs.o \101 gt/intel_gt_pm_irq.o \102 gt/intel_gt_requests.o \103 gt/intel_gt_sysfs.o \104 gt/intel_gt_sysfs_pm.o \105 gt/intel_gtt.o \106 gt/intel_llc.o \107 gt/intel_lrc.o \108 gt/intel_migrate.o \109 gt/intel_mocs.o \110 gt/intel_ppgtt.o \111 gt/intel_rc6.o \112 gt/intel_region_lmem.o \113 gt/intel_renderstate.o \114 gt/intel_reset.o \115 gt/intel_ring.o \116 gt/intel_ring_submission.o \117 gt/intel_rps.o \118 gt/intel_sa_media.o \119 gt/intel_sseu.o \120 gt/intel_sseu_debugfs.o \121 gt/intel_timeline.o \122 gt/intel_tlb.o \123 gt/intel_wopcm.o \124 gt/intel_workarounds.o \125 gt/shmem_utils.o \126 gt/sysfs_engines.o127 128# x86 intel-gtt module support129gt-$(CONFIG_X86) += \130 gt/intel_ggtt_gmch.o131# autogenerated null render state132gt-y += \133 gt/gen6_renderstate.o \134 gt/gen7_renderstate.o \135 gt/gen8_renderstate.o \136 gt/gen9_renderstate.o137i915-y += $(gt-y)138 139# GEM (Graphics Execution Management) code140gem-y += \141 gem/i915_gem_busy.o \142 gem/i915_gem_clflush.o \143 gem/i915_gem_context.o \144 gem/i915_gem_create.o \145 gem/i915_gem_dmabuf.o \146 gem/i915_gem_domain.o \147 gem/i915_gem_execbuffer.o \148 gem/i915_gem_internal.o \149 gem/i915_gem_lmem.o \150 gem/i915_gem_mman.o \151 gem/i915_gem_object.o \152 gem/i915_gem_pages.o \153 gem/i915_gem_phys.o \154 gem/i915_gem_pm.o \155 gem/i915_gem_region.o \156 gem/i915_gem_shmem.o \157 gem/i915_gem_shrinker.o \158 gem/i915_gem_stolen.o \159 gem/i915_gem_throttle.o \160 gem/i915_gem_tiling.o \161 gem/i915_gem_ttm.o \162 gem/i915_gem_ttm_move.o \163 gem/i915_gem_ttm_pm.o \164 gem/i915_gem_userptr.o \165 gem/i915_gem_wait.o \166 gem/i915_gemfs.o167i915-y += \168 $(gem-y) \169 i915_active.o \170 i915_cmd_parser.o \171 i915_deps.o \172 i915_gem.o \173 i915_gem_evict.o \174 i915_gem_gtt.o \175 i915_gem_ww.o \176 i915_query.o \177 i915_request.o \178 i915_scheduler.o \179 i915_trace_points.o \180 i915_ttm_buddy_manager.o \181 i915_vma.o \182 i915_vma_resource.o183 184# general-purpose microcontroller (GuC) support185i915-y += \186 gt/uc/intel_gsc_fw.o \187 gt/uc/intel_gsc_proxy.o \188 gt/uc/intel_gsc_uc.o \189 gt/uc/intel_gsc_uc_debugfs.o \190 gt/uc/intel_gsc_uc_heci_cmd_submit.o\191 gt/uc/intel_guc.o \192 gt/uc/intel_guc_ads.o \193 gt/uc/intel_guc_capture.o \194 gt/uc/intel_guc_ct.o \195 gt/uc/intel_guc_debugfs.o \196 gt/uc/intel_guc_fw.o \197 gt/uc/intel_guc_hwconfig.o \198 gt/uc/intel_guc_log.o \199 gt/uc/intel_guc_log_debugfs.o \200 gt/uc/intel_guc_rc.o \201 gt/uc/intel_guc_slpc.o \202 gt/uc/intel_guc_submission.o \203 gt/uc/intel_huc.o \204 gt/uc/intel_huc_debugfs.o \205 gt/uc/intel_huc_fw.o \206 gt/uc/intel_uc.o \207 gt/uc/intel_uc_debugfs.o \208 gt/uc/intel_uc_fw.o209 210# graphics system controller (GSC) support211i915-y += \212 gt/intel_gsc.o213 214# graphics hardware monitoring (HWMON) support215i915-$(CONFIG_HWMON) += \216 i915_hwmon.o217 218# modesetting core code219i915-y += \220 display/hsw_ips.o \221 display/i9xx_plane.o \222 display/i9xx_wm.o \223 display/intel_alpm.o \224 display/intel_atomic.o \225 display/intel_atomic_plane.o \226 display/intel_audio.o \227 display/intel_bios.o \228 display/intel_bw.o \229 display/intel_cdclk.o \230 display/intel_color.o \231 display/intel_combo_phy.o \232 display/intel_connector.o \233 display/intel_crtc.o \234 display/intel_crtc_state_dump.o \235 display/intel_cursor.o \236 display/intel_display.o \237 display/intel_display_driver.o \238 display/intel_display_irq.o \239 display/intel_display_params.o \240 display/intel_display_power.o \241 display/intel_display_power_map.o \242 display/intel_display_power_well.o \243 display/intel_display_reset.o \244 display/intel_display_rps.o \245 display/intel_display_wa.o \246 display/intel_dmc.o \247 display/intel_dmc_wl.o \248 display/intel_dpio_phy.o \249 display/intel_dpll.o \250 display/intel_dpll_mgr.o \251 display/intel_dpt.o \252 display/intel_dpt_common.o \253 display/intel_drrs.o \254 display/intel_dsb.o \255 display/intel_dsb_buffer.o \256 display/intel_fb.o \257 display/intel_fb_bo.o \258 display/intel_fb_pin.o \259 display/intel_fbc.o \260 display/intel_fdi.o \261 display/intel_fifo_underrun.o \262 display/intel_frontbuffer.o \263 display/intel_global_state.o \264 display/intel_hdcp.o \265 display/intel_hdcp_gsc.o \266 display/intel_hdcp_gsc_message.o \267 display/intel_hotplug.o \268 display/intel_hotplug_irq.o \269 display/intel_hti.o \270 display/intel_link_bw.o \271 display/intel_load_detect.o \272 display/intel_lpe_audio.o \273 display/intel_modeset_lock.o \274 display/intel_modeset_setup.o \275 display/intel_modeset_verify.o \276 display/intel_overlay.o \277 display/intel_pch_display.o \278 display/intel_pch_refclk.o \279 display/intel_plane_initial.o \280 display/intel_pmdemand.o \281 display/intel_psr.o \282 display/intel_quirks.o \283 display/intel_sprite.o \284 display/intel_sprite_uapi.o \285 display/intel_tc.o \286 display/intel_vblank.o \287 display/intel_vga.o \288 display/intel_wm.o \289 display/skl_scaler.o \290 display/skl_universal_plane.o \291 display/skl_watermark.o292i915-$(CONFIG_ACPI) += \293 display/intel_acpi.o \294 display/intel_opregion.o295i915-$(CONFIG_DRM_FBDEV_EMULATION) += \296 display/intel_fbdev.o \297 display/intel_fbdev_fb.o298i915-$(CONFIG_DEBUG_FS) += \299 display/intel_display_debugfs.o \300 display/intel_display_debugfs_params.o \301 display/intel_pipe_crc.o302 303# modesetting output/encoder code304i915-y += \305 display/dvo_ch7017.o \306 display/dvo_ch7xxx.o \307 display/dvo_ivch.o \308 display/dvo_ns2501.o \309 display/dvo_sil164.o \310 display/dvo_tfp410.o \311 display/g4x_dp.o \312 display/g4x_hdmi.o \313 display/icl_dsi.o \314 display/intel_backlight.o \315 display/intel_crt.o \316 display/intel_cx0_phy.o \317 display/intel_ddi.o \318 display/intel_ddi_buf_trans.o \319 display/intel_display_device.o \320 display/intel_display_trace.o \321 display/intel_dkl_phy.o \322 display/intel_dp.o \323 display/intel_dp_aux.o \324 display/intel_dp_aux_backlight.o \325 display/intel_dp_hdcp.o \326 display/intel_dp_link_training.o \327 display/intel_dp_mst.o \328 display/intel_dsi.o \329 display/intel_dsi_dcs_backlight.o \330 display/intel_dsi_vbt.o \331 display/intel_dvo.o \332 display/intel_encoder.o \333 display/intel_gmbus.o \334 display/intel_hdmi.o \335 display/intel_lspcon.o \336 display/intel_lvds.o \337 display/intel_panel.o \338 display/intel_pps.o \339 display/intel_qp_tables.o \340 display/intel_sdvo.o \341 display/intel_snps_phy.o \342 display/intel_tv.o \343 display/intel_vdsc.o \344 display/intel_vrr.o \345 display/vlv_dsi.o \346 display/vlv_dsi_pll.o347 348i915-$(CONFIG_DRM_I915_DP_TUNNEL) += \349 display/intel_dp_tunnel.o350 351i915-y += \352 i915_perf.o353 354# Protected execution platform (PXP) support. Base support is required for HuC355i915-y += \356 pxp/intel_pxp.o \357 pxp/intel_pxp_huc.o \358 pxp/intel_pxp_tee.o359 360i915-$(CONFIG_DRM_I915_PXP) += \361 pxp/intel_pxp_cmd.o \362 pxp/intel_pxp_debugfs.o \363 pxp/intel_pxp_gsccs.o \364 pxp/intel_pxp_irq.o \365 pxp/intel_pxp_pm.o \366 pxp/intel_pxp_session.o367 368# Post-mortem debug and GPU hang state capture369i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += \370 i915_gpu_error.o371i915-$(CONFIG_DRM_I915_SELFTEST) += \372 gem/selftests/i915_gem_client_blt.o \373 gem/selftests/igt_gem_utils.o \374 selftests/i915_random.o \375 selftests/i915_selftest.o \376 selftests/igt_atomic.o \377 selftests/igt_flush_test.o \378 selftests/igt_live_test.o \379 selftests/igt_mmap.o \380 selftests/igt_reset.o \381 selftests/igt_spinner.o \382 selftests/intel_scheduler_helpers.o \383 selftests/librapl.o384 385# virtual gpu code386i915-y += \387 i915_vgpu.o388 389i915-$(CONFIG_DRM_I915_GVT) += \390 intel_gvt.o \391 intel_gvt_mmio_table.o392include $(src)/gvt/Makefile393 394obj-$(CONFIG_DRM_I915) += i915.o395obj-$(CONFIG_DRM_I915_GVT_KVMGT) += kvmgt.o396 397# kernel-doc test398#399# Enable locally for CONFIG_DRM_I915_WERROR=y. See also scripts/Makefile.build400ifdef CONFIG_DRM_I915_WERROR401 cmd_checkdoc = $(srctree)/scripts/kernel-doc -none -Werror $<402endif403 404# header test405 406# exclude some broken headers from the test coverage407no-header-test := \408 display/intel_vbt_defs.h409 410always-$(CONFIG_DRM_I915_WERROR) += \411 $(patsubst %.h,%.hdrtest, $(filter-out $(no-header-test), \412 $(shell cd $(src) && find * -name '*.h')))413 414quiet_cmd_hdrtest = HDRTEST $(patsubst %.hdrtest,%.h,$@)415 cmd_hdrtest = $(CC) $(filter-out $(CFLAGS_GCOV), $(c_flags)) -S -o /dev/null -x c /dev/null -include $<; \416 $(srctree)/scripts/kernel-doc -none -Werror $<; touch $@417 418$(obj)/%.hdrtest: $(src)/%.h FORCE419 $(call if_changed_dep,hdrtest)420