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1// SPDX-License-Identifier: MIT2/*3 * Copyright © 2023 Intel Corporation4 */5 6#ifndef __INTEL_CX0_PHY_H__7#define __INTEL_CX0_PHY_H__8 9#include <linux/types.h>10#include <linux/bitfield.h>11#include <linux/bits.h>12 13enum icl_port_dpll_id;14struct drm_i915_private;15struct intel_atomic_state;16struct intel_c10pll_state;17struct intel_c20pll_state;18struct intel_cx0pll_state;19struct intel_crtc;20struct intel_crtc_state;21struct intel_encoder;22struct intel_hdmi;23 24bool intel_encoder_is_c10phy(struct intel_encoder *encoder);25void intel_mtl_pll_enable(struct intel_encoder *encoder,26 const struct intel_crtc_state *crtc_state);27void intel_mtl_pll_disable(struct intel_encoder *encoder);28enum icl_port_dpll_id29intel_mtl_port_pll_type(struct intel_encoder *encoder,30 const struct intel_crtc_state *crtc_state);31 32int intel_cx0pll_calc_state(struct intel_crtc_state *crtc_state, struct intel_encoder *encoder);33void intel_cx0pll_readout_hw_state(struct intel_encoder *encoder,34 struct intel_cx0pll_state *pll_state);35int intel_cx0pll_calc_port_clock(struct intel_encoder *encoder,36 const struct intel_cx0pll_state *pll_state);37 38void intel_cx0pll_dump_hw_state(struct drm_i915_private *dev_priv,39 const struct intel_cx0pll_state *hw_state);40void intel_cx0pll_state_verify(struct intel_atomic_state *state,41 struct intel_crtc *crtc);42bool intel_cx0pll_compare_hw_state(const struct intel_cx0pll_state *a,43 const struct intel_cx0pll_state *b);44void intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder,45 const struct intel_crtc_state *crtc_state);46int intel_cx0_phy_check_hdmi_link_rate(struct intel_hdmi *hdmi, int clock);47int intel_mtl_tbt_calc_port_clock(struct intel_encoder *encoder);48 49#endif /* __INTEL_CX0_PHY_H__ */50