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1// SPDX-License-Identifier: MIT2/*3 * Copyright © 2022-2023 Intel Corporation4 *5 * High level display driver entry points. This is a layer between top level6 * driver code and low level display functionality; no low level display code or7 * details here.8 */9 10#include <linux/vga_switcheroo.h>11#include <acpi/video.h>12#include <drm/display/drm_dp_mst_helper.h>13#include <drm/drm_atomic_helper.h>14#include <drm/drm_client.h>15#include <drm/drm_mode_config.h>16#include <drm/drm_privacy_screen_consumer.h>17#include <drm/drm_probe_helper.h>18#include <drm/drm_vblank.h>19 20#include "i915_drv.h"21#include "i9xx_wm.h"22#include "intel_acpi.h"23#include "intel_atomic.h"24#include "intel_audio.h"25#include "intel_bios.h"26#include "intel_bw.h"27#include "intel_cdclk.h"28#include "intel_color.h"29#include "intel_crtc.h"30#include "intel_display_debugfs.h"31#include "intel_display_driver.h"32#include "intel_display_irq.h"33#include "intel_display_power.h"34#include "intel_display_types.h"35#include "intel_display_wa.h"36#include "intel_dkl_phy.h"37#include "intel_dmc.h"38#include "intel_dp.h"39#include "intel_dp_tunnel.h"40#include "intel_dpll.h"41#include "intel_dpll_mgr.h"42#include "intel_fb.h"43#include "intel_fbc.h"44#include "intel_fbdev.h"45#include "intel_fdi.h"46#include "intel_gmbus.h"47#include "intel_hdcp.h"48#include "intel_hotplug.h"49#include "intel_hti.h"50#include "intel_modeset_lock.h"51#include "intel_modeset_setup.h"52#include "intel_opregion.h"53#include "intel_overlay.h"54#include "intel_plane_initial.h"55#include "intel_pmdemand.h"56#include "intel_pps.h"57#include "intel_quirks.h"58#include "intel_vga.h"59#include "intel_wm.h"60#include "skl_watermark.h"61 62bool intel_display_driver_probe_defer(struct pci_dev *pdev)63{64 struct drm_privacy_screen *privacy_screen;65 66 /*67 * apple-gmux is needed on dual GPU MacBook Pro68 * to probe the panel if we're the inactive GPU.69 */70 if (vga_switcheroo_client_probe_defer(pdev))71 return true;72 73 /* If the LCD panel has a privacy-screen, wait for it */74 privacy_screen = drm_privacy_screen_get(&pdev->dev, NULL);75 if (IS_ERR(privacy_screen) && PTR_ERR(privacy_screen) == -EPROBE_DEFER)76 return true;77 78 drm_privacy_screen_put(privacy_screen);79 80 return false;81}82 83void intel_display_driver_init_hw(struct drm_i915_private *i915)84{85 struct intel_cdclk_state *cdclk_state;86 87 if (!HAS_DISPLAY(i915))88 return;89 90 cdclk_state = to_intel_cdclk_state(i915->display.cdclk.obj.state);91 92 intel_update_cdclk(i915);93 intel_cdclk_dump_config(i915, &i915->display.cdclk.hw, "Current CDCLK");94 cdclk_state->logical = cdclk_state->actual = i915->display.cdclk.hw;95 96 intel_display_wa_apply(i915);97}98 99static const struct drm_mode_config_funcs intel_mode_funcs = {100 .fb_create = intel_user_framebuffer_create,101 .get_format_info = intel_fb_get_format_info,102 .mode_valid = intel_mode_valid,103 .atomic_check = intel_atomic_check,104 .atomic_commit = intel_atomic_commit,105 .atomic_state_alloc = intel_atomic_state_alloc,106 .atomic_state_clear = intel_atomic_state_clear,107 .atomic_state_free = intel_atomic_state_free,108};109 110static const struct drm_mode_config_helper_funcs intel_mode_config_funcs = {111 .atomic_commit_setup = drm_dp_mst_atomic_setup_commit,112};113 114static void intel_mode_config_init(struct drm_i915_private *i915)115{116 struct drm_mode_config *mode_config = &i915->drm.mode_config;117 118 drm_mode_config_init(&i915->drm);119 INIT_LIST_HEAD(&i915->display.global.obj_list);120 121 mode_config->min_width = 0;122 mode_config->min_height = 0;123 124 mode_config->preferred_depth = 24;125 mode_config->prefer_shadow = 1;126 127 mode_config->funcs = &intel_mode_funcs;128 mode_config->helper_private = &intel_mode_config_funcs;129 130 mode_config->async_page_flip = HAS_ASYNC_FLIPS(i915);131 132 /*133 * Maximum framebuffer dimensions, chosen to match134 * the maximum render engine surface size on gen4+.135 */136 if (DISPLAY_VER(i915) >= 7) {137 mode_config->max_width = 16384;138 mode_config->max_height = 16384;139 } else if (DISPLAY_VER(i915) >= 4) {140 mode_config->max_width = 8192;141 mode_config->max_height = 8192;142 } else if (DISPLAY_VER(i915) == 3) {143 mode_config->max_width = 4096;144 mode_config->max_height = 4096;145 } else {146 mode_config->max_width = 2048;147 mode_config->max_height = 2048;148 }149 150 if (IS_I845G(i915) || IS_I865G(i915)) {151 mode_config->cursor_width = IS_I845G(i915) ? 64 : 512;152 mode_config->cursor_height = 1023;153 } else if (IS_I830(i915) || IS_I85X(i915) ||154 IS_I915G(i915) || IS_I915GM(i915)) {155 mode_config->cursor_width = 64;156 mode_config->cursor_height = 64;157 } else {158 mode_config->cursor_width = 256;159 mode_config->cursor_height = 256;160 }161}162 163static void intel_mode_config_cleanup(struct drm_i915_private *i915)164{165 intel_atomic_global_obj_cleanup(i915);166 drm_mode_config_cleanup(&i915->drm);167}168 169static void intel_plane_possible_crtcs_init(struct drm_i915_private *dev_priv)170{171 struct intel_plane *plane;172 173 for_each_intel_plane(&dev_priv->drm, plane) {174 struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv,175 plane->pipe);176 177 plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);178 }179}180 181void intel_display_driver_early_probe(struct drm_i915_private *i915)182{183 if (!HAS_DISPLAY(i915))184 return;185 186 spin_lock_init(&i915->display.fb_tracking.lock);187 mutex_init(&i915->display.backlight.lock);188 mutex_init(&i915->display.audio.mutex);189 mutex_init(&i915->display.wm.wm_mutex);190 mutex_init(&i915->display.pps.mutex);191 mutex_init(&i915->display.hdcp.hdcp_mutex);192 193 intel_display_irq_init(i915);194 intel_dkl_phy_init(i915);195 intel_color_init_hooks(i915);196 intel_init_cdclk_hooks(i915);197 intel_audio_hooks_init(i915);198 intel_dpll_init_clock_hook(i915);199 intel_init_display_hooks(i915);200 intel_fdi_init_hook(i915);201 intel_dmc_wl_init(&i915->display);202}203 204/* part #1: call before irq install */205int intel_display_driver_probe_noirq(struct drm_i915_private *i915)206{207 struct intel_display *display = &i915->display;208 int ret;209 210 if (i915_inject_probe_failure(i915))211 return -ENODEV;212 213 if (HAS_DISPLAY(i915)) {214 ret = drm_vblank_init(&i915->drm,215 INTEL_NUM_PIPES(i915));216 if (ret)217 return ret;218 }219 220 intel_bios_init(display);221 222 ret = intel_vga_register(i915);223 if (ret)224 goto cleanup_bios;225 226 /* FIXME: completely on the wrong abstraction layer */227 ret = intel_power_domains_init(i915);228 if (ret < 0)229 goto cleanup_vga;230 231 intel_pmdemand_init_early(i915);232 233 intel_power_domains_init_hw(i915, false);234 235 if (!HAS_DISPLAY(i915))236 return 0;237 238 intel_dmc_init(i915);239 240 i915->display.wq.modeset = alloc_ordered_workqueue("i915_modeset", 0);241 i915->display.wq.flip = alloc_workqueue("i915_flip", WQ_HIGHPRI |242 WQ_UNBOUND, WQ_UNBOUND_MAX_ACTIVE);243 244 intel_mode_config_init(i915);245 246 ret = intel_cdclk_init(i915);247 if (ret)248 goto cleanup_vga_client_pw_domain_dmc;249 250 ret = intel_color_init(i915);251 if (ret)252 goto cleanup_vga_client_pw_domain_dmc;253 254 ret = intel_dbuf_init(i915);255 if (ret)256 goto cleanup_vga_client_pw_domain_dmc;257 258 ret = intel_bw_init(i915);259 if (ret)260 goto cleanup_vga_client_pw_domain_dmc;261 262 ret = intel_pmdemand_init(i915);263 if (ret)264 goto cleanup_vga_client_pw_domain_dmc;265 266 intel_init_quirks(display);267 268 intel_fbc_init(display);269 270 return 0;271 272cleanup_vga_client_pw_domain_dmc:273 intel_dmc_fini(i915);274 intel_power_domains_driver_remove(i915);275cleanup_vga:276 intel_vga_unregister(i915);277cleanup_bios:278 intel_bios_driver_remove(display);279 280 return ret;281}282 283static void set_display_access(struct drm_i915_private *i915,284 bool any_task_allowed,285 struct task_struct *allowed_task)286{287 struct drm_modeset_acquire_ctx ctx;288 int err;289 290 intel_modeset_lock_ctx_retry(&ctx, NULL, 0, err) {291 err = drm_modeset_lock_all_ctx(&i915->drm, &ctx);292 if (err)293 continue;294 295 i915->display.access.any_task_allowed = any_task_allowed;296 i915->display.access.allowed_task = allowed_task;297 }298 299 drm_WARN_ON(&i915->drm, err);300}301 302/**303 * intel_display_driver_enable_user_access - Enable display HW access for all threads304 * @i915: i915 device instance305 *306 * Enable the display HW access for all threads. Examples for such accesses307 * are modeset commits and connector probing.308 *309 * This function should be called during driver loading and system resume once310 * all the HW initialization steps are done.311 */312void intel_display_driver_enable_user_access(struct drm_i915_private *i915)313{314 set_display_access(i915, true, NULL);315 316 intel_hpd_enable_detection_work(i915);317}318 319/**320 * intel_display_driver_disable_user_access - Disable display HW access for user threads321 * @i915: i915 device instance322 *323 * Disable the display HW access for user threads. Examples for such accesses324 * are modeset commits and connector probing. For the current thread the325 * access is still enabled, which should only perform HW init/deinit326 * programming (as the initial modeset during driver loading or the disabling327 * modeset during driver unloading and system suspend/shutdown). This function328 * should be followed by calling either intel_display_driver_enable_user_access()329 * after completing the HW init programming or330 * intel_display_driver_suspend_access() after completing the HW deinit331 * programming.332 *333 * This function should be called during driver loading/unloading and system334 * suspend/shutdown before starting the HW init/deinit programming.335 */336void intel_display_driver_disable_user_access(struct drm_i915_private *i915)337{338 intel_hpd_disable_detection_work(i915);339 340 set_display_access(i915, false, current);341}342 343/**344 * intel_display_driver_suspend_access - Suspend display HW access for all threads345 * @i915: i915 device instance346 *347 * Disable the display HW access for all threads. Examples for such accesses348 * are modeset commits and connector probing. This call should be either349 * followed by calling intel_display_driver_resume_access(), or the driver350 * should be unloaded/shutdown.351 *352 * This function should be called during driver unloading and system353 * suspend/shutdown after completing the HW deinit programming.354 */355void intel_display_driver_suspend_access(struct drm_i915_private *i915)356{357 set_display_access(i915, false, NULL);358}359 360/**361 * intel_display_driver_resume_access - Resume display HW access for the resume thread362 * @i915: i915 device instance363 *364 * Enable the display HW access for the current resume thread, keeping the365 * access disabled for all other (user) threads. Examples for such accesses366 * are modeset commits and connector probing. The resume thread should only367 * perform HW init programming (as the restoring modeset). This function368 * should be followed by calling intel_display_driver_enable_user_access(),369 * after completing the HW init programming steps.370 *371 * This function should be called during system resume before starting the HW372 * init steps.373 */374void intel_display_driver_resume_access(struct drm_i915_private *i915)375{376 set_display_access(i915, false, current);377}378 379/**380 * intel_display_driver_check_access - Check if the current thread has disaplay HW access381 * @i915: i915 device instance382 *383 * Check whether the current thread has display HW access, print a debug384 * message if it doesn't. Such accesses are modeset commits and connector385 * probing. If the function returns %false any HW access should be prevented.386 *387 * Returns %true if the current thread has display HW access, %false388 * otherwise.389 */390bool intel_display_driver_check_access(struct drm_i915_private *i915)391{392 char comm[TASK_COMM_LEN];393 char current_task[TASK_COMM_LEN + 16];394 char allowed_task[TASK_COMM_LEN + 16] = "none";395 396 if (i915->display.access.any_task_allowed ||397 i915->display.access.allowed_task == current)398 return true;399 400 snprintf(current_task, sizeof(current_task), "%s[%d]",401 get_task_comm(comm, current),402 task_pid_vnr(current));403 404 if (i915->display.access.allowed_task)405 snprintf(allowed_task, sizeof(allowed_task), "%s[%d]",406 get_task_comm(comm, i915->display.access.allowed_task),407 task_pid_vnr(i915->display.access.allowed_task));408 409 drm_dbg_kms(&i915->drm,410 "Reject display access from task %s (allowed to %s)\n",411 current_task, allowed_task);412 413 return false;414}415 416/* part #2: call after irq install, but before gem init */417int intel_display_driver_probe_nogem(struct drm_i915_private *i915)418{419 struct intel_display *display = &i915->display;420 struct drm_device *dev = display->drm;421 enum pipe pipe;422 int ret;423 424 if (!HAS_DISPLAY(i915))425 return 0;426 427 intel_wm_init(i915);428 429 intel_panel_sanitize_ssc(i915);430 431 intel_pps_setup(display);432 433 intel_gmbus_setup(i915);434 435 drm_dbg_kms(&i915->drm, "%d display pipe%s available.\n",436 INTEL_NUM_PIPES(i915),437 INTEL_NUM_PIPES(i915) > 1 ? "s" : "");438 439 for_each_pipe(i915, pipe) {440 ret = intel_crtc_init(i915, pipe);441 if (ret)442 goto err_mode_config;443 }444 445 intel_plane_possible_crtcs_init(i915);446 intel_shared_dpll_init(i915);447 intel_fdi_pll_freq_update(i915);448 449 intel_update_czclk(i915);450 intel_display_driver_init_hw(i915);451 intel_dpll_update_ref_clks(i915);452 453 if (i915->display.cdclk.max_cdclk_freq == 0)454 intel_update_max_cdclk(i915);455 456 intel_hti_init(display);457 458 /* Just disable it once at startup */459 intel_vga_disable(i915);460 intel_setup_outputs(i915);461 462 ret = intel_dp_tunnel_mgr_init(display);463 if (ret)464 goto err_hdcp;465 466 intel_display_driver_disable_user_access(i915);467 468 drm_modeset_lock_all(dev);469 intel_modeset_setup_hw_state(i915, dev->mode_config.acquire_ctx);470 intel_acpi_assign_connector_fwnodes(display);471 drm_modeset_unlock_all(dev);472 473 intel_initial_plane_config(i915);474 475 /*476 * Make sure hardware watermarks really match the state we read out.477 * Note that we need to do this after reconstructing the BIOS fb's478 * since the watermark calculation done here will use pstate->fb.479 */480 if (!HAS_GMCH(i915))481 ilk_wm_sanitize(i915);482 483 return 0;484 485err_hdcp:486 intel_hdcp_component_fini(i915);487err_mode_config:488 intel_mode_config_cleanup(i915);489 490 return ret;491}492 493/* part #3: call after gem init */494int intel_display_driver_probe(struct drm_i915_private *i915)495{496 int ret;497 498 if (!HAS_DISPLAY(i915))499 return 0;500 501 /*502 * This will bind stuff into ggtt, so it needs to be done after503 * the BIOS fb takeover and whatever else magic ggtt reservations504 * happen during gem/ggtt init.505 */506 intel_hdcp_component_init(i915);507 508 /*509 * Force all active planes to recompute their states. So that on510 * mode_setcrtc after probe, all the intel_plane_state variables511 * are already calculated and there is no assert_plane warnings512 * during bootup.513 */514 ret = intel_initial_commit(&i915->drm);515 if (ret)516 drm_dbg_kms(&i915->drm, "Initial modeset failed, %d\n", ret);517 518 intel_overlay_setup(i915);519 520 /* Only enable hotplug handling once the fbdev is fully set up. */521 intel_hpd_init(i915);522 523 skl_watermark_ipc_init(i915);524 525 return 0;526}527 528void intel_display_driver_register(struct drm_i915_private *i915)529{530 struct intel_display *display = &i915->display;531 struct drm_printer p = drm_dbg_printer(&i915->drm, DRM_UT_KMS,532 "i915 display info:");533 534 if (!HAS_DISPLAY(i915))535 return;536 537 /* Must be done after probing outputs */538 intel_opregion_register(display);539 intel_acpi_video_register(display);540 541 intel_audio_init(i915);542 543 intel_display_driver_enable_user_access(i915);544 545 intel_audio_register(i915);546 547 intel_display_debugfs_register(i915);548 549 /*550 * We need to coordinate the hotplugs with the asynchronous551 * fbdev configuration, for which we use the552 * fbdev->async_cookie.553 */554 drm_kms_helper_poll_init(&i915->drm);555 intel_hpd_poll_disable(i915);556 557 intel_fbdev_setup(i915);558 559 intel_display_device_info_print(DISPLAY_INFO(i915),560 DISPLAY_RUNTIME_INFO(i915), &p);561}562 563/* part #1: call before irq uninstall */564void intel_display_driver_remove(struct drm_i915_private *i915)565{566 if (!HAS_DISPLAY(i915))567 return;568 569 flush_workqueue(i915->display.wq.flip);570 flush_workqueue(i915->display.wq.modeset);571 572 /*573 * MST topology needs to be suspended so we don't have any calls to574 * fbdev after it's finalized. MST will be destroyed later as part of575 * drm_mode_config_cleanup()576 */577 intel_dp_mst_suspend(i915);578}579 580/* part #2: call after irq uninstall */581void intel_display_driver_remove_noirq(struct drm_i915_private *i915)582{583 struct intel_display *display = &i915->display;584 585 if (!HAS_DISPLAY(i915))586 return;587 588 intel_display_driver_suspend_access(i915);589 590 /*591 * Due to the hpd irq storm handling the hotplug work can re-arm the592 * poll handlers. Hence disable polling after hpd handling is shut down.593 */594 intel_hpd_poll_fini(i915);595 596 intel_unregister_dsm_handler();597 598 /* flush any delayed tasks or pending work */599 flush_workqueue(i915->unordered_wq);600 601 intel_hdcp_component_fini(i915);602 603 intel_mode_config_cleanup(i915);604 605 intel_dp_tunnel_mgr_cleanup(display);606 607 intel_overlay_cleanup(i915);608 609 intel_gmbus_teardown(i915);610 611 destroy_workqueue(i915->display.wq.flip);612 destroy_workqueue(i915->display.wq.modeset);613 614 intel_fbc_cleanup(&i915->display);615}616 617/* part #3: call after gem init */618void intel_display_driver_remove_nogem(struct drm_i915_private *i915)619{620 struct intel_display *display = &i915->display;621 622 intel_dmc_fini(i915);623 624 intel_power_domains_driver_remove(i915);625 626 intel_vga_unregister(i915);627 628 intel_bios_driver_remove(display);629}630 631void intel_display_driver_unregister(struct drm_i915_private *i915)632{633 struct intel_display *display = &i915->display;634 635 if (!HAS_DISPLAY(i915))636 return;637 638 drm_client_dev_unregister(&i915->drm);639 640 /*641 * After flushing the fbdev (incl. a late async config which642 * will have delayed queuing of a hotplug event), then flush643 * the hotplug events.644 */645 drm_kms_helper_poll_fini(&i915->drm);646 647 intel_display_driver_disable_user_access(i915);648 649 intel_audio_deinit(i915);650 651 drm_atomic_helper_shutdown(&i915->drm);652 653 acpi_video_unregister();654 intel_opregion_unregister(display);655}656 657/*658 * turn all crtc's off, but do not adjust state659 * This has to be paired with a call to intel_modeset_setup_hw_state.660 */661int intel_display_driver_suspend(struct drm_i915_private *i915)662{663 struct drm_atomic_state *state;664 int ret;665 666 if (!HAS_DISPLAY(i915))667 return 0;668 669 state = drm_atomic_helper_suspend(&i915->drm);670 ret = PTR_ERR_OR_ZERO(state);671 if (ret)672 drm_err(&i915->drm, "Suspending crtc's failed with %i\n",673 ret);674 else675 i915->display.restore.modeset_state = state;676 return ret;677}678 679int680__intel_display_driver_resume(struct drm_i915_private *i915,681 struct drm_atomic_state *state,682 struct drm_modeset_acquire_ctx *ctx)683{684 struct drm_crtc_state *crtc_state;685 struct drm_crtc *crtc;686 int ret, i;687 688 intel_modeset_setup_hw_state(i915, ctx);689 intel_vga_redisable(i915);690 691 if (!state)692 return 0;693 694 /*695 * We've duplicated the state, pointers to the old state are invalid.696 *697 * Don't attempt to use the old state until we commit the duplicated state.698 */699 for_each_new_crtc_in_state(state, crtc, crtc_state, i) {700 /*701 * Force recalculation even if we restore702 * current state. With fast modeset this may not result703 * in a modeset when the state is compatible.704 */705 crtc_state->mode_changed = true;706 }707 708 /* ignore any reset values/BIOS leftovers in the WM registers */709 if (!HAS_GMCH(i915))710 to_intel_atomic_state(state)->skip_intermediate_wm = true;711 712 ret = drm_atomic_helper_commit_duplicated_state(state, ctx);713 714 drm_WARN_ON(&i915->drm, ret == -EDEADLK);715 716 return ret;717}718 719void intel_display_driver_resume(struct drm_i915_private *i915)720{721 struct drm_atomic_state *state = i915->display.restore.modeset_state;722 struct drm_modeset_acquire_ctx ctx;723 int ret;724 725 if (!HAS_DISPLAY(i915))726 return;727 728 i915->display.restore.modeset_state = NULL;729 if (state)730 state->acquire_ctx = &ctx;731 732 drm_modeset_acquire_init(&ctx, 0);733 734 while (1) {735 ret = drm_modeset_lock_all_ctx(&i915->drm, &ctx);736 if (ret != -EDEADLK)737 break;738 739 drm_modeset_backoff(&ctx);740 }741 742 if (!ret)743 ret = __intel_display_driver_resume(i915, state, &ctx);744 745 skl_watermark_ipc_update(i915);746 drm_modeset_drop_locks(&ctx);747 drm_modeset_acquire_fini(&ctx);748 749 if (ret)750 drm_err(&i915->drm,751 "Restoring old state failed with %i\n", ret);752 if (state)753 drm_atomic_state_put(state);754}755