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1/* SPDX-License-Identifier: MIT */2/*3 * Copyright © 2024 Intel Corporation4 */5 6#ifndef __INTEL_TDF_H__7#define __INTEL_TDF_H__8 9/*10 * TDF (Transient-Data-Flush) is needed for Xe2+ where special L3:XD caching can11 * be enabled through various PAT index modes. Idea is to use this caching mode12 * when for example rendering onto the display surface, with the promise that13 * KMD will ensure transient cache entries are always flushed by the time we do14 * the display flip, since display engine is never coherent with CPU/GPU caches.15 */16 17struct drm_i915_private;18 19#ifdef I91520static inline void intel_td_flush(struct drm_i915_private *i915) {}21#else22void intel_td_flush(struct drm_i915_private *i915);23#endif24 25#endif26