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1/*2 * SPDX-License-Identifier: MIT3 *4 * Copyright © 2014-2016 Intel Corporation5 */6 7#include <linux/dma-fence-array.h>8 9#include "gt/intel_engine.h"10 11#include "i915_gem_ioctls.h"12#include "i915_gem_object.h"13 14static __always_inline u32 __busy_read_flag(u16 id)15{16 if (id == (u16)I915_ENGINE_CLASS_INVALID)17 return 0xffff0000u;18 19 GEM_BUG_ON(id >= 16);20 return 0x10000u << id;21}22 23static __always_inline u32 __busy_write_id(u16 id)24{25 /*26 * The uABI guarantees an active writer is also amongst the read27 * engines. This would be true if we accessed the activity tracking28 * under the lock, but as we perform the lookup of the object and29 * its activity locklessly we can not guarantee that the last_write30 * being active implies that we have set the same engine flag from31 * last_read - hence we always set both read and write busy for32 * last_write.33 */34 if (id == (u16)I915_ENGINE_CLASS_INVALID)35 return 0xffffffffu;36 37 return (id + 1) | __busy_read_flag(id);38}39 40static __always_inline unsigned int41__busy_set_if_active(struct dma_fence *fence, u32 (*flag)(u16 id))42{43 const struct i915_request *rq;44 45 /*46 * We have to check the current hw status of the fence as the uABI47 * guarantees forward progress. We could rely on the idle worker48 * to eventually flush us, but to minimise latency just ask the49 * hardware.50 *51 * Note we only report on the status of native fences and we currently52 * have two native fences:53 *54 * 1. A composite fence (dma_fence_array) constructed of i915 requests55 * created during a parallel submission. In this case we deconstruct the56 * composite fence into individual i915 requests and check the status of57 * each request.58 *59 * 2. A single i915 request.60 */61 if (dma_fence_is_array(fence)) {62 struct dma_fence_array *array = to_dma_fence_array(fence);63 struct dma_fence **child = array->fences;64 unsigned int nchild = array->num_fences;65 66 do {67 struct dma_fence *current_fence = *child++;68 69 /* Not an i915 fence, can't be busy per above */70 if (!dma_fence_is_i915(current_fence) ||71 !test_bit(I915_FENCE_FLAG_COMPOSITE,72 ¤t_fence->flags)) {73 return 0;74 }75 76 rq = to_request(current_fence);77 if (!i915_request_completed(rq))78 return flag(rq->engine->uabi_class);79 } while (--nchild);80 81 /* All requests in array complete, not busy */82 return 0;83 } else {84 if (!dma_fence_is_i915(fence))85 return 0;86 87 rq = to_request(fence);88 if (i915_request_completed(rq))89 return 0;90 91 /* Beware type-expansion follies! */92 BUILD_BUG_ON(!typecheck(u16, rq->engine->uabi_class));93 return flag(rq->engine->uabi_class);94 }95}96 97static __always_inline unsigned int98busy_check_reader(struct dma_fence *fence)99{100 return __busy_set_if_active(fence, __busy_read_flag);101}102 103static __always_inline unsigned int104busy_check_writer(struct dma_fence *fence)105{106 if (!fence)107 return 0;108 109 return __busy_set_if_active(fence, __busy_write_id);110}111 112int113i915_gem_busy_ioctl(struct drm_device *dev, void *data,114 struct drm_file *file)115{116 struct drm_i915_gem_busy *args = data;117 struct drm_i915_gem_object *obj;118 struct dma_resv_iter cursor;119 struct dma_fence *fence;120 int err;121 122 err = -ENOENT;123 rcu_read_lock();124 obj = i915_gem_object_lookup_rcu(file, args->handle);125 if (!obj)126 goto out;127 128 /*129 * A discrepancy here is that we do not report the status of130 * non-i915 fences, i.e. even though we may report the object as idle,131 * a call to set-domain may still stall waiting for foreign rendering.132 * This also means that wait-ioctl may report an object as busy,133 * where busy-ioctl considers it idle.134 *135 * We trade the ability to warn of foreign fences to report on which136 * i915 engines are active for the object.137 *138 * Alternatively, we can trade that extra information on read/write139 * activity with140 * args->busy =141 * !dma_resv_test_signaled(obj->resv, DMA_RESV_USAGE_READ);142 * to report the overall busyness. This is what the wait-ioctl does.143 *144 */145 args->busy = 0;146 dma_resv_iter_begin(&cursor, obj->base.resv, DMA_RESV_USAGE_READ);147 dma_resv_for_each_fence_unlocked(&cursor, fence) {148 if (dma_resv_iter_is_restarted(&cursor))149 args->busy = 0;150 151 if (dma_resv_iter_usage(&cursor) <= DMA_RESV_USAGE_WRITE)152 /* Translate the write fences to the READ *and* WRITE engine */153 args->busy |= busy_check_writer(fence);154 else155 /* Translate read fences to READ set of engines */156 args->busy |= busy_check_reader(fence);157 }158 dma_resv_iter_end(&cursor);159 160 err = 0;161out:162 rcu_read_unlock();163 return err;164}165