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1/* SPDX-License-Identifier: MIT */2/*3 * Copyright © 2016 Intel Corporation4 */5 6#ifndef __INTEL_GGTT_FENCING_H__7#define __INTEL_GGTT_FENCING_H__8 9#include <linux/list.h>10#include <linux/types.h>11 12#include "i915_active.h"13 14struct drm_i915_gem_object;15struct i915_ggtt;16struct i915_vma;17struct intel_gt;18struct sg_table;19 20#define I965_FENCE_PAGE 4096UL21 22struct i915_fence_reg {23 struct list_head link;24 struct i915_ggtt *ggtt;25 struct i915_vma *vma;26 atomic_t pin_count;27 struct i915_active active;28 int id;29 /**30 * Whether the tiling parameters for the currently31 * associated fence register have changed. Note that32 * for the purposes of tracking tiling changes we also33 * treat the unfenced register, the register slot that34 * the object occupies whilst it executes a fenced35 * command (such as BLT on gen2/3), as a "fence".36 */37 bool dirty;38 u32 start;39 u32 size;40 u32 tiling;41 u32 stride;42};43 44struct i915_fence_reg *i915_reserve_fence(struct i915_ggtt *ggtt);45void i915_unreserve_fence(struct i915_fence_reg *fence);46 47void intel_ggtt_restore_fences(struct i915_ggtt *ggtt);48 49void i915_gem_object_do_bit_17_swizzle(struct drm_i915_gem_object *obj,50 struct sg_table *pages);51void i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,52 struct sg_table *pages);53 54void intel_ggtt_init_fences(struct i915_ggtt *ggtt);55void intel_ggtt_fini_fences(struct i915_ggtt *ggtt);56 57void intel_gt_init_swizzling(struct intel_gt *gt);58 59#endif60