170 lines · c
1/*2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice (including the next12 * paragraph) shall be included in all copies or substantial portions of the13 * Software.14 *15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE21 * SOFTWARE.22 *23 * Authors:24 * Zhi Wang <zhi.a.wang@intel.com>25 *26 * Contributors:27 * Ping Gao <ping.a.gao@intel.com>28 * Tina Zhang <tina.zhang@intel.com>29 * Chanbin Du <changbin.du@intel.com>30 * Min He <min.he@intel.com>31 * Bing Niu <bing.niu@intel.com>32 * Zhenyu Wang <zhenyuw@linux.intel.com>33 *34 */35 36#ifndef _GVT_SCHEDULER_H_37#define _GVT_SCHEDULER_H_38 39#include "gt/intel_engine_types.h"40 41#include "execlist.h"42#include "interrupt.h"43 44struct intel_gvt_workload_scheduler {45 struct intel_vgpu *current_vgpu;46 struct intel_vgpu *next_vgpu;47 struct intel_vgpu_workload *current_workload[I915_NUM_ENGINES];48 bool need_reschedule;49 50 spinlock_t mmio_context_lock;51 /* can be null when owner is host */52 struct intel_vgpu *engine_owner[I915_NUM_ENGINES];53 54 wait_queue_head_t workload_complete_wq;55 struct task_struct *thread[I915_NUM_ENGINES];56 wait_queue_head_t waitq[I915_NUM_ENGINES];57 58 void *sched_data;59 const struct intel_gvt_sched_policy_ops *sched_ops;60};61 62#define INDIRECT_CTX_ADDR_MASK 0xffffffc063#define INDIRECT_CTX_SIZE_MASK 0x3f64struct shadow_indirect_ctx {65 struct drm_i915_gem_object *obj;66 unsigned long guest_gma;67 unsigned long shadow_gma;68 void *shadow_va;69 u32 size;70};71 72#define PER_CTX_ADDR_MASK 0xfffff00073struct shadow_per_ctx {74 unsigned long guest_gma;75 unsigned long shadow_gma;76 unsigned valid;77};78 79struct intel_shadow_wa_ctx {80 struct shadow_indirect_ctx indirect_ctx;81 struct shadow_per_ctx per_ctx;82 83};84 85struct intel_vgpu_workload {86 struct intel_vgpu *vgpu;87 const struct intel_engine_cs *engine;88 struct i915_request *req;89 /* if this workload has been dispatched to i915? */90 bool dispatched;91 bool shadow; /* if workload has done shadow of guest request */92 int status;93 94 struct intel_vgpu_mm *shadow_mm;95 struct list_head lri_shadow_mm; /* For PPGTT load cmd */96 97 /* different submission model may need different handler */98 int (*prepare)(struct intel_vgpu_workload *);99 int (*complete)(struct intel_vgpu_workload *);100 struct list_head list;101 102 DECLARE_BITMAP(pending_events, INTEL_GVT_EVENT_MAX);103 void *shadow_ring_buffer_va;104 105 /* execlist context information */106 struct execlist_ctx_descriptor_format ctx_desc;107 unsigned long rb_head, rb_tail, rb_ctl, rb_start, rb_len;108 unsigned long guest_rb_head;109 struct intel_vgpu_elsp_dwords elsp_dwords;110 bool emulate_schedule_in;111 atomic_t shadow_ctx_active;112 wait_queue_head_t shadow_ctx_status_wq;113 u64 ring_context_gpa;114 115 /* shadow batch buffer */116 struct list_head shadow_bb;117 struct intel_shadow_wa_ctx wa_ctx;118 119 /* oa registers */120 u32 oactxctrl;121 u32 flex_mmio[7];122};123 124struct intel_vgpu_shadow_bb {125 struct list_head list;126 struct drm_i915_gem_object *obj;127 struct i915_vma *vma;128 void *va;129 u32 *bb_start_cmd_va;130 unsigned long bb_offset;131 bool ppgtt;132};133 134#define workload_q_head(vgpu, e) \135 (&(vgpu)->submission.workload_q_head[(e)->id])136 137void intel_vgpu_queue_workload(struct intel_vgpu_workload *workload);138 139int intel_gvt_init_workload_scheduler(struct intel_gvt *gvt);140 141void intel_gvt_clean_workload_scheduler(struct intel_gvt *gvt);142 143void intel_gvt_wait_vgpu_idle(struct intel_vgpu *vgpu);144 145int intel_vgpu_setup_submission(struct intel_vgpu *vgpu);146 147void intel_vgpu_reset_submission(struct intel_vgpu *vgpu,148 intel_engine_mask_t engine_mask);149 150void intel_vgpu_clean_submission(struct intel_vgpu *vgpu);151 152int intel_vgpu_select_submission_ops(struct intel_vgpu *vgpu,153 intel_engine_mask_t engine_mask,154 unsigned int interface);155 156extern const struct intel_vgpu_submission_ops157intel_vgpu_execlist_submission_ops;158 159struct intel_vgpu_workload *160intel_vgpu_create_workload(struct intel_vgpu *vgpu,161 const struct intel_engine_cs *engine,162 struct execlist_ctx_descriptor_format *desc);163 164void intel_vgpu_destroy_workload(struct intel_vgpu_workload *workload);165 166void intel_vgpu_clean_workloads(struct intel_vgpu *vgpu,167 intel_engine_mask_t engine_mask);168 169#endif170