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1/* SPDX-License-Identifier: MIT */2/*3 * Copyright © 2019 Intel Corporation4 */5 6#ifndef __I915_IRQ_H__7#define __I915_IRQ_H__8 9#include <linux/ktime.h>10#include <linux/types.h>11 12#include "i915_reg_defs.h"13 14enum pipe;15struct drm_crtc;16struct drm_device;17struct drm_display_mode;18struct drm_i915_private;19struct intel_crtc;20struct intel_encoder;21struct intel_uncore;22 23void intel_irq_init(struct drm_i915_private *dev_priv);24void intel_irq_fini(struct drm_i915_private *dev_priv);25int intel_irq_install(struct drm_i915_private *dev_priv);26void intel_irq_uninstall(struct drm_i915_private *dev_priv);27 28void gen5_enable_gt_irq(struct drm_i915_private *dev_priv, u32 mask);29void gen5_disable_gt_irq(struct drm_i915_private *dev_priv, u32 mask);30void gen11_reset_rps_interrupts(struct drm_i915_private *dev_priv);31void gen6_reset_rps_interrupts(struct drm_i915_private *dev_priv);32void gen6_enable_rps_interrupts(struct drm_i915_private *dev_priv);33void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv);34void gen6_rps_reset_ei(struct drm_i915_private *dev_priv);35u32 gen6_sanitize_rps_pm_mask(const struct drm_i915_private *i915, u32 mask);36 37void intel_runtime_pm_disable_interrupts(struct drm_i915_private *dev_priv);38void intel_runtime_pm_enable_interrupts(struct drm_i915_private *dev_priv);39bool intel_irqs_enabled(struct drm_i915_private *dev_priv);40void intel_synchronize_irq(struct drm_i915_private *i915);41void intel_synchronize_hardirq(struct drm_i915_private *i915);42 43void gen3_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg);44 45void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr,46 i915_reg_t iir, i915_reg_t ier);47 48void gen3_irq_init(struct intel_uncore *uncore,49 i915_reg_t imr, u32 imr_val,50 i915_reg_t ier, u32 ier_val,51 i915_reg_t iir);52 53#define GEN8_IRQ_RESET_NDX(uncore, type, which) \54({ \55 unsigned int which_ = which; \56 gen3_irq_reset((uncore), GEN8_##type##_IMR(which_), \57 GEN8_##type##_IIR(which_), GEN8_##type##_IER(which_)); \58})59 60#define GEN3_IRQ_RESET(uncore, type) \61 gen3_irq_reset((uncore), type##IMR, type##IIR, type##IER)62 63#define GEN8_IRQ_INIT_NDX(uncore, type, which, imr_val, ier_val) \64({ \65 unsigned int which_ = which; \66 gen3_irq_init((uncore), \67 GEN8_##type##_IMR(which_), imr_val, \68 GEN8_##type##_IER(which_), ier_val, \69 GEN8_##type##_IIR(which_)); \70})71 72#define GEN3_IRQ_INIT(uncore, type, imr_val, ier_val) \73 gen3_irq_init((uncore), \74 type##IMR, imr_val, \75 type##IER, ier_val, \76 type##IIR)77 78#endif /* __I915_IRQ_H__ */79