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1// SPDX-License-Identifier: GPL-2.0-or-later2/*3 * Copyright (C) 2016 BayLibre, SAS4 * Author: Neil Armstrong <narmstrong@baylibre.com>5 * Copyright (C) 2015 Amlogic, Inc. All rights reserved.6 */7 8#include <linux/clk.h>9#include <linux/component.h>10#include <linux/kernel.h>11#include <linux/module.h>12#include <linux/of.h>13#include <linux/of_graph.h>14#include <linux/of_platform.h>15#include <linux/platform_device.h>16#include <linux/regulator/consumer.h>17#include <linux/reset.h>18 19#include <media/cec-notifier.h>20 21#include <drm/drm_atomic_helper.h>22#include <drm/drm_bridge.h>23#include <drm/drm_bridge_connector.h>24#include <drm/drm_device.h>25#include <drm/drm_edid.h>26#include <drm/drm_probe_helper.h>27#include <drm/drm_simple_kms_helper.h>28 29#include <linux/media-bus-format.h>30#include <linux/videodev2.h>31 32#include "meson_drv.h"33#include "meson_registers.h"34#include "meson_vclk.h"35#include "meson_venc.h"36#include "meson_encoder_hdmi.h"37 38struct meson_encoder_hdmi {39 struct drm_encoder encoder;40 struct drm_bridge bridge;41 struct drm_bridge *next_bridge;42 struct drm_connector *connector;43 struct meson_drm *priv;44 unsigned long output_bus_fmt;45 struct cec_notifier *cec_notifier;46};47 48#define bridge_to_meson_encoder_hdmi(x) \49 container_of(x, struct meson_encoder_hdmi, bridge)50 51static int meson_encoder_hdmi_attach(struct drm_bridge *bridge,52 enum drm_bridge_attach_flags flags)53{54 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);55 56 return drm_bridge_attach(bridge->encoder, encoder_hdmi->next_bridge,57 &encoder_hdmi->bridge, flags);58}59 60static void meson_encoder_hdmi_detach(struct drm_bridge *bridge)61{62 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);63 64 cec_notifier_conn_unregister(encoder_hdmi->cec_notifier);65 encoder_hdmi->cec_notifier = NULL;66}67 68static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,69 const struct drm_display_mode *mode)70{71 struct meson_drm *priv = encoder_hdmi->priv;72 int vic = drm_match_cea_mode(mode);73 unsigned int phy_freq;74 unsigned int vclk_freq;75 unsigned int venc_freq;76 unsigned int hdmi_freq;77 78 vclk_freq = mode->clock;79 80 /* For 420, pixel clock is half unlike venc clock */81 if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)82 vclk_freq /= 2;83 84 /* TMDS clock is pixel_clock * 10 */85 phy_freq = vclk_freq * 10;86 87 if (!vic) {88 meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq,89 vclk_freq, vclk_freq, vclk_freq, false);90 return;91 }92 93 /* 480i/576i needs global pixel doubling */94 if (mode->flags & DRM_MODE_FLAG_DBLCLK)95 vclk_freq *= 2;96 97 venc_freq = vclk_freq;98 hdmi_freq = vclk_freq;99 100 /* VENC double pixels for 1080i, 720p and YUV420 modes */101 if (meson_venc_hdmi_venc_repeat(vic) ||102 encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)103 venc_freq *= 2;104 105 vclk_freq = max(venc_freq, hdmi_freq);106 107 if (mode->flags & DRM_MODE_FLAG_DBLCLK)108 venc_freq /= 2;109 110 dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n",111 phy_freq, vclk_freq, venc_freq, hdmi_freq,112 priv->venc.hdmi_use_enci);113 114 meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq, vclk_freq,115 venc_freq, hdmi_freq, priv->venc.hdmi_use_enci);116}117 118static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bridge,119 const struct drm_display_info *display_info,120 const struct drm_display_mode *mode)121{122 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);123 struct meson_drm *priv = encoder_hdmi->priv;124 bool is_hdmi2_sink = display_info->hdmi.scdc.supported;125 unsigned int phy_freq;126 unsigned int vclk_freq;127 unsigned int venc_freq;128 unsigned int hdmi_freq;129 int vic = drm_match_cea_mode(mode);130 enum drm_mode_status status;131 132 dev_dbg(priv->dev, "Modeline " DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));133 134 /* If sink does not support 540MHz, reject the non-420 HDMI2 modes */135 if (display_info->max_tmds_clock &&136 mode->clock > display_info->max_tmds_clock &&137 !drm_mode_is_420_only(display_info, mode) &&138 !drm_mode_is_420_also(display_info, mode))139 return MODE_BAD;140 141 /* Check against non-VIC supported modes */142 if (!vic) {143 status = meson_venc_hdmi_supported_mode(mode);144 if (status != MODE_OK)145 return status;146 147 return meson_vclk_dmt_supported_freq(priv, mode->clock);148 /* Check against supported VIC modes */149 } else if (!meson_venc_hdmi_supported_vic(vic))150 return MODE_BAD;151 152 vclk_freq = mode->clock;153 154 /* For 420, pixel clock is half unlike venc clock */155 if (drm_mode_is_420_only(display_info, mode) ||156 (!is_hdmi2_sink &&157 drm_mode_is_420_also(display_info, mode)))158 vclk_freq /= 2;159 160 /* TMDS clock is pixel_clock * 10 */161 phy_freq = vclk_freq * 10;162 163 /* 480i/576i needs global pixel doubling */164 if (mode->flags & DRM_MODE_FLAG_DBLCLK)165 vclk_freq *= 2;166 167 venc_freq = vclk_freq;168 hdmi_freq = vclk_freq;169 170 /* VENC double pixels for 1080i, 720p and YUV420 modes */171 if (meson_venc_hdmi_venc_repeat(vic) ||172 drm_mode_is_420_only(display_info, mode) ||173 (!is_hdmi2_sink &&174 drm_mode_is_420_also(display_info, mode)))175 venc_freq *= 2;176 177 vclk_freq = max(venc_freq, hdmi_freq);178 179 if (mode->flags & DRM_MODE_FLAG_DBLCLK)180 venc_freq /= 2;181 182 dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",183 __func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);184 185 return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq);186}187 188static void meson_encoder_hdmi_atomic_enable(struct drm_bridge *bridge,189 struct drm_bridge_state *bridge_state)190{191 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);192 struct drm_atomic_state *state = bridge_state->base.state;193 unsigned int ycrcb_map = VPU_HDMI_OUTPUT_CBYCR;194 struct meson_drm *priv = encoder_hdmi->priv;195 struct drm_connector_state *conn_state;196 const struct drm_display_mode *mode;197 struct drm_crtc_state *crtc_state;198 struct drm_connector *connector;199 bool yuv420_mode = false;200 int vic;201 202 connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder);203 if (WARN_ON(!connector))204 return;205 206 conn_state = drm_atomic_get_new_connector_state(state, connector);207 if (WARN_ON(!conn_state))208 return;209 210 crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);211 if (WARN_ON(!crtc_state))212 return;213 214 mode = &crtc_state->adjusted_mode;215 216 vic = drm_match_cea_mode(mode);217 218 dev_dbg(priv->dev, "\"%s\" vic %d\n", mode->name, vic);219 220 if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) {221 ycrcb_map = VPU_HDMI_OUTPUT_CRYCB;222 yuv420_mode = true;223 } else if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16)224 ycrcb_map = VPU_HDMI_OUTPUT_CRYCB;225 226 /* VENC + VENC-DVI Mode setup */227 meson_venc_hdmi_mode_set(priv, vic, ycrcb_map, yuv420_mode, mode);228 229 /* VCLK Set clock */230 meson_encoder_hdmi_set_vclk(encoder_hdmi, mode);231 232 if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)233 /* Setup YUV420 to HDMI-TX, no 10bit diphering */234 writel_relaxed(2 | (2 << 2),235 priv->io_base + _REG(VPU_HDMI_FMT_CTRL));236 else if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16)237 /* Setup YUV422 to HDMI-TX, no 10bit diphering */238 writel_relaxed(1 | (2 << 2),239 priv->io_base + _REG(VPU_HDMI_FMT_CTRL));240 else241 /* Setup YUV444 to HDMI-TX, no 10bit diphering */242 writel_relaxed(0, priv->io_base + _REG(VPU_HDMI_FMT_CTRL));243 244 dev_dbg(priv->dev, "%s\n", priv->venc.hdmi_use_enci ? "VENCI" : "VENCP");245 246 if (priv->venc.hdmi_use_enci)247 writel_relaxed(1, priv->io_base + _REG(ENCI_VIDEO_EN));248 else249 writel_relaxed(1, priv->io_base + _REG(ENCP_VIDEO_EN));250}251 252static void meson_encoder_hdmi_atomic_disable(struct drm_bridge *bridge,253 struct drm_bridge_state *bridge_state)254{255 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);256 struct meson_drm *priv = encoder_hdmi->priv;257 258 writel_bits_relaxed(0x3, 0,259 priv->io_base + _REG(VPU_HDMI_SETTING));260 261 writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_EN));262 writel_relaxed(0, priv->io_base + _REG(ENCP_VIDEO_EN));263}264 265static const u32 meson_encoder_hdmi_out_bus_fmts[] = {266 MEDIA_BUS_FMT_YUV8_1X24,267 MEDIA_BUS_FMT_UYVY8_1X16,268 MEDIA_BUS_FMT_UYYVYY8_0_5X24,269};270 271static u32 *272meson_encoder_hdmi_get_inp_bus_fmts(struct drm_bridge *bridge,273 struct drm_bridge_state *bridge_state,274 struct drm_crtc_state *crtc_state,275 struct drm_connector_state *conn_state,276 u32 output_fmt,277 unsigned int *num_input_fmts)278{279 u32 *input_fmts = NULL;280 int i;281 282 *num_input_fmts = 0;283 284 for (i = 0 ; i < ARRAY_SIZE(meson_encoder_hdmi_out_bus_fmts) ; ++i) {285 if (output_fmt == meson_encoder_hdmi_out_bus_fmts[i]) {286 *num_input_fmts = 1;287 input_fmts = kcalloc(*num_input_fmts,288 sizeof(*input_fmts),289 GFP_KERNEL);290 if (!input_fmts)291 return NULL;292 293 input_fmts[0] = output_fmt;294 295 break;296 }297 }298 299 return input_fmts;300}301 302static int meson_encoder_hdmi_atomic_check(struct drm_bridge *bridge,303 struct drm_bridge_state *bridge_state,304 struct drm_crtc_state *crtc_state,305 struct drm_connector_state *conn_state)306{307 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);308 struct drm_connector_state *old_conn_state =309 drm_atomic_get_old_connector_state(conn_state->state, conn_state->connector);310 struct meson_drm *priv = encoder_hdmi->priv;311 312 encoder_hdmi->output_bus_fmt = bridge_state->output_bus_cfg.format;313 314 dev_dbg(priv->dev, "output_bus_fmt %lx\n", encoder_hdmi->output_bus_fmt);315 316 if (!drm_connector_atomic_hdr_metadata_equal(old_conn_state, conn_state))317 crtc_state->mode_changed = true;318 319 return 0;320}321 322static void meson_encoder_hdmi_hpd_notify(struct drm_bridge *bridge,323 enum drm_connector_status status)324{325 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);326 327 if (!encoder_hdmi->cec_notifier)328 return;329 330 if (status == connector_status_connected) {331 const struct drm_edid *drm_edid;332 const struct edid *edid;333 334 drm_edid = drm_bridge_edid_read(encoder_hdmi->next_bridge,335 encoder_hdmi->connector);336 if (!drm_edid)337 return;338 339 /*340 * FIXME: The CEC physical address should be set using341 * cec_notifier_set_phys_addr(encoder_hdmi->cec_notifier,342 * connector->display_info.source_physical_address) from a path343 * that has read the EDID and called344 * drm_edid_connector_update().345 */346 edid = drm_edid_raw(drm_edid);347 348 cec_notifier_set_phys_addr_from_edid(encoder_hdmi->cec_notifier, edid);349 350 drm_edid_free(drm_edid);351 } else352 cec_notifier_phys_addr_invalidate(encoder_hdmi->cec_notifier);353}354 355static const struct drm_bridge_funcs meson_encoder_hdmi_bridge_funcs = {356 .attach = meson_encoder_hdmi_attach,357 .detach = meson_encoder_hdmi_detach,358 .mode_valid = meson_encoder_hdmi_mode_valid,359 .hpd_notify = meson_encoder_hdmi_hpd_notify,360 .atomic_enable = meson_encoder_hdmi_atomic_enable,361 .atomic_disable = meson_encoder_hdmi_atomic_disable,362 .atomic_get_input_bus_fmts = meson_encoder_hdmi_get_inp_bus_fmts,363 .atomic_check = meson_encoder_hdmi_atomic_check,364 .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,365 .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,366 .atomic_reset = drm_atomic_helper_bridge_reset,367};368 369int meson_encoder_hdmi_probe(struct meson_drm *priv)370{371 struct meson_encoder_hdmi *meson_encoder_hdmi;372 struct platform_device *pdev;373 struct device_node *remote;374 int ret;375 376 meson_encoder_hdmi = devm_kzalloc(priv->dev, sizeof(*meson_encoder_hdmi), GFP_KERNEL);377 if (!meson_encoder_hdmi)378 return -ENOMEM;379 380 /* HDMI Transceiver Bridge */381 remote = of_graph_get_remote_node(priv->dev->of_node, 1, 0);382 if (!remote) {383 dev_err(priv->dev, "HDMI transceiver device is disabled");384 return 0;385 }386 387 meson_encoder_hdmi->next_bridge = of_drm_find_bridge(remote);388 if (!meson_encoder_hdmi->next_bridge) {389 ret = dev_err_probe(priv->dev, -EPROBE_DEFER,390 "Failed to find HDMI transceiver bridge\n");391 goto err_put_node;392 }393 394 /* HDMI Encoder Bridge */395 meson_encoder_hdmi->bridge.funcs = &meson_encoder_hdmi_bridge_funcs;396 meson_encoder_hdmi->bridge.of_node = priv->dev->of_node;397 meson_encoder_hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;398 meson_encoder_hdmi->bridge.interlace_allowed = true;399 400 drm_bridge_add(&meson_encoder_hdmi->bridge);401 402 meson_encoder_hdmi->priv = priv;403 404 /* Encoder */405 ret = drm_simple_encoder_init(priv->drm, &meson_encoder_hdmi->encoder,406 DRM_MODE_ENCODER_TMDS);407 if (ret) {408 dev_err_probe(priv->dev, ret, "Failed to init HDMI encoder\n");409 goto err_put_node;410 }411 412 meson_encoder_hdmi->encoder.possible_crtcs = BIT(0);413 414 /* Attach HDMI Encoder Bridge to Encoder */415 ret = drm_bridge_attach(&meson_encoder_hdmi->encoder, &meson_encoder_hdmi->bridge, NULL,416 DRM_BRIDGE_ATTACH_NO_CONNECTOR);417 if (ret) {418 dev_err_probe(priv->dev, ret, "Failed to attach bridge\n");419 goto err_put_node;420 }421 422 /* Initialize & attach Bridge Connector */423 meson_encoder_hdmi->connector = drm_bridge_connector_init(priv->drm,424 &meson_encoder_hdmi->encoder);425 if (IS_ERR(meson_encoder_hdmi->connector)) {426 ret = dev_err_probe(priv->dev,427 PTR_ERR(meson_encoder_hdmi->connector),428 "Unable to create HDMI bridge connector\n");429 goto err_put_node;430 }431 drm_connector_attach_encoder(meson_encoder_hdmi->connector,432 &meson_encoder_hdmi->encoder);433 434 /*435 * We should have now in place:436 * encoder->[hdmi encoder bridge]->[dw-hdmi bridge]->[display connector bridge]->[display connector]437 */438 439 /*440 * drm_connector_attach_max_bpc_property() requires the441 * connector to have a state.442 */443 drm_atomic_helper_connector_reset(meson_encoder_hdmi->connector);444 445 if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL) ||446 meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||447 meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))448 drm_connector_attach_hdr_output_metadata_property(meson_encoder_hdmi->connector);449 450 drm_connector_attach_max_bpc_property(meson_encoder_hdmi->connector, 8, 8);451 452 /* Handle this here until handled by drm_bridge_connector_init() */453 meson_encoder_hdmi->connector->ycbcr_420_allowed = true;454 455 pdev = of_find_device_by_node(remote);456 of_node_put(remote);457 if (pdev) {458 struct cec_connector_info conn_info;459 struct cec_notifier *notifier;460 461 cec_fill_conn_info_from_drm(&conn_info, meson_encoder_hdmi->connector);462 463 notifier = cec_notifier_conn_register(&pdev->dev, NULL, &conn_info);464 if (!notifier) {465 put_device(&pdev->dev);466 return -ENOMEM;467 }468 469 meson_encoder_hdmi->cec_notifier = notifier;470 }471 472 priv->encoders[MESON_ENC_HDMI] = meson_encoder_hdmi;473 474 dev_dbg(priv->dev, "HDMI encoder initialized\n");475 476 return 0;477 478err_put_node:479 of_node_put(remote);480 return ret;481}482 483void meson_encoder_hdmi_remove(struct meson_drm *priv)484{485 struct meson_encoder_hdmi *meson_encoder_hdmi;486 487 if (priv->encoders[MESON_ENC_HDMI]) {488 meson_encoder_hdmi = priv->encoders[MESON_ENC_HDMI];489 drm_bridge_remove(&meson_encoder_hdmi->bridge);490 }491}492