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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * MGA Millennium (MGA2064W) functions4 * MGA Mystique (MGA1064SG) functions5 *6 * Copyright 1996 The XFree86 Project, Inc.7 *8 * Authors9 * Dirk Hohndel10 * hohndel@XFree86.Org11 * David Dawes12 * dawes@XFree86.Org13 * Contributors:14 * Guy DESBIEF, Aix-en-provence, France15 * g.desbief@aix.pacwan.net16 * MGA1064SG Mystique register file17 */18 19#ifndef _MGA_REG_H_20#define _MGA_REG_H_21 22#include <linux/bits.h>23 24#define MGAREG_DWGCTL 0x1c0025#define MGAREG_MACCESS 0x1c0426/* the following is a mystique only register */27#define MGAREG_MCTLWTST 0x1c0828#define MGAREG_ZORG 0x1c0c29 30#define MGAREG_PAT0 0x1c1031#define MGAREG_PAT1 0x1c1432#define MGAREG_PLNWT 0x1c1c33 34#define MGAREG_BCOL 0x1c2035#define MGAREG_FCOL 0x1c2436 37#define MGAREG_SRC0 0x1c3038#define MGAREG_SRC1 0x1c3439#define MGAREG_SRC2 0x1c3840#define MGAREG_SRC3 0x1c3c41 42#define MGAREG_XYSTRT 0x1c4043#define MGAREG_XYEND 0x1c4444 45#define MGAREG_SHIFT 0x1c5046/* the following is a mystique only register */47#define MGAREG_DMAPAD 0x1c5448#define MGAREG_SGN 0x1c5849#define MGAREG_LEN 0x1c5c50 51#define MGAREG_AR0 0x1c6052#define MGAREG_AR1 0x1c6453#define MGAREG_AR2 0x1c6854#define MGAREG_AR3 0x1c6c55#define MGAREG_AR4 0x1c7056#define MGAREG_AR5 0x1c7457#define MGAREG_AR6 0x1c7858 59#define MGAREG_CXBNDRY 0x1c8060#define MGAREG_FXBNDRY 0x1c8461#define MGAREG_YDSTLEN 0x1c8862#define MGAREG_PITCH 0x1c8c63 64#define MGAREG_YDST 0x1c9065#define MGAREG_YDSTORG 0x1c9466#define MGAREG_YTOP 0x1c9867#define MGAREG_YBOT 0x1c9c68 69#define MGAREG_CXLEFT 0x1ca070#define MGAREG_CXRIGHT 0x1ca471#define MGAREG_FXLEFT 0x1ca872#define MGAREG_FXRIGHT 0x1cac73 74#define MGAREG_XDST 0x1cb075 76#define MGAREG_DR0 0x1cc077#define MGAREG_DR1 0x1cc478#define MGAREG_DR2 0x1cc879#define MGAREG_DR3 0x1ccc80 81#define MGAREG_DR4 0x1cd082#define MGAREG_DR5 0x1cd483#define MGAREG_DR6 0x1cd884#define MGAREG_DR7 0x1cdc85 86#define MGAREG_DR8 0x1ce087#define MGAREG_DR9 0x1ce488#define MGAREG_DR10 0x1ce889#define MGAREG_DR11 0x1cec90 91#define MGAREG_DR12 0x1cf092#define MGAREG_DR13 0x1cf493#define MGAREG_DR14 0x1cf894#define MGAREG_DR15 0x1cfc95 96#define MGAREG_SRCORG 0x2cb497#define MGAREG_DSTORG 0x2cb898 99/* add or this to one of the previous "power registers" to start100 the drawing engine */101 102#define MGAREG_EXEC 0x0100103 104#define MGAREG_FIFOSTATUS 0x1e10105 106#define MGAREG_STATUS 0x1e14107#define MGAREG_STATUS_VLINEPEN BIT(5)108 109#define MGAREG_CACHEFLUSH 0x1fff110 111#define MGAREG_ICLEAR 0x1e18112#define MGAREG_ICLEAR_VLINEICLR BIT(5)113 114#define MGAREG_IEN 0x1e1c115#define MGAREG_IEN_VLINEIEN BIT(5)116 117#define MGAREG_VCOUNT 0x1e20118 119#define MGAREG_Reset 0x1e40120 121#define MGAREG_OPMODE 0x1e54122 123/* Warp Registers */124#define MGAREG_WIADDR 0x1dc0125#define MGAREG_WIADDR2 0x1dd8126#define MGAREG_WGETMSB 0x1dc8127#define MGAREG_WVRTXSZ 0x1dcc128#define MGAREG_WACCEPTSEQ 0x1dd4129#define MGAREG_WMISC 0x1e70130 131#define MGAREG_MEMCTL 0x2e08132 133/* OPMODE register additives */134 135#define MGAOPM_DMA_GENERAL (0x00 << 2)136#define MGAOPM_DMA_BLIT (0x01 << 2)137#define MGAOPM_DMA_VECTOR (0x10 << 2)138 139/* MACCESS register additives */140#define MGAMAC_PW8 0x00141#define MGAMAC_PW16 0x01142#define MGAMAC_PW24 0x03 /* not a typo */143#define MGAMAC_PW32 0x02 /* not a typo */144#define MGAMAC_BYPASS332 0x10000000145#define MGAMAC_NODITHER 0x40000000146#define MGAMAC_DIT555 0x80000000147 148/* DWGCTL register additives */149 150/* Lines */151 152#define MGADWG_LINE_OPEN 0x00153#define MGADWG_AUTOLINE_OPEN 0x01154#define MGADWG_LINE_CLOSE 0x02155#define MGADWG_AUTOLINE_CLOSE 0x03156 157/* Trapezoids */158#define MGADWG_TRAP 0x04159#define MGADWG_TEXTURE_TRAP 0x06160 161/* BitBlts */162 163#define MGADWG_BITBLT 0x08164#define MGADWG_FBITBLT 0x0c165#define MGADWG_ILOAD 0x09166#define MGADWG_ILOAD_SCALE 0x0d167#define MGADWG_ILOAD_FILTER 0x0f168#define MGADWG_ILOAD_HIQH 0x07169#define MGADWG_ILOAD_HIQHV 0x0e170#define MGADWG_IDUMP 0x0a171 172/* atype access to WRAM */173 174#define MGADWG_RPL ( 0x00 << 4 )175#define MGADWG_RSTR ( 0x01 << 4 )176#define MGADWG_ZI ( 0x03 << 4 )177#define MGADWG_BLK ( 0x04 << 4 )178#define MGADWG_I ( 0x07 << 4 )179 180/* specifies whether bit blits are linear or xy */181#define MGADWG_LINEAR ( 0x01 << 7 )182 183/* z drawing mode. use MGADWG_NOZCMP for always */184 185#define MGADWG_NOZCMP ( 0x00 << 8 )186#define MGADWG_ZE ( 0x02 << 8 )187#define MGADWG_ZNE ( 0x03 << 8 )188#define MGADWG_ZLT ( 0x04 << 8 )189#define MGADWG_ZLTE ( 0x05 << 8 )190#define MGADWG_GT ( 0x06 << 8 )191#define MGADWG_GTE ( 0x07 << 8 )192 193/* use this to force colour expansion circuitry to do its stuff */194 195#define MGADWG_SOLID ( 0x01 << 11 )196 197/* ar register at zero */198 199#define MGADWG_ARZERO ( 0x01 << 12 )200 201#define MGADWG_SGNZERO ( 0x01 << 13 )202 203#define MGADWG_SHIFTZERO ( 0x01 << 14 )204 205/* See table on 4-43 for bop ALU operations */206 207/* See table on 4-44 for translucidity masks */208 209#define MGADWG_BMONOLEF ( 0x00 << 25 )210#define MGADWG_BMONOWF ( 0x04 << 25 )211#define MGADWG_BPLAN ( 0x01 << 25 )212 213/* note that if bfcol is specified and you're doing a bitblt, it causes214 a fbitblt to be performed, so check that you obey the fbitblt rules */215 216#define MGADWG_BFCOL ( 0x02 << 25 )217#define MGADWG_BUYUV ( 0x0e << 25 )218#define MGADWG_BU32BGR ( 0x03 << 25 )219#define MGADWG_BU32RGB ( 0x07 << 25 )220#define MGADWG_BU24BGR ( 0x0b << 25 )221#define MGADWG_BU24RGB ( 0x0f << 25 )222 223#define MGADWG_PATTERN ( 0x01 << 29 )224#define MGADWG_TRANSC ( 0x01 << 30 )225#define MGAREG_MISC_WRITE 0x3c2226#define MGAREG_MISC_READ 0x3cc227#define MGAREG_MEM_MISC_WRITE 0x1fc2228#define MGAREG_MEM_MISC_READ 0x1fcc229 230#define MGAREG_MISC_IOADSEL (0x1 << 0)231#define MGAREG_MISC_RAMMAPEN (0x1 << 1)232#define MGAREG_MISC_CLKSEL_MASK GENMASK(3, 2)233#define MGAREG_MISC_CLKSEL_VGA25 (0x0 << 2)234#define MGAREG_MISC_CLKSEL_VGA28 (0x1 << 2)235#define MGAREG_MISC_CLKSEL_MGA (0x3 << 2)236#define MGAREG_MISC_VIDEO_DIS (0x1 << 4)237#define MGAREG_MISC_HIGH_PG_SEL (0x1 << 5)238#define MGAREG_MISC_HSYNCPOL BIT(6)239#define MGAREG_MISC_VSYNCPOL BIT(7)240 241/* MMIO VGA registers */242#define MGAREG_SEQ_INDEX 0x1fc4243#define MGAREG_SEQ_DATA 0x1fc5244 245#define MGAREG_SEQ0_ASYNCRST BIT(0)246#define MGAREG_SEQ0_SYNCRST BIT(1)247 248#define MGAREG_SEQ1_SCROFF BIT(5)249 250#define MGAREG_CRTC_INDEX 0x1fd4251#define MGAREG_CRTC_DATA 0x1fd5252 253#define MGAREG_CRTC11_VINTCLR BIT(4)254#define MGAREG_CRTC11_VINTEN BIT(5)255#define MGAREG_CRTC11_CRTCPROTECT BIT(7)256 257#define MGAREG_CRTCEXT_INDEX 0x1fde258#define MGAREG_CRTCEXT_DATA 0x1fdf259 260#define MGAREG_CRTCEXT0_OFFSET_MASK GENMASK(5, 4)261 262#define MGAREG_CRTCEXT1_VRSTEN BIT(7)263#define MGAREG_CRTCEXT1_VSYNCOFF BIT(5)264#define MGAREG_CRTCEXT1_HSYNCOFF BIT(4)265#define MGAREG_CRTCEXT1_HRSTEN BIT(3)266 267#define MGAREG_CRTCEXT3_MGAMODE BIT(7)268 269/* Cursor X and Y position */270#define MGA_CURPOSXL 0x3c0c271#define MGA_CURPOSXH 0x3c0d272#define MGA_CURPOSYL 0x3c0e273#define MGA_CURPOSYH 0x3c0f274 275/* MGA bits for registers PCI_OPTION_REG */276#define MGA1064_OPT_SYS_CLK_PCI ( 0x00 << 0 )277#define MGA1064_OPT_SYS_CLK_PLL ( 0x01 << 0 )278#define MGA1064_OPT_SYS_CLK_EXT ( 0x02 << 0 )279#define MGA1064_OPT_SYS_CLK_MSK ( 0x03 << 0 )280 281#define MGA1064_OPT_SYS_CLK_DIS ( 0x01 << 2 )282#define MGA1064_OPT_G_CLK_DIV_1 ( 0x01 << 3 )283#define MGA1064_OPT_M_CLK_DIV_1 ( 0x01 << 4 )284 285#define MGA1064_OPT_SYS_PLL_PDN ( 0x01 << 5 )286#define MGA1064_OPT_VGA_ION ( 0x01 << 8 )287 288/* MGA registers in PCI config space */289#define PCI_MGA_INDEX 0x44290#define PCI_MGA_DATA 0x48291#define PCI_MGA_OPTION 0x40292#define PCI_MGA_OPTION2 0x50293#define PCI_MGA_OPTION3 0x54294 295#define PCI_MGA_OPTION_HARDPWMSK BIT(14)296 297#define RAMDAC_OFFSET 0x3c00298 299/* TVP3026 direct registers */300 301#define TVP3026_INDEX 0x00302#define TVP3026_WADR_PAL 0x00303#define TVP3026_COL_PAL 0x01304#define TVP3026_PIX_RD_MSK 0x02305#define TVP3026_RADR_PAL 0x03306#define TVP3026_CUR_COL_ADDR 0x04307#define TVP3026_CUR_COL_DATA 0x05308#define TVP3026_DATA 0x0a309#define TVP3026_CUR_RAM 0x0b310#define TVP3026_CUR_XLOW 0x0c311#define TVP3026_CUR_XHI 0x0d312#define TVP3026_CUR_YLOW 0x0e313#define TVP3026_CUR_YHI 0x0f314 315/* TVP3026 indirect registers */316 317#define TVP3026_SILICON_REV 0x01318#define TVP3026_CURSOR_CTL 0x06319#define TVP3026_LATCH_CTL 0x0f320#define TVP3026_TRUE_COLOR_CTL 0x18321#define TVP3026_MUX_CTL 0x19322#define TVP3026_CLK_SEL 0x1a323#define TVP3026_PAL_PAGE 0x1c324#define TVP3026_GEN_CTL 0x1d325#define TVP3026_MISC_CTL 0x1e326#define TVP3026_GEN_IO_CTL 0x2a327#define TVP3026_GEN_IO_DATA 0x2b328#define TVP3026_PLL_ADDR 0x2c329#define TVP3026_PIX_CLK_DATA 0x2d330#define TVP3026_MEM_CLK_DATA 0x2e331#define TVP3026_LOAD_CLK_DATA 0x2f332#define TVP3026_KEY_RED_LOW 0x32333#define TVP3026_KEY_RED_HI 0x33334#define TVP3026_KEY_GREEN_LOW 0x34335#define TVP3026_KEY_GREEN_HI 0x35336#define TVP3026_KEY_BLUE_LOW 0x36337#define TVP3026_KEY_BLUE_HI 0x37338#define TVP3026_KEY_CTL 0x38339#define TVP3026_MCLK_CTL 0x39340#define TVP3026_SENSE_TEST 0x3a341#define TVP3026_TEST_DATA 0x3b342#define TVP3026_CRC_LSB 0x3c343#define TVP3026_CRC_MSB 0x3d344#define TVP3026_CRC_CTL 0x3e345#define TVP3026_ID 0x3f346#define TVP3026_RESET 0xff347 348 349/* MGA1064 DAC Register file */350/* MGA1064 direct registers */351 352#define MGA1064_INDEX 0x00353#define MGA1064_WADR_PAL 0x00354#define MGA1064_SPAREREG 0x00355#define MGA1064_COL_PAL 0x01356#define MGA1064_PIX_RD_MSK 0x02357#define MGA1064_RADR_PAL 0x03358#define MGA1064_DATA 0x0a359 360#define MGA1064_CUR_XLOW 0x0c361#define MGA1064_CUR_XHI 0x0d362#define MGA1064_CUR_YLOW 0x0e363#define MGA1064_CUR_YHI 0x0f364 365/* MGA1064 indirect registers */366#define MGA1064_DVI_PIPE_CTL 0x03367#define MGA1064_CURSOR_BASE_ADR_LOW 0x04368#define MGA1064_CURSOR_BASE_ADR_HI 0x05369#define MGA1064_CURSOR_CTL 0x06370#define MGA1064_CURSOR_COL0_RED 0x08371#define MGA1064_CURSOR_COL0_GREEN 0x09372#define MGA1064_CURSOR_COL0_BLUE 0x0a373 374#define MGA1064_CURSOR_COL1_RED 0x0c375#define MGA1064_CURSOR_COL1_GREEN 0x0d376#define MGA1064_CURSOR_COL1_BLUE 0x0e377 378#define MGA1064_CURSOR_COL2_RED 0x010379#define MGA1064_CURSOR_COL2_GREEN 0x011380#define MGA1064_CURSOR_COL2_BLUE 0x012381 382#define MGA1064_VREF_CTL 0x018383 384#define MGA1064_MUL_CTL 0x19385#define MGA1064_MUL_CTL_8bits 0x0386#define MGA1064_MUL_CTL_15bits 0x01387#define MGA1064_MUL_CTL_16bits 0x02388#define MGA1064_MUL_CTL_24bits 0x03389#define MGA1064_MUL_CTL_32bits 0x04390#define MGA1064_MUL_CTL_2G8V16bits 0x05391#define MGA1064_MUL_CTL_G16V16bits 0x06392#define MGA1064_MUL_CTL_32_24bits 0x07393 394#define MGA1064_PIX_CLK_CTL 0x1a395#define MGA1064_PIX_CLK_CTL_CLK_DIS ( 0x01 << 2 )396#define MGA1064_PIX_CLK_CTL_CLK_POW_DOWN ( 0x01 << 3 )397#define MGA1064_PIX_CLK_CTL_SEL_PCI ( 0x00 << 0 )398#define MGA1064_PIX_CLK_CTL_SEL_PLL ( 0x01 << 0 )399#define MGA1064_PIX_CLK_CTL_SEL_EXT ( 0x02 << 0 )400#define MGA1064_PIX_CLK_CTL_SEL_MSK ( 0x03 << 0 )401 402#define MGA1064_GEN_CTL 0x1d403#define MGA1064_GEN_CTL_SYNC_ON_GREEN_DIS (0x01 << 5)404#define MGA1064_MISC_CTL 0x1e405#define MGA1064_MISC_CTL_DAC_EN ( 0x01 << 0 )406#define MGA1064_MISC_CTL_VGA ( 0x01 << 1 )407#define MGA1064_MISC_CTL_DIS_CON ( 0x03 << 1 )408#define MGA1064_MISC_CTL_MAFC ( 0x02 << 1 )409#define MGA1064_MISC_CTL_VGA8 ( 0x01 << 3 )410#define MGA1064_MISC_CTL_DAC_RAM_CS ( 0x01 << 4 )411 412#define MGA1064_GEN_IO_CTL2 0x29413#define MGA1064_GEN_IO_CTL 0x2a414#define MGA1064_GEN_IO_DATA 0x2b415#define MGA1064_SYS_PLL_M 0x2c416#define MGA1064_SYS_PLL_N 0x2d417#define MGA1064_SYS_PLL_P 0x2e418#define MGA1064_SYS_PLL_STAT 0x2f419 420#define MGA1064_REMHEADCTL 0x30421#define MGA1064_REMHEADCTL_CLKDIS ( 0x01 << 0 )422#define MGA1064_REMHEADCTL_CLKSL_OFF ( 0x00 << 1 )423#define MGA1064_REMHEADCTL_CLKSL_PLL ( 0x01 << 1 )424#define MGA1064_REMHEADCTL_CLKSL_PCI ( 0x02 << 1 )425#define MGA1064_REMHEADCTL_CLKSL_MSK ( 0x03 << 1 )426 427#define MGA1064_REMHEADCTL2 0x31428 429#define MGA1064_ZOOM_CTL 0x38430#define MGA1064_SENSE_TST 0x3a431 432#define MGA1064_CRC_LSB 0x3c433#define MGA1064_CRC_MSB 0x3d434#define MGA1064_CRC_CTL 0x3e435#define MGA1064_COL_KEY_MSK_LSB 0x40436#define MGA1064_COL_KEY_MSK_MSB 0x41437#define MGA1064_COL_KEY_LSB 0x42438#define MGA1064_COL_KEY_MSB 0x43439#define MGA1064_PIX_PLLA_M 0x44440#define MGA1064_PIX_PLLA_N 0x45441#define MGA1064_PIX_PLLA_P 0x46442#define MGA1064_PIX_PLLB_M 0x48443#define MGA1064_PIX_PLLB_N 0x49444#define MGA1064_PIX_PLLB_P 0x4a445#define MGA1064_PIX_PLLC_M 0x4c446#define MGA1064_PIX_PLLC_N 0x4d447#define MGA1064_PIX_PLLC_P 0x4e448 449#define MGA1064_PIX_PLL_STAT 0x4f450 451/*Added for G450 dual head*/452 453#define MGA1064_VID_PLL_STAT 0x8c454#define MGA1064_VID_PLL_P 0x8D455#define MGA1064_VID_PLL_M 0x8E456#define MGA1064_VID_PLL_N 0x8F457 458/* Modified PLL for G200 Winbond (G200WB) */459#define MGA1064_WB_PIX_PLLC_M 0xb7460#define MGA1064_WB_PIX_PLLC_N 0xb6461#define MGA1064_WB_PIX_PLLC_P 0xb8462 463/* Modified PLL for G200 Maxim (G200EV) */464#define MGA1064_EV_PIX_PLLC_M 0xb6465#define MGA1064_EV_PIX_PLLC_N 0xb7466#define MGA1064_EV_PIX_PLLC_P 0xb8467 468/* Modified PLL for G200 EH */469#define MGA1064_EH_PIX_PLLC_M 0xb6470#define MGA1064_EH_PIX_PLLC_N 0xb7471#define MGA1064_EH_PIX_PLLC_P 0xb8472 473/* Modified PLL for G200 Maxim (G200ER) */474#define MGA1064_ER_PIX_PLLC_M 0xb7475#define MGA1064_ER_PIX_PLLC_N 0xb6476#define MGA1064_ER_PIX_PLLC_P 0xb8477 478#define MGA1064_DISP_CTL 0x8a479#define MGA1064_DISP_CTL_DAC1OUTSEL_MASK 0x01480#define MGA1064_DISP_CTL_DAC1OUTSEL_DIS 0x00481#define MGA1064_DISP_CTL_DAC1OUTSEL_EN 0x01482#define MGA1064_DISP_CTL_DAC2OUTSEL_MASK (0x03 << 2)483#define MGA1064_DISP_CTL_DAC2OUTSEL_DIS 0x00484#define MGA1064_DISP_CTL_DAC2OUTSEL_CRTC1 (0x01 << 2)485#define MGA1064_DISP_CTL_DAC2OUTSEL_CRTC2 (0x02 << 2)486#define MGA1064_DISP_CTL_DAC2OUTSEL_TVE (0x03 << 2)487#define MGA1064_DISP_CTL_PANOUTSEL_MASK (0x03 << 5)488#define MGA1064_DISP_CTL_PANOUTSEL_DIS 0x00489#define MGA1064_DISP_CTL_PANOUTSEL_CRTC1 (0x01 << 5)490#define MGA1064_DISP_CTL_PANOUTSEL_CRTC2RGB (0x02 << 5)491#define MGA1064_DISP_CTL_PANOUTSEL_CRTC2656 (0x03 << 5)492 493#define MGA1064_SYNC_CTL 0x8b494 495#define MGA1064_PWR_CTL 0xa0496#define MGA1064_PWR_CTL_DAC2_EN (0x01 << 0)497#define MGA1064_PWR_CTL_VID_PLL_EN (0x01 << 1)498#define MGA1064_PWR_CTL_PANEL_EN (0x01 << 2)499#define MGA1064_PWR_CTL_RFIFO_EN (0x01 << 3)500#define MGA1064_PWR_CTL_CFIFO_EN (0x01 << 4)501 502#define MGA1064_PAN_CTL 0xa2503 504/* Using crtc2 */505#define MGAREG2_C2CTL 0x10506#define MGAREG2_C2HPARAM 0x14507#define MGAREG2_C2HSYNC 0x18508#define MGAREG2_C2VPARAM 0x1c509#define MGAREG2_C2VSYNC 0x20510#define MGAREG2_C2STARTADD0 0x28511 512#define MGAREG2_C2OFFSET 0x40513#define MGAREG2_C2DATACTL 0x4c514 515#define MGAREG_C2CTL 0x3c10516#define MGAREG_C2CTL_C2_EN 0x01517 518#define MGAREG_C2_HIPRILVL_M (0x07 << 4)519#define MGAREG_C2_MAXHIPRI_M (0x07 << 8)520 521#define MGAREG_C2CTL_PIXCLKSEL_MASK (0x03 << 1)522#define MGAREG_C2CTL_PIXCLKSELH_MASK (0x01 << 14)523#define MGAREG_C2CTL_PIXCLKSEL_PCICLK 0x00524#define MGAREG_C2CTL_PIXCLKSEL_VDOCLK (0x01 << 1)525#define MGAREG_C2CTL_PIXCLKSEL_PIXELPLL (0x02 << 1)526#define MGAREG_C2CTL_PIXCLKSEL_VIDEOPLL (0x03 << 1)527#define MGAREG_C2CTL_PIXCLKSEL_VDCLK (0x01 << 14)528 529#define MGAREG_C2CTL_PIXCLKSEL_CRISTAL (0x01 << 1) | (0x01 << 14)530#define MGAREG_C2CTL_PIXCLKSEL_SYSTEMPLL (0x02 << 1) | (0x01 << 14)531 532#define MGAREG_C2CTL_PIXCLKDIS_MASK (0x01 << 3)533#define MGAREG_C2CTL_PIXCLKDIS_DISABLE (0x01 << 3)534 535#define MGAREG_C2CTL_CRTCDACSEL_MASK (0x01 << 20)536#define MGAREG_C2CTL_CRTCDACSEL_CRTC1 0x00537#define MGAREG_C2CTL_CRTCDACSEL_CRTC2 (0x01 << 20)538 539#define MGAREG_C2HPARAM 0x3c14540#define MGAREG_C2HSYNC 0x3c18541#define MGAREG_C2VPARAM 0x3c1c542#define MGAREG_C2VSYNC 0x3c20543#define MGAREG_C2STARTADD0 0x3c28544 545#define MGAREG_C2OFFSET 0x3c40546#define MGAREG_C2DATACTL 0x3c4c547 548/* video register */549 550#define MGAREG_BESA1C3ORG 0x3d60551#define MGAREG_BESA1CORG 0x3d10552#define MGAREG_BESA1ORG 0x3d00553#define MGAREG_BESCTL 0x3d20554#define MGAREG_BESGLOBCTL 0x3dc0555#define MGAREG_BESHCOORD 0x3d28556#define MGAREG_BESHISCAL 0x3d30557#define MGAREG_BESHSRCEND 0x3d3c558#define MGAREG_BESHSRCLST 0x3d50559#define MGAREG_BESHSRCST 0x3d38560#define MGAREG_BESLUMACTL 0x3d40561#define MGAREG_BESPITCH 0x3d24562#define MGAREG_BESV1SRCLST 0x3d54563#define MGAREG_BESV1WGHT 0x3d48564#define MGAREG_BESVCOORD 0x3d2c565#define MGAREG_BESVISCAL 0x3d34566 567/* texture engine registers */568 569#define MGAREG_TMR0 0x2c00570#define MGAREG_TMR1 0x2c04571#define MGAREG_TMR2 0x2c08572#define MGAREG_TMR3 0x2c0c573#define MGAREG_TMR4 0x2c10574#define MGAREG_TMR5 0x2c14575#define MGAREG_TMR6 0x2c18576#define MGAREG_TMR7 0x2c1c577#define MGAREG_TMR8 0x2c20578#define MGAREG_TEXORG 0x2c24579#define MGAREG_TEXWIDTH 0x2c28580#define MGAREG_TEXHEIGHT 0x2c2c581#define MGAREG_TEXCTL 0x2c30582# define MGA_TW4 (0x00000000)583# define MGA_TW8 (0x00000001)584# define MGA_TW15 (0x00000002)585# define MGA_TW16 (0x00000003)586# define MGA_TW12 (0x00000004)587# define MGA_TW32 (0x00000006)588# define MGA_TW8A (0x00000007)589# define MGA_TW8AL (0x00000008)590# define MGA_TW422 (0x0000000A)591# define MGA_TW422UYVY (0x0000000B)592# define MGA_PITCHLIN (0x00000100)593# define MGA_NOPERSPECTIVE (0x00200000)594# define MGA_TAKEY (0x02000000)595# define MGA_TAMASK (0x04000000)596# define MGA_CLAMPUV (0x18000000)597# define MGA_TEXMODULATE (0x20000000)598#define MGAREG_TEXCTL2 0x2c3c599# define MGA_G400_TC2_MAGIC (0x00008000)600# define MGA_TC2_DECALBLEND (0x00000001)601# define MGA_TC2_IDECAL (0x00000002)602# define MGA_TC2_DECALDIS (0x00000004)603# define MGA_TC2_CKSTRANSDIS (0x00000010)604# define MGA_TC2_BORDEREN (0x00000020)605# define MGA_TC2_SPECEN (0x00000040)606# define MGA_TC2_DUALTEX (0x00000080)607# define MGA_TC2_TABLEFOG (0x00000100)608# define MGA_TC2_BUMPMAP (0x00000200)609# define MGA_TC2_SELECT_TMU1 (0x80000000)610#define MGAREG_TEXTRANS 0x2c34611#define MGAREG_TEXTRANSHIGH 0x2c38612#define MGAREG_TEXFILTER 0x2c58613# define MGA_MIN_NRST (0x00000000)614# define MGA_MIN_BILIN (0x00000002)615# define MGA_MIN_ANISO (0x0000000D)616# define MGA_MAG_NRST (0x00000000)617# define MGA_MAG_BILIN (0x00000020)618# define MGA_FILTERALPHA (0x00100000)619#define MGAREG_ALPHASTART 0x2c70620#define MGAREG_ALPHAXINC 0x2c74621#define MGAREG_ALPHAYINC 0x2c78622#define MGAREG_ALPHACTRL 0x2c7c623# define MGA_SRC_ZERO (0x00000000)624# define MGA_SRC_ONE (0x00000001)625# define MGA_SRC_DST_COLOR (0x00000002)626# define MGA_SRC_ONE_MINUS_DST_COLOR (0x00000003)627# define MGA_SRC_ALPHA (0x00000004)628# define MGA_SRC_ONE_MINUS_SRC_ALPHA (0x00000005)629# define MGA_SRC_DST_ALPHA (0x00000006)630# define MGA_SRC_ONE_MINUS_DST_ALPHA (0x00000007)631# define MGA_SRC_SRC_ALPHA_SATURATE (0x00000008)632# define MGA_SRC_BLEND_MASK (0x0000000f)633# define MGA_DST_ZERO (0x00000000)634# define MGA_DST_ONE (0x00000010)635# define MGA_DST_SRC_COLOR (0x00000020)636# define MGA_DST_ONE_MINUS_SRC_COLOR (0x00000030)637# define MGA_DST_SRC_ALPHA (0x00000040)638# define MGA_DST_ONE_MINUS_SRC_ALPHA (0x00000050)639# define MGA_DST_DST_ALPHA (0x00000060)640# define MGA_DST_ONE_MINUS_DST_ALPHA (0x00000070)641# define MGA_DST_BLEND_MASK (0x00000070)642# define MGA_ALPHACHANNEL (0x00000100)643# define MGA_VIDEOALPHA (0x00000200)644# define MGA_DIFFUSEDALPHA (0x01000000)645# define MGA_MODULATEDALPHA (0x02000000)646#define MGAREG_TDUALSTAGE0 (0x2CF8)647#define MGAREG_TDUALSTAGE1 (0x2CFC)648# define MGA_TDS_COLOR_ARG2_DIFFUSE (0x00000000)649# define MGA_TDS_COLOR_ARG2_SPECULAR (0x00000001)650# define MGA_TDS_COLOR_ARG2_FCOL (0x00000002)651# define MGA_TDS_COLOR_ARG2_PREVSTAGE (0x00000003)652# define MGA_TDS_COLOR_ALPHA_DIFFUSE (0x00000000)653# define MGA_TDS_COLOR_ALPHA_FCOL (0x00000004)654# define MGA_TDS_COLOR_ALPHA_CURRTEX (0x00000008)655# define MGA_TDS_COLOR_ALPHA_PREVTEX (0x0000000c)656# define MGA_TDS_COLOR_ALPHA_PREVSTAGE (0x00000010)657# define MGA_TDS_COLOR_ARG1_REPLICATEALPHA (0x00000020)658# define MGA_TDS_COLOR_ARG1_INV (0x00000040)659# define MGA_TDS_COLOR_ARG2_REPLICATEALPHA (0x00000080)660# define MGA_TDS_COLOR_ARG2_INV (0x00000100)661# define MGA_TDS_COLOR_ALPHA1INV (0x00000200)662# define MGA_TDS_COLOR_ALPHA2INV (0x00000400)663# define MGA_TDS_COLOR_ARG1MUL_ALPHA1 (0x00000800)664# define MGA_TDS_COLOR_ARG2MUL_ALPHA2 (0x00001000)665# define MGA_TDS_COLOR_ARG1ADD_MULOUT (0x00002000)666# define MGA_TDS_COLOR_ARG2ADD_MULOUT (0x00004000)667# define MGA_TDS_COLOR_MODBRIGHT_2X (0x00008000)668# define MGA_TDS_COLOR_MODBRIGHT_4X (0x00010000)669# define MGA_TDS_COLOR_ADD_SUB (0x00000000)670# define MGA_TDS_COLOR_ADD_ADD (0x00020000)671# define MGA_TDS_COLOR_ADD2X (0x00040000)672# define MGA_TDS_COLOR_ADDBIAS (0x00080000)673# define MGA_TDS_COLOR_BLEND (0x00100000)674# define MGA_TDS_COLOR_SEL_ARG1 (0x00000000)675# define MGA_TDS_COLOR_SEL_ARG2 (0x00200000)676# define MGA_TDS_COLOR_SEL_ADD (0x00400000)677# define MGA_TDS_COLOR_SEL_MUL (0x00600000)678# define MGA_TDS_ALPHA_ARG1_INV (0x00800000)679# define MGA_TDS_ALPHA_ARG2_DIFFUSE (0x00000000)680# define MGA_TDS_ALPHA_ARG2_FCOL (0x01000000)681# define MGA_TDS_ALPHA_ARG2_PREVTEX (0x02000000)682# define MGA_TDS_ALPHA_ARG2_PREVSTAGE (0x03000000)683# define MGA_TDS_ALPHA_ARG2_INV (0x04000000)684# define MGA_TDS_ALPHA_ADD (0x08000000)685# define MGA_TDS_ALPHA_ADDBIAS (0x10000000)686# define MGA_TDS_ALPHA_ADD2X (0x20000000)687# define MGA_TDS_ALPHA_SEL_ARG1 (0x00000000)688# define MGA_TDS_ALPHA_SEL_ARG2 (0x40000000)689# define MGA_TDS_ALPHA_SEL_ADD (0x80000000)690# define MGA_TDS_ALPHA_SEL_MUL (0xc0000000)691 692#define MGAREG_DWGSYNC 0x2c4c693 694#define MGAREG_AGP_PLL 0x1e4c695#define MGA_AGP2XPLL_ENABLE 0x1696#define MGA_AGP2XPLL_DISABLE 0x0697 698#endif699