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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.4 * Copyright (c) 2015-2021 The Linux Foundation. All rights reserved.5 * Copyright (C) 2013 Red Hat6 * Author: Rob Clark <robdclark@gmail.com>7 */8 9#ifndef _DPU_CRTC_H_10#define _DPU_CRTC_H_11 12#include <linux/kthread.h>13#include <drm/drm_crtc.h>14#include "dpu_kms.h"15#include "dpu_core_perf.h"16 17#define DPU_CRTC_NAME_SIZE 1218 19/* define the maximum number of in-flight frame events */20#define DPU_CRTC_FRAME_EVENT_SIZE 421 22/**23 * enum dpu_crtc_client_type: crtc client type24 * @RT_CLIENT: RealTime client like video/cmd mode display25 * voting through apps rsc26 * @NRT_CLIENT: Non-RealTime client like WB display27 * voting through apps rsc28 */29enum dpu_crtc_client_type {30 RT_CLIENT,31 NRT_CLIENT,32};33 34/**35 * enum dpu_crtc_smmu_state: smmu state36 * @ATTACHED: all the context banks are attached.37 * @DETACHED: all the context banks are detached.38 * @ATTACH_ALL_REQ: transient state of attaching context banks.39 * @DETACH_ALL_REQ: transient state of detaching context banks.40 */41enum dpu_crtc_smmu_state {42 ATTACHED = 0,43 DETACHED,44 ATTACH_ALL_REQ,45 DETACH_ALL_REQ,46};47 48/**49 * enum dpu_crtc_smmu_state_transition_type: state transition type50 * @NONE: no pending state transitions51 * @PRE_COMMIT: state transitions should be done before processing the commit52 * @POST_COMMIT: state transitions to be done after processing the commit.53 */54enum dpu_crtc_smmu_state_transition_type {55 NONE,56 PRE_COMMIT,57 POST_COMMIT58};59 60/**61 * struct dpu_crtc_smmu_state_data: stores the smmu state and transition type62 * @state: current state of smmu context banks63 * @transition_type: transition request type64 * @transition_error: whether there is error while transitioning the state65 */66struct dpu_crtc_smmu_state_data {67 uint32_t state;68 uint32_t transition_type;69 uint32_t transition_error;70};71 72/**73 * enum dpu_crtc_crc_source: CRC source74 * @DPU_CRTC_CRC_SOURCE_NONE: no source set75 * @DPU_CRTC_CRC_SOURCE_LAYER_MIXER: CRC in layer mixer76 * @DPU_CRTC_CRC_SOURCE_ENCODER: CRC in encoder77 * @DPU_CRTC_CRC_SOURCE_INVALID: Invalid source78 */79enum dpu_crtc_crc_source {80 DPU_CRTC_CRC_SOURCE_NONE = 0,81 DPU_CRTC_CRC_SOURCE_LAYER_MIXER,82 DPU_CRTC_CRC_SOURCE_ENCODER,83 DPU_CRTC_CRC_SOURCE_MAX,84 DPU_CRTC_CRC_SOURCE_INVALID = -185};86 87/**88 * struct dpu_crtc_mixer: stores the map for each virtual pipeline in the CRTC89 * @hw_lm: LM HW Driver context90 * @lm_ctl: CTL Path HW driver context91 * @lm_dspp: DSPP HW driver context92 * @mixer_op_mode: mixer blending operation mode93 * @flush_mask: mixer flush mask for ctl, mixer and pipe94 */95struct dpu_crtc_mixer {96 struct dpu_hw_mixer *hw_lm;97 struct dpu_hw_ctl *lm_ctl;98 struct dpu_hw_dspp *hw_dspp;99 u32 mixer_op_mode;100};101 102/**103 * struct dpu_crtc_frame_event: stores crtc frame event for crtc processing104 * @work: base work structure105 * @crtc: Pointer to crtc handling this event106 * @list: event list107 * @ts: timestamp at queue entry108 * @event: event identifier109 */110struct dpu_crtc_frame_event {111 struct kthread_work work;112 struct drm_crtc *crtc;113 struct list_head list;114 ktime_t ts;115 u32 event;116};117 118/*119 * Maximum number of free event structures to cache120 */121#define DPU_CRTC_MAX_EVENT_COUNT 16122 123/**124 * struct dpu_crtc - virtualized CRTC data structure125 * @base : Base drm crtc structure126 * @name : ASCII description of this crtc127 * @event : Pointer to last received drm vblank event. If there is a128 * pending vblank event, this will be non-null.129 * @vsync_count : Running count of received vsync events130 * @drm_requested_vblank : Whether vblanks have been enabled in the encoder131 * @property_info : Opaque structure for generic property support132 * @property_defaults : Array of default values for generic property support133 * @vblank_cb_count : count of vblank callback since last reset134 * @play_count : frame count between crtc enable and disable135 * @vblank_cb_time : ktime at vblank count reset136 * @enabled : whether the DPU CRTC is currently enabled. updated in the137 * commit-thread, not state-swap time which is earlier, so138 * safe to make decisions on during VBLANK on/off work139 * @feature_list : list of color processing features supported on a crtc140 * @active_list : list of color processing features are active141 * @dirty_list : list of color processing features are dirty142 * @ad_dirty: list containing ad properties that are dirty143 * @ad_active: list containing ad properties that are active144 * @frame_pending : Whether or not an update is pending145 * @frame_events : static allocation of in-flight frame events146 * @frame_event_list : available frame event list147 * @spin_lock : spin lock for frame event, transaction status, etc...148 * @frame_done_comp : for frame_event_done synchronization149 * @event_thread : Pointer to event handler thread150 * @event_worker : Event worker queue151 * @event_lock : Spinlock around event handling code152 * @phandle: Pointer to power handler153 * @cur_perf : current performance committed to clock/bandwidth driver154 * @crc_source : CRC source155 */156struct dpu_crtc {157 struct drm_crtc base;158 char name[DPU_CRTC_NAME_SIZE];159 160 struct drm_pending_vblank_event *event;161 u32 vsync_count;162 163 u32 vblank_cb_count;164 u64 play_count;165 ktime_t vblank_cb_time;166 bool enabled;167 168 struct list_head feature_list;169 struct list_head active_list;170 struct list_head dirty_list;171 struct list_head ad_dirty;172 struct list_head ad_active;173 174 atomic_t frame_pending;175 struct dpu_crtc_frame_event frame_events[DPU_CRTC_FRAME_EVENT_SIZE];176 struct list_head frame_event_list;177 spinlock_t spin_lock;178 struct completion frame_done_comp;179 180 /* for handling internal event thread */181 spinlock_t event_lock;182 183 struct dpu_core_perf_params cur_perf;184 185 struct dpu_crtc_smmu_state_data smmu_state;186};187 188#define to_dpu_crtc(x) container_of(x, struct dpu_crtc, base)189 190/**191 * struct dpu_crtc_state - dpu container for atomic crtc state192 * @base: Base drm crtc state structure193 * @bw_control : true if bw/clk controlled by core bw/clk properties194 * @bw_split_vote : true if bw controlled by llcc/dram bw properties195 * @lm_bounds : LM boundaries based on current mode full resolution, no ROI.196 * Origin top left of CRTC.197 * @property_state: Local storage for msm_prop properties198 * @property_values: Current crtc property values199 * @input_fence_timeout_ns : Cached input fence timeout, in ns200 * @new_perf: new performance state being requested201 * @num_mixers : Number of mixers in use202 * @mixers : List of active mixers203 * @num_ctls : Number of ctl paths in use204 * @hw_ctls : List of active ctl paths205 * @crc_source : CRC source206 * @crc_frame_skip_count: Number of frames skipped before getting CRC207 */208struct dpu_crtc_state {209 struct drm_crtc_state base;210 211 bool bw_control;212 bool bw_split_vote;213 struct drm_rect lm_bounds[CRTC_DUAL_MIXERS];214 215 uint64_t input_fence_timeout_ns;216 217 struct dpu_core_perf_params new_perf;218 219 /* HW Resources reserved for the crtc */220 u32 num_mixers;221 struct dpu_crtc_mixer mixers[CRTC_DUAL_MIXERS];222 223 u32 num_ctls;224 struct dpu_hw_ctl *hw_ctls[CRTC_DUAL_MIXERS];225 226 enum dpu_crtc_crc_source crc_source;227 int crc_frame_skip_count;228};229 230#define to_dpu_crtc_state(x) \231 container_of(x, struct dpu_crtc_state, base)232 233/**234 * dpu_crtc_frame_pending - return the number of pending frames235 * @crtc: Pointer to drm crtc object236 */237static inline int dpu_crtc_frame_pending(struct drm_crtc *crtc)238{239 return crtc ? atomic_read(&to_dpu_crtc(crtc)->frame_pending) : -EINVAL;240}241 242/**243 * dpu_crtc_vblank - enable or disable vblanks for this crtc244 * @crtc: Pointer to drm crtc object245 * @en: true to enable vblanks, false to disable246 */247int dpu_crtc_vblank(struct drm_crtc *crtc, bool en);248 249/**250 * dpu_crtc_vblank_callback - called on vblank irq, issues completion events251 * @crtc: Pointer to drm crtc object252 */253void dpu_crtc_vblank_callback(struct drm_crtc *crtc);254 255/**256 * dpu_crtc_commit_kickoff - trigger kickoff of the commit for this crtc257 * @crtc: Pointer to drm crtc object258 */259void dpu_crtc_commit_kickoff(struct drm_crtc *crtc);260 261/**262 * dpu_crtc_complete_commit - callback signalling completion of current commit263 * @crtc: Pointer to drm crtc object264 */265void dpu_crtc_complete_commit(struct drm_crtc *crtc);266 267/**268 * dpu_crtc_init - create a new crtc object269 * @dev: dpu device270 * @plane: base plane271 * @cursor: cursor plane272 * @Return: new crtc object or error273 */274struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane,275 struct drm_plane *cursor);276 277/**278 * dpu_crtc_register_custom_event - api for enabling/disabling crtc event279 * @kms: Pointer to dpu_kms280 * @crtc_drm: Pointer to crtc object281 * @event: Event that client is interested282 * @en: Flag to enable/disable the event283 */284int dpu_crtc_register_custom_event(struct dpu_kms *kms,285 struct drm_crtc *crtc_drm, u32 event, bool en);286 287/**288 * dpu_crtc_get_intf_mode - get interface mode of the given crtc289 * @crtc: Pointert to crtc290 */291enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc);292 293/**294 * dpu_crtc_get_client_type - check the crtc type- rt, nrt etc.295 * @crtc: Pointer to crtc296 */297static inline enum dpu_crtc_client_type dpu_crtc_get_client_type(298 struct drm_crtc *crtc)299{300 return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT;301}302 303void dpu_crtc_frame_event_cb(struct drm_crtc *crtc, u32 event);304 305#endif /* _DPU_CRTC_H_ */306