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1/* SPDX-License-Identifier: GPL-2.0-only */2/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.3 */4 5#ifndef _DPU_HW_DSPP_H6#define _DPU_HW_DSPP_H7 8struct dpu_hw_dspp;9 10/**11 * struct dpu_hw_pcc_coeff - PCC coefficient structure for each color12 * component.13 * @r: red coefficient.14 * @g: green coefficient.15 * @b: blue coefficient.16 */17 18struct dpu_hw_pcc_coeff {19 __u32 r;20 __u32 g;21 __u32 b;22};23 24/**25 * struct dpu_hw_pcc - pcc feature structure26 * @r: red coefficients.27 * @g: green coefficients.28 * @b: blue coefficients.29 */30struct dpu_hw_pcc_cfg {31 struct dpu_hw_pcc_coeff r;32 struct dpu_hw_pcc_coeff g;33 struct dpu_hw_pcc_coeff b;34};35 36/**37 * struct dpu_hw_dspp_ops - interface to the dspp hardware driver functions38 * Caller must call the init function to get the dspp context for each dspp39 * Assumption is these functions will be called after clocks are enabled40 */41struct dpu_hw_dspp_ops {42 /**43 * setup_pcc - setup dspp pcc44 * @ctx: Pointer to dspp context45 * @cfg: Pointer to configuration46 */47 void (*setup_pcc)(struct dpu_hw_dspp *ctx, struct dpu_hw_pcc_cfg *cfg);48 49};50 51/**52 * struct dpu_hw_dspp - dspp description53 * @base: Hardware block base structure54 * @hw: Block hardware details55 * @idx: DSPP index56 * @cap: Pointer to layer_cfg57 * @ops: Pointer to operations possible for this DSPP58 */59struct dpu_hw_dspp {60 struct dpu_hw_blk base;61 struct dpu_hw_blk_reg_map hw;62 63 /* dspp */64 int idx;65 const struct dpu_dspp_cfg *cap;66 67 /* Ops */68 struct dpu_hw_dspp_ops ops;69};70 71/**72 * dpu_hw_dspp - convert base object dpu_hw_base to container73 * @hw: Pointer to base hardware block74 * return: Pointer to hardware block container75 */76static inline struct dpu_hw_dspp *to_dpu_hw_dspp(struct dpu_hw_blk *hw)77{78 return container_of(hw, struct dpu_hw_dspp, base);79}80 81/**82 * dpu_hw_dspp_init() - Initializes the DSPP hw driver object.83 * should be called once before accessing every DSPP.84 * @dev: Corresponding device for devres management85 * @cfg: DSPP catalog entry for which driver object is required86 * @addr: Mapped register io address of MDP87 * Return: pointer to structure or ERR_PTR88 */89struct dpu_hw_dspp *dpu_hw_dspp_init(struct drm_device *dev,90 const struct dpu_dspp_cfg *cfg,91 void __iomem *addr);92 93#endif /*_DPU_HW_DSPP_H */94 95