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1/* SPDX-License-Identifier: GPL-2.0-only */2/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.3 */4 5#ifndef _DPU_HW_TOP_H6#define _DPU_HW_TOP_H7 8#include "dpu_hw_catalog.h"9#include "dpu_hw_mdss.h"10#include "dpu_hw_util.h"11 12struct dpu_hw_mdp;13 14/**15 * struct traffic_shaper_cfg: traffic shaper configuration16 * @en : enable/disable traffic shaper17 * @rd_client : true if read client; false if write client18 * @client_id : client identifier19 * @bpc_denom : denominator of byte per clk20 * @bpc_numer : numerator of byte per clk21 */22struct traffic_shaper_cfg {23 bool en;24 bool rd_client;25 u32 client_id;26 u32 bpc_denom;27 u64 bpc_numer;28};29 30/**31 * struct split_pipe_cfg - pipe configuration for dual display panels32 * @en : Enable/disable dual pipe configuration33 * @mode : Panel interface mode34 * @intf : Interface id for main control path35 * @split_flush_en: Allows both the paths to be flushed when master path is36 * flushed37 */38struct split_pipe_cfg {39 bool en;40 enum dpu_intf_mode mode;41 enum dpu_intf intf;42 bool split_flush_en;43};44 45/**46 * struct dpu_danger_safe_status: danger and safe status signals47 * @mdp: top level status48 * @sspp: source pipe status49 */50struct dpu_danger_safe_status {51 u8 mdp;52 u8 sspp[SSPP_MAX];53};54 55/**56 * struct dpu_vsync_source_cfg - configure vsync source and configure the57 * watchdog timers if required.58 * @pp_count: number of ping pongs active59 * @frame_rate: Display frame rate60 * @ppnumber: ping pong index array61 * @vsync_source: vsync source selection62 */63struct dpu_vsync_source_cfg {64 u32 pp_count;65 u32 frame_rate;66 u32 ppnumber[PINGPONG_MAX];67 enum dpu_vsync_source vsync_source;68};69 70enum dpu_dp_phy_sel {71 DPU_DP_PHY_NONE,72 DPU_DP_PHY_0,73 DPU_DP_PHY_1,74 DPU_DP_PHY_2,75};76 77/**78 * struct dpu_hw_mdp_ops - interface to the MDP TOP Hw driver functions79 * Assumption is these functions will be called after clocks are enabled.80 * @setup_split_pipe : Programs the pipe control registers81 * @setup_pp_split : Programs the pp split control registers82 * @setup_traffic_shaper : programs traffic shaper control83 */84struct dpu_hw_mdp_ops {85 /** setup_split_pipe() : Registers are not double buffered, thisk86 * function should be called before timing control enable87 * @mdp : mdp top context driver88 * @cfg : upper and lower part of pipe configuration89 */90 void (*setup_split_pipe)(struct dpu_hw_mdp *mdp,91 struct split_pipe_cfg *p);92 93 /**94 * setup_traffic_shaper() : Setup traffic shaper control95 * @mdp : mdp top context driver96 * @cfg : traffic shaper configuration97 */98 void (*setup_traffic_shaper)(struct dpu_hw_mdp *mdp,99 struct traffic_shaper_cfg *cfg);100 101 /**102 * setup_clk_force_ctrl - set clock force control103 * @mdp: mdp top context driver104 * @clk_ctrl: clock to be controlled105 * @enable: force on enable106 * @return: if the clock is forced-on by this function107 */108 bool (*setup_clk_force_ctrl)(struct dpu_hw_mdp *mdp,109 enum dpu_clk_ctrl_type clk_ctrl, bool enable);110 111 /**112 * get_danger_status - get danger status113 * @mdp: mdp top context driver114 * @status: Pointer to danger safe status115 */116 void (*get_danger_status)(struct dpu_hw_mdp *mdp,117 struct dpu_danger_safe_status *status);118 119 /**120 * setup_vsync_source - setup vsync source configuration details121 * @mdp: mdp top context driver122 * @cfg: vsync source selection configuration123 */124 void (*setup_vsync_source)(struct dpu_hw_mdp *mdp,125 struct dpu_vsync_source_cfg *cfg);126 127 /**128 * get_safe_status - get safe status129 * @mdp: mdp top context driver130 * @status: Pointer to danger safe status131 */132 void (*get_safe_status)(struct dpu_hw_mdp *mdp,133 struct dpu_danger_safe_status *status);134 135 /**136 * dp_phy_intf_sel - configure intf to phy mapping137 * @mdp: mdp top context driver138 * @phys: list of phys the DP interfaces should be connected to. 0 disables the INTF.139 */140 void (*dp_phy_intf_sel)(struct dpu_hw_mdp *mdp, enum dpu_dp_phy_sel phys[2]);141 142 /**143 * intf_audio_select - select the external interface for audio144 * @mdp: mdp top context driver145 */146 void (*intf_audio_select)(struct dpu_hw_mdp *mdp);147};148 149struct dpu_hw_mdp {150 struct dpu_hw_blk base;151 struct dpu_hw_blk_reg_map hw;152 153 /* top */154 const struct dpu_mdp_cfg *caps;155 156 /* ops */157 struct dpu_hw_mdp_ops ops;158};159 160/**161 * dpu_hw_mdptop_init - initializes the top driver for the passed config162 * @dev: Corresponding device for devres management163 * @cfg: MDP TOP configuration from catalog164 * @addr: Mapped register io address of MDP165 * @mdss_rev: dpu core's major and minor versions166 */167struct dpu_hw_mdp *dpu_hw_mdptop_init(struct drm_device *dev,168 const struct dpu_mdp_cfg *cfg,169 void __iomem *addr,170 const struct dpu_mdss_version *mdss_rev);171 172void dpu_hw_mdp_destroy(struct dpu_hw_mdp *mdp);173 174#endif /*_DPU_HW_TOP_H */175