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1/*2 * Copyright 2018 Red Hat Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 */22#include "head.h"23#include "core.h"24 25#include <nvif/push507c.h>26 27#include <nvhw/class/cl827d.h>28 29static int30head827d_curs_clr(struct nv50_head *head)31{32 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push;33 const int i = head->base.index;34 int ret;35 36 if ((ret = PUSH_WAIT(push, 4)))37 return ret;38 39 PUSH_MTHD(push, NV827D, HEAD_SET_CONTROL_CURSOR(i),40 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) |41 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8) |42 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64));43 44 PUSH_MTHD(push, NV827D, HEAD_SET_CONTEXT_DMA_CURSOR(i), 0x00000000);45 return 0;46}47 48static int49head827d_curs_set(struct nv50_head *head, struct nv50_head_atom *asyh)50{51 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push;52 const int i = head->base.index;53 int ret;54 55 if ((ret = PUSH_WAIT(push, 5)))56 return ret;57 58 PUSH_MTHD(push, NV827D, HEAD_SET_CONTROL_CURSOR(i),59 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) |60 NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) |61 NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) |62 NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_X, 0) |63 NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_Y, 0) |64 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, COMPOSITION, ALPHA_BLEND) |65 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, SUB_OWNER, NONE),66 67 HEAD_SET_OFFSET_CURSOR(i), asyh->curs.offset >> 8);68 69 PUSH_MTHD(push, NV827D, HEAD_SET_CONTEXT_DMA_CURSOR(i), asyh->curs.handle);70 return 0;71}72 73static int74head827d_core_set(struct nv50_head *head, struct nv50_head_atom *asyh)75{76 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push;77 const int i = head->base.index;78 int ret;79 80 if ((ret = PUSH_WAIT(push, 9)))81 return ret;82 83 PUSH_MTHD(push, NV827D, HEAD_SET_OFFSET(i, 0),84 NVVAL(NV827D, HEAD_SET_OFFSET, ORIGIN, asyh->core.offset >> 8));85 86 PUSH_MTHD(push, NV827D, HEAD_SET_SIZE(i),87 NVVAL(NV827D, HEAD_SET_SIZE, WIDTH, asyh->core.w) |88 NVVAL(NV827D, HEAD_SET_SIZE, HEIGHT, asyh->core.h),89 90 HEAD_SET_STORAGE(i),91 NVVAL(NV827D, HEAD_SET_STORAGE, BLOCK_HEIGHT, asyh->core.blockh) |92 NVVAL(NV827D, HEAD_SET_STORAGE, PITCH, asyh->core.pitch >> 8) |93 NVVAL(NV827D, HEAD_SET_STORAGE, PITCH, asyh->core.blocks) |94 NVVAL(NV827D, HEAD_SET_STORAGE, MEMORY_LAYOUT, asyh->core.layout),95 96 HEAD_SET_PARAMS(i),97 NVVAL(NV827D, HEAD_SET_PARAMS, FORMAT, asyh->core.format) |98 NVDEF(NV827D, HEAD_SET_PARAMS, SUPER_SAMPLE, X1_AA) |99 NVDEF(NV827D, HEAD_SET_PARAMS, GAMMA, LINEAR),100 101 HEAD_SET_CONTEXT_DMAS_ISO(i, 0),102 NVVAL(NV827D, HEAD_SET_CONTEXT_DMAS_ISO, HANDLE, asyh->core.handle));103 104 PUSH_MTHD(push, NV827D, HEAD_SET_VIEWPORT_POINT_IN(i, 0),105 NVVAL(NV827D, HEAD_SET_VIEWPORT_POINT_IN, X, asyh->core.x) |106 NVVAL(NV827D, HEAD_SET_VIEWPORT_POINT_IN, Y, asyh->core.y));107 return 0;108}109 110static int111head827d_olut_clr(struct nv50_head *head)112{113 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push;114 const int i = head->base.index;115 int ret;116 117 if ((ret = PUSH_WAIT(push, 4)))118 return ret;119 120 PUSH_MTHD(push, NV827D, HEAD_SET_BASE_LUT_LO(i),121 NVDEF(NV827D, HEAD_SET_BASE_LUT_LO, ENABLE, DISABLE));122 123 PUSH_MTHD(push, NV827D, HEAD_SET_CONTEXT_DMA_LUT(i), 0x00000000);124 return 0;125}126 127static int128head827d_olut_set(struct nv50_head *head, struct nv50_head_atom *asyh)129{130 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push;131 const int i = head->base.index;132 int ret;133 134 if ((ret = PUSH_WAIT(push, 5)))135 return ret;136 137 PUSH_MTHD(push, NV827D, HEAD_SET_BASE_LUT_LO(i),138 NVDEF(NV827D, HEAD_SET_BASE_LUT_LO, ENABLE, ENABLE) |139 NVVAL(NV827D, HEAD_SET_BASE_LUT_LO, MODE, asyh->olut.mode) |140 NVVAL(NV827D, HEAD_SET_BASE_LUT_LO, ORIGIN, 0),141 142 HEAD_SET_BASE_LUT_HI(i),143 NVVAL(NV827D, HEAD_SET_BASE_LUT_HI, ORIGIN, asyh->olut.offset >> 8));144 145 PUSH_MTHD(push, NV827D, HEAD_SET_CONTEXT_DMA_LUT(i), asyh->olut.handle);146 return 0;147}148 149const struct nv50_head_func150head827d = {151 .view = head507d_view,152 .mode = head507d_mode,153 .olut = head507d_olut,154 .olut_size = 256,155 .olut_set = head827d_olut_set,156 .olut_clr = head827d_olut_clr,157 .core_calc = head507d_core_calc,158 .core_set = head827d_core_set,159 .core_clr = head507d_core_clr,160 .curs_layout = head507d_curs_layout,161 .curs_format = head507d_curs_format,162 .curs_set = head827d_curs_set,163 .curs_clr = head827d_curs_clr,164 .base = head507d_base,165 .ovly = head507d_ovly,166 .dither = head507d_dither,167 .procamp = head507d_procamp,168};169