92 lines · c
1/* SPDX-License-Identifier: MIT */2#ifndef __NVIF_CL0080_H__3#define __NVIF_CL0080_H__4 5#define NV_DEVICE_V0_INFO 0x006#define NV_DEVICE_V0_TIME 0x017 8struct nv_device_info_v0 {9 __u8 version;10#define NV_DEVICE_INFO_V0_IGP 0x0011#define NV_DEVICE_INFO_V0_PCI 0x0112#define NV_DEVICE_INFO_V0_AGP 0x0213#define NV_DEVICE_INFO_V0_PCIE 0x0314#define NV_DEVICE_INFO_V0_SOC 0x0415 __u8 platform;16 __u16 chipset; /* from NV_PMC_BOOT_0 */17 __u8 revision; /* from NV_PMC_BOOT_0 */18#define NV_DEVICE_INFO_V0_TNT 0x0119#define NV_DEVICE_INFO_V0_CELSIUS 0x0220#define NV_DEVICE_INFO_V0_KELVIN 0x0321#define NV_DEVICE_INFO_V0_RANKINE 0x0422#define NV_DEVICE_INFO_V0_CURIE 0x0523#define NV_DEVICE_INFO_V0_TESLA 0x0624#define NV_DEVICE_INFO_V0_FERMI 0x0725#define NV_DEVICE_INFO_V0_KEPLER 0x0826#define NV_DEVICE_INFO_V0_MAXWELL 0x0927#define NV_DEVICE_INFO_V0_PASCAL 0x0a28#define NV_DEVICE_INFO_V0_VOLTA 0x0b29#define NV_DEVICE_INFO_V0_TURING 0x0c30#define NV_DEVICE_INFO_V0_AMPERE 0x0d31#define NV_DEVICE_INFO_V0_ADA 0x0e32 __u8 family;33 __u8 pad06[2];34 __u64 ram_size;35 __u64 ram_user;36 char chip[16];37 char name[64];38};39 40struct nv_device_info_v1 {41 __u8 version;42 __u8 count;43 __u8 pad02[6];44 struct nv_device_info_v1_data {45 __u64 mthd; /* NV_DEVICE_INFO_* (see below). */46 __u64 data;47 } data[];48};49 50struct nv_device_time_v0 {51 __u8 version;52 __u8 pad01[7];53 __u64 time;54};55 56#define NV_DEVICE_INFO_UNIT (0xffffffffULL << 32)57#define NV_DEVICE_INFO(n) ((n) | (0x00000000ULL << 32))58#define NV_DEVICE_HOST(n) ((n) | (0x00000001ULL << 32))59 60/* This will be returned in the mthd field for unsupported queries. */61#define NV_DEVICE_INFO_INVALID ~0ULL62 63/* Returns the number of available runlists. */64#define NV_DEVICE_HOST_RUNLISTS NV_DEVICE_HOST(0x00000000)65/* Returns the number of available channels (0 if per-runlist). */66#define NV_DEVICE_HOST_CHANNELS NV_DEVICE_HOST(0x00000001)67 68/* Returns a mask of available engine types on runlist(data). */69#define NV_DEVICE_HOST_RUNLIST_ENGINES NV_DEVICE_HOST(0x00000100)70#define NV_DEVICE_HOST_RUNLIST_ENGINES_SW 0x0000000171#define NV_DEVICE_HOST_RUNLIST_ENGINES_GR 0x0000000272#define NV_DEVICE_HOST_RUNLIST_ENGINES_MPEG 0x0000000473#define NV_DEVICE_HOST_RUNLIST_ENGINES_ME 0x0000000874#define NV_DEVICE_HOST_RUNLIST_ENGINES_CIPHER 0x0000001075#define NV_DEVICE_HOST_RUNLIST_ENGINES_BSP 0x0000002076#define NV_DEVICE_HOST_RUNLIST_ENGINES_VP 0x0000004077#define NV_DEVICE_HOST_RUNLIST_ENGINES_CE 0x0000008078#define NV_DEVICE_HOST_RUNLIST_ENGINES_SEC 0x0000010079#define NV_DEVICE_HOST_RUNLIST_ENGINES_MSVLD 0x0000020080#define NV_DEVICE_HOST_RUNLIST_ENGINES_MSPDEC 0x0000040081#define NV_DEVICE_HOST_RUNLIST_ENGINES_MSPPP 0x0000080082#define NV_DEVICE_HOST_RUNLIST_ENGINES_MSENC 0x0000100083#define NV_DEVICE_HOST_RUNLIST_ENGINES_VIC 0x0000200084#define NV_DEVICE_HOST_RUNLIST_ENGINES_SEC2 0x0000400085#define NV_DEVICE_HOST_RUNLIST_ENGINES_NVDEC 0x0000800086#define NV_DEVICE_HOST_RUNLIST_ENGINES_NVENC 0x0001000087#define NV_DEVICE_HOST_RUNLIST_ENGINES_NVJPG 0x0002000088#define NV_DEVICE_HOST_RUNLIST_ENGINES_OFA 0x0004000089/* Returns the number of available channels on runlist(data). */90#define NV_DEVICE_HOST_RUNLIST_CHANNELS NV_DEVICE_HOST(0x00000101)91#endif92