261 lines · c
1/* SPDX-License-Identifier: MIT */2#ifndef __NVIF_CLASS_H__3#define __NVIF_CLASS_H__4 5/* these class numbers are made up by us, and not nvidia-assigned */6#define NVIF_CLASS_CLIENT /* if0000.h */ -0x000000007 8#define NVIF_CLASS_CONTROL /* if0001.h */ -0x000000019 10#define NVIF_CLASS_SW_NV04 /* if0004.h */ -0x0000000411#define NVIF_CLASS_SW_NV10 /* if0005.h */ -0x0000000512#define NVIF_CLASS_SW_NV50 /* if0005.h */ -0x0000000613#define NVIF_CLASS_SW_GF100 /* if0005.h */ -0x0000000714 15#define NVIF_CLASS_MMU /* if0008.h */ 0x8000000816#define NVIF_CLASS_MMU_NV04 /* if0008.h */ 0x8000000917#define NVIF_CLASS_MMU_NV50 /* if0008.h */ 0x8000500918#define NVIF_CLASS_MMU_GF100 /* if0008.h */ 0x8000900919 20#define NVIF_CLASS_MEM /* if000a.h */ 0x8000000a21#define NVIF_CLASS_MEM_NV04 /* if000b.h */ 0x8000000b22#define NVIF_CLASS_MEM_NV50 /* if500b.h */ 0x8000500b23#define NVIF_CLASS_MEM_GF100 /* if900b.h */ 0x8000900b24 25#define NVIF_CLASS_VMM /* if000c.h */ 0x8000000c26#define NVIF_CLASS_VMM_NV04 /* if000d.h */ 0x8000000d27#define NVIF_CLASS_VMM_NV50 /* if500d.h */ 0x8000500d28#define NVIF_CLASS_VMM_GF100 /* if900d.h */ 0x8000900d29#define NVIF_CLASS_VMM_GM200 /* ifb00d.h */ 0x8000b00d30#define NVIF_CLASS_VMM_GP100 /* ifc00d.h */ 0x8000c00d31 32#define NVIF_CLASS_EVENT /* if000e.h */ 0x8000000e33 34#define NVIF_CLASS_DISP /* if0010.h */ 0x8000001035#define NVIF_CLASS_CONN /* if0011.h */ 0x8000001136#define NVIF_CLASS_OUTP /* if0012.h */ 0x8000001237#define NVIF_CLASS_HEAD /* if0013.h */ 0x8000001338#define NVIF_CLASS_DISP_CHAN /* if0014.h */ 0x8000001439 40#define NVIF_CLASS_CHAN /* if0020.h */ 0x8000002041#define NVIF_CLASS_CGRP /* if0021.h */ 0x8000002142 43/* the below match nvidia-assigned (either in hw, or sw) class numbers */44#define NV_NULL_CLASS 0x0000003045 46#define NV_DEVICE /* cl0080.h */ 0x0000008047 48#define NV_DMA_FROM_MEMORY /* cl0002.h */ 0x0000000249#define NV_DMA_TO_MEMORY /* cl0002.h */ 0x0000000350#define NV_DMA_IN_MEMORY /* cl0002.h */ 0x0000003d51 52#define NV50_TWOD 0x0000502d53#define FERMI_TWOD_A 0x0000902d54 55#define NV50_MEMORY_TO_MEMORY_FORMAT 0x0000503956#define FERMI_MEMORY_TO_MEMORY_FORMAT_A 0x0000903957 58#define KEPLER_INLINE_TO_MEMORY_A 0x0000a04059#define KEPLER_INLINE_TO_MEMORY_B 0x0000a14060 61#define NV04_DISP /* cl0046.h */ 0x0000004662 63#define VOLTA_USERMODE_A 0x0000c36164#define TURING_USERMODE_A 0x0000c46165#define AMPERE_USERMODE_A 0x0000c56166 67#define MAXWELL_FAULT_BUFFER_A /* clb069.h */ 0x0000b06968#define VOLTA_FAULT_BUFFER_A /* clb069.h */ 0x0000c36969 70#define NV03_CHANNEL_DMA /* if0020.h */ 0x0000006b71#define NV10_CHANNEL_DMA /* if0020.h */ 0x0000006e72#define NV17_CHANNEL_DMA /* if0020.h */ 0x0000176e73#define NV40_CHANNEL_DMA /* if0020.h */ 0x0000406e74 75#define KEPLER_CHANNEL_GROUP_A /* if0021.h */ 0x0000a06c76 77#define NV50_CHANNEL_GPFIFO /* if0020.h */ 0x0000506f78#define G82_CHANNEL_GPFIFO /* if0020.h */ 0x0000826f79#define FERMI_CHANNEL_GPFIFO /* if0020.h */ 0x0000906f80#define KEPLER_CHANNEL_GPFIFO_A /* if0020.h */ 0x0000a06f81#define KEPLER_CHANNEL_GPFIFO_B /* if0020.h */ 0x0000a16f82#define MAXWELL_CHANNEL_GPFIFO_A /* if0020.h */ 0x0000b06f83#define PASCAL_CHANNEL_GPFIFO_A /* if0020.h */ 0x0000c06f84#define VOLTA_CHANNEL_GPFIFO_A /* if0020.h */ 0x0000c36f85#define TURING_CHANNEL_GPFIFO_A /* if0020.h */ 0x0000c46f86#define AMPERE_CHANNEL_GPFIFO_A /* if0020.h */ 0x0000c56f87#define AMPERE_CHANNEL_GPFIFO_B /* if0020.h */ 0x0000c76f88 89#define NV50_DISP /* if0010.h */ 0x0000507090#define G82_DISP /* if0010.h */ 0x0000827091#define GT200_DISP /* if0010.h */ 0x0000837092#define GT214_DISP /* if0010.h */ 0x0000857093#define GT206_DISP /* if0010.h */ 0x0000887094#define GF110_DISP /* if0010.h */ 0x0000907095#define GK104_DISP /* if0010.h */ 0x0000917096#define GK110_DISP /* if0010.h */ 0x0000927097#define GM107_DISP /* if0010.h */ 0x0000947098#define GM200_DISP /* if0010.h */ 0x0000957099#define GP100_DISP /* if0010.h */ 0x00009770100#define GP102_DISP /* if0010.h */ 0x00009870101#define GV100_DISP /* if0010.h */ 0x0000c370102#define TU102_DISP /* if0010.h */ 0x0000c570103#define GA102_DISP /* if0010.h */ 0x0000c670104#define AD102_DISP /* if0010.h */ 0x0000c770105 106#define GV100_DISP_CAPS 0x0000c373107 108#define NV31_MPEG 0x00003174109#define G82_MPEG 0x00008274110 111#define NV74_VP2 0x00007476112 113#define NV50_DISP_CURSOR /* if0014.h */ 0x0000507a114#define G82_DISP_CURSOR /* if0014.h */ 0x0000827a115#define GT214_DISP_CURSOR /* if0014.h */ 0x0000857a116#define GF110_DISP_CURSOR /* if0014.h */ 0x0000907a117#define GK104_DISP_CURSOR /* if0014.h */ 0x0000917a118#define GV100_DISP_CURSOR /* if0014.h */ 0x0000c37a119#define TU102_DISP_CURSOR /* if0014.h */ 0x0000c57a120#define GA102_DISP_CURSOR /* if0014.h */ 0x0000c67a121 122#define NV50_DISP_OVERLAY /* if0014.h */ 0x0000507b123#define G82_DISP_OVERLAY /* if0014.h */ 0x0000827b124#define GT214_DISP_OVERLAY /* if0014.h */ 0x0000857b125#define GF110_DISP_OVERLAY /* if0014.h */ 0x0000907b126#define GK104_DISP_OVERLAY /* if0014.h */ 0x0000917b127 128#define GV100_DISP_WINDOW_IMM_CHANNEL_DMA /* if0014.h */ 0x0000c37b129#define TU102_DISP_WINDOW_IMM_CHANNEL_DMA /* if0014.h */ 0x0000c57b130#define GA102_DISP_WINDOW_IMM_CHANNEL_DMA /* if0014.h */ 0x0000c67b131 132#define NV50_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000507c133#define G82_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000827c134#define GT200_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000837c135#define GT214_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000857c136#define GF110_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000907c137#define GK104_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000917c138#define GK110_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000927c139 140#define NV50_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000507d141#define G82_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000827d142#define GT200_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000837d143#define GT214_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000857d144#define GT206_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000887d145#define GF110_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000907d146#define GK104_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000917d147#define GK110_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000927d148#define GM107_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000947d149#define GM200_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000957d150#define GP100_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000977d151#define GP102_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000987d152#define GV100_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000c37d153#define TU102_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000c57d154#define GA102_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000c67d155#define AD102_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000c77d156 157#define NV50_DISP_OVERLAY_CHANNEL_DMA /* if0014.h */ 0x0000507e158#define G82_DISP_OVERLAY_CHANNEL_DMA /* if0014.h */ 0x0000827e159#define GT200_DISP_OVERLAY_CHANNEL_DMA /* if0014.h */ 0x0000837e160#define GT214_DISP_OVERLAY_CHANNEL_DMA /* if0014.h */ 0x0000857e161#define GF110_DISP_OVERLAY_CONTROL_DMA /* if0014.h */ 0x0000907e162#define GK104_DISP_OVERLAY_CONTROL_DMA /* if0014.h */ 0x0000917e163 164#define GV100_DISP_WINDOW_CHANNEL_DMA /* if0014.h */ 0x0000c37e165#define TU102_DISP_WINDOW_CHANNEL_DMA /* if0014.h */ 0x0000c57e166#define GA102_DISP_WINDOW_CHANNEL_DMA /* if0014.h */ 0x0000c67e167 168#define NV50_TESLA 0x00005097169#define G82_TESLA 0x00008297170#define GT200_TESLA 0x00008397171#define GT214_TESLA 0x00008597172#define GT21A_TESLA 0x00008697173 174#define FERMI_A /* cl9097.h */ 0x00009097175#define FERMI_B /* cl9097.h */ 0x00009197176#define FERMI_C /* cl9097.h */ 0x00009297177 178#define KEPLER_A /* cl9097.h */ 0x0000a097179#define KEPLER_B /* cl9097.h */ 0x0000a197180#define KEPLER_C /* cl9097.h */ 0x0000a297181 182#define MAXWELL_A /* cl9097.h */ 0x0000b097183#define MAXWELL_B /* cl9097.h */ 0x0000b197184 185#define PASCAL_A /* cl9097.h */ 0x0000c097186#define PASCAL_B /* cl9097.h */ 0x0000c197187 188#define VOLTA_A /* cl9097.h */ 0x0000c397189 190#define TURING_A /* cl9097.h */ 0x0000c597191 192#define AMPERE_B /* cl9097.h */ 0x0000c797193 194#define ADA_A /* cl9097.h */ 0x0000c997195 196#define NV74_BSP 0x000074b0197 198#define NVC4B0_VIDEO_DECODER 0x0000c4b0199#define NVC6B0_VIDEO_DECODER 0x0000c6b0200#define NVC7B0_VIDEO_DECODER 0x0000c7b0201#define NVC9B0_VIDEO_DECODER 0x0000c9b0202 203#define GT212_MSVLD 0x000085b1204#define IGT21A_MSVLD 0x000086b1205#define G98_MSVLD 0x000088b1206#define GF100_MSVLD 0x000090b1207#define GK104_MSVLD 0x000095b1208 209#define GT212_MSPDEC 0x000085b2210#define G98_MSPDEC 0x000088b2211#define GF100_MSPDEC 0x000090b2212#define GK104_MSPDEC 0x000095b2213 214#define GT212_MSPPP 0x000085b3215#define G98_MSPPP 0x000088b3216#define GF100_MSPPP 0x000090b3217 218#define G98_SEC 0x000088b4219 220#define GT212_DMA 0x000085b5221#define FERMI_DMA 0x000090b5222#define KEPLER_DMA_COPY_A 0x0000a0b5223#define MAXWELL_DMA_COPY_A 0x0000b0b5224#define PASCAL_DMA_COPY_A 0x0000c0b5225#define PASCAL_DMA_COPY_B 0x0000c1b5226#define VOLTA_DMA_COPY_A 0x0000c3b5227#define TURING_DMA_COPY_A 0x0000c5b5228#define AMPERE_DMA_COPY_A 0x0000c6b5229#define AMPERE_DMA_COPY_B 0x0000c7b5230 231#define NVC4B7_VIDEO_ENCODER 0x0000c4b7232#define NVC7B7_VIDEO_ENCODER 0x0000c7b7233#define NVC9B7_VIDEO_ENCODER 0x0000c9b7234 235#define FERMI_DECOMPRESS 0x000090b8236 237#define NV50_COMPUTE 0x000050c0238#define GT214_COMPUTE 0x000085c0239#define FERMI_COMPUTE_A 0x000090c0240#define FERMI_COMPUTE_B 0x000091c0241#define KEPLER_COMPUTE_A 0x0000a0c0242#define KEPLER_COMPUTE_B 0x0000a1c0243#define MAXWELL_COMPUTE_A 0x0000b0c0244#define MAXWELL_COMPUTE_B 0x0000b1c0245#define PASCAL_COMPUTE_A 0x0000c0c0246#define PASCAL_COMPUTE_B 0x0000c1c0247#define VOLTA_COMPUTE_A 0x0000c3c0248#define TURING_COMPUTE_A 0x0000c5c0249#define AMPERE_COMPUTE_B 0x0000c7c0250#define ADA_COMPUTE_A 0x0000c9c0251 252#define NV74_CIPHER 0x000074c1253 254#define NVC4D1_VIDEO_NVJPG 0x0000c4d1255#define NVC9D1_VIDEO_NVJPG 0x0000c9d1256 257#define NVC6FA_VIDEO_OFA 0x0000c6fa258#define NVC7FA_VIDEO_OFA 0x0000c7fa259#define NVC9FA_VIDEO_OFA 0x0000c9fa260#endif261