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1/*2 * Copyright 2005-2006 Erik Waling3 * Copyright 2006 Stephane Marchesin4 * Copyright 2007-2009 Stuart Bennett5 *6 * Permission is hereby granted, free of charge, to any person obtaining a7 * copy of this software and associated documentation files (the "Software"),8 * to deal in the Software without restriction, including without limitation9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,10 * and/or sell copies of the Software, and to permit persons to whom the11 * Software is furnished to do so, subject to the following conditions:12 *13 * The above copyright notice and this permission notice shall be included in14 * all copies or substantial portions of the Software.15 *16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL19 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,20 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF21 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE22 * SOFTWARE.23 */24 25#include "nouveau_drv.h"26#include "nouveau_bios.h"27#include "nouveau_reg.h"28#include "dispnv04/hw.h"29#include "nouveau_encoder.h"30 31#include <subdev/gsp.h>32 33#include <linux/io-mapping.h>34#include <linux/firmware.h>35 36/* these defines are made up */37#define NV_CIO_CRE_44_HEADA 0x038#define NV_CIO_CRE_44_HEADB 0x339#define FEATURE_MOBILE 0x10 /* also FEATURE_QUADRO for BMP */40 41#define EDID1_LEN 12842 43#define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg)44#define LOG_OLD_VALUE(x)45 46static bool nv_cksum(const uint8_t *data, unsigned int length)47{48 /*49 * There's a few checksums in the BIOS, so here's a generic checking50 * function.51 */52 int i;53 uint8_t sum = 0;54 55 for (i = 0; i < length; i++)56 sum += data[i];57 58 if (sum)59 return true;60 61 return false;62}63 64static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk)65{66 int compare_record_len, i = 0;67 uint16_t compareclk, scriptptr = 0;68 69 if (bios->major_version < 5) /* pre BIT */70 compare_record_len = 3;71 else72 compare_record_len = 4;73 74 do {75 compareclk = ROM16(bios->data[clktable + compare_record_len * i]);76 if (pxclk >= compareclk * 10) {77 if (bios->major_version < 5) {78 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i];79 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]);80 } else81 scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]);82 break;83 }84 i++;85 } while (compareclk);86 87 return scriptptr;88}89 90static void91run_digital_op_script(struct drm_device *dev, uint16_t scriptptr,92 struct dcb_output *dcbent, int head, bool dl)93{94 struct nouveau_drm *drm = nouveau_drm(dev);95 96 NV_INFO(drm, "0x%04X: Parsing digital output script table\n",97 scriptptr);98 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_44, head ? NV_CIO_CRE_44_HEADB :99 NV_CIO_CRE_44_HEADA);100 nouveau_bios_run_init_table(dev, scriptptr, dcbent, head);101 102 nv04_dfp_bind_head(dev, dcbent, head, dl);103}104 105static int call_lvds_manufacturer_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script)106{107 struct nouveau_drm *drm = nouveau_drm(dev);108 struct nvbios *bios = &drm->vbios;109 uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & DCB_OUTPUT_C ? 1 : 0);110 uint16_t scriptofs = ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]);111#ifdef __powerpc__112 struct pci_dev *pdev = to_pci_dev(dev->dev);113#endif114 115 if (!bios->fp.xlated_entry || !sub || !scriptofs)116 return -EINVAL;117 118 run_digital_op_script(dev, scriptofs, dcbent, head, bios->fp.dual_link);119 120 if (script == LVDS_PANEL_OFF) {121 /* off-on delay in ms */122 mdelay(ROM16(bios->data[bios->fp.xlated_entry + 7]));123 }124#ifdef __powerpc__125 /* Powerbook specific quirks */126 if (script == LVDS_RESET &&127 (pdev->device == 0x0179 || pdev->device == 0x0189 ||128 pdev->device == 0x0329))129 nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72);130#endif131 132 return 0;133}134 135static int run_lvds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk)136{137 /*138 * The BIT LVDS table's header has the information to setup the139 * necessary registers. Following the standard 4 byte header are:140 * A bitmask byte and a dual-link transition pxclk value for use in141 * selecting the init script when not using straps; 4 script pointers142 * for panel power, selected by output and on/off; and 8 table pointers143 * for panel init, the needed one determined by output, and bits in the144 * conf byte. These tables are similar to the TMDS tables, consisting145 * of a list of pxclks and script pointers.146 */147 struct nouveau_drm *drm = nouveau_drm(dev);148 struct nvbios *bios = &drm->vbios;149 unsigned int outputset = (dcbent->or == 4) ? 1 : 0;150 uint16_t scriptptr = 0, clktable;151 152 /*153 * For now we assume version 3.0 table - g80 support will need some154 * changes155 */156 157 switch (script) {158 case LVDS_INIT:159 return -ENOSYS;160 case LVDS_BACKLIGHT_ON:161 case LVDS_PANEL_ON:162 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 7 + outputset * 2]);163 break;164 case LVDS_BACKLIGHT_OFF:165 case LVDS_PANEL_OFF:166 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]);167 break;168 case LVDS_RESET:169 clktable = bios->fp.lvdsmanufacturerpointer + 15;170 if (dcbent->or == 4)171 clktable += 8;172 173 if (dcbent->lvdsconf.use_straps_for_mode) {174 if (bios->fp.dual_link)175 clktable += 4;176 if (bios->fp.if_is_24bit)177 clktable += 2;178 } else {179 /* using EDID */180 int cmpval_24bit = (dcbent->or == 4) ? 4 : 1;181 182 if (bios->fp.dual_link) {183 clktable += 4;184 cmpval_24bit <<= 1;185 }186 187 if (bios->fp.strapless_is_24bit & cmpval_24bit)188 clktable += 2;189 }190 191 clktable = ROM16(bios->data[clktable]);192 if (!clktable) {193 NV_ERROR(drm, "Pixel clock comparison table not found\n");194 return -ENOENT;195 }196 scriptptr = clkcmptable(bios, clktable, pxclk);197 }198 199 if (!scriptptr) {200 NV_ERROR(drm, "LVDS output init script not found\n");201 return -ENOENT;202 }203 run_digital_op_script(dev, scriptptr, dcbent, head, bios->fp.dual_link);204 205 return 0;206}207 208int call_lvds_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk)209{210 /*211 * LVDS operations are multiplexed in an effort to present a single API212 * which works with two vastly differing underlying structures.213 * This acts as the demux214 */215 216 struct nouveau_drm *drm = nouveau_drm(dev);217 struct nvif_object *device = &drm->client.device.object;218 struct nvbios *bios = &drm->vbios;219 uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];220 uint32_t sel_clk_binding, sel_clk;221 int ret;222 223 if (bios->fp.last_script_invoc == (script << 1 | head) || !lvds_ver ||224 (lvds_ver >= 0x30 && script == LVDS_INIT))225 return 0;226 227 if (!bios->fp.lvds_init_run) {228 bios->fp.lvds_init_run = true;229 call_lvds_script(dev, dcbent, head, LVDS_INIT, pxclk);230 }231 232 if (script == LVDS_PANEL_ON && bios->fp.reset_after_pclk_change)233 call_lvds_script(dev, dcbent, head, LVDS_RESET, pxclk);234 if (script == LVDS_RESET && bios->fp.power_off_for_reset)235 call_lvds_script(dev, dcbent, head, LVDS_PANEL_OFF, pxclk);236 237 NV_INFO(drm, "Calling LVDS script %d:\n", script);238 239 /* don't let script change pll->head binding */240 sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000;241 242 if (lvds_ver < 0x30)243 ret = call_lvds_manufacturer_script(dev, dcbent, head, script);244 else245 ret = run_lvds_table(dev, dcbent, head, script, pxclk);246 247 bios->fp.last_script_invoc = (script << 1 | head);248 249 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;250 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);251 /* some scripts set a value in NV_PBUS_POWERCTRL_2 and break video overlay */252 nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0);253 254 return ret;255}256 257struct lvdstableheader {258 uint8_t lvds_ver, headerlen, recordlen;259};260 261static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct nvbios *bios, struct lvdstableheader *lth)262{263 /*264 * BMP version (0xa) LVDS table has a simple header of version and265 * record length. The BIT LVDS table has the typical BIT table header:266 * version byte, header length byte, record length byte, and a byte for267 * the maximum number of records that can be held in the table.268 */269 270 struct nouveau_drm *drm = nouveau_drm(dev);271 uint8_t lvds_ver, headerlen, recordlen;272 273 memset(lth, 0, sizeof(struct lvdstableheader));274 275 if (bios->fp.lvdsmanufacturerpointer == 0x0) {276 NV_ERROR(drm, "Pointer to LVDS manufacturer table invalid\n");277 return -EINVAL;278 }279 280 lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];281 282 switch (lvds_ver) {283 case 0x0a: /* pre NV40 */284 headerlen = 2;285 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];286 break;287 case 0x30: /* NV4x */288 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];289 if (headerlen < 0x1f) {290 NV_ERROR(drm, "LVDS table header not understood\n");291 return -EINVAL;292 }293 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];294 break;295 case 0x40: /* G80/G90 */296 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];297 if (headerlen < 0x7) {298 NV_ERROR(drm, "LVDS table header not understood\n");299 return -EINVAL;300 }301 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];302 break;303 default:304 NV_ERROR(drm,305 "LVDS table revision %d.%d not currently supported\n",306 lvds_ver >> 4, lvds_ver & 0xf);307 return -ENOSYS;308 }309 310 lth->lvds_ver = lvds_ver;311 lth->headerlen = headerlen;312 lth->recordlen = recordlen;313 314 return 0;315}316 317static int318get_fp_strap(struct drm_device *dev, struct nvbios *bios)319{320 struct nouveau_drm *drm = nouveau_drm(dev);321 struct nvif_object *device = &drm->client.device.object;322 323 /*324 * The fp strap is normally dictated by the "User Strap" in325 * PEXTDEV_BOOT_0[20:16], but on BMP cards when bit 2 of the326 * Internal_Flags struct at 0x48 is set, the user strap gets overriden327 * by the PCI subsystem ID during POST, but not before the previous user328 * strap has been committed to CR58 for CR57=0xf on head A, which may be329 * read and used instead330 */331 332 if (bios->major_version < 5 && bios->data[0x48] & 0x4)333 return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf;334 335 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_MAXWELL)336 return nvif_rd32(device, 0x001800) & 0x0000000f;337 else338 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA)339 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf;340 else341 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 16) & 0xf;342}343 344static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios)345{346 struct nouveau_drm *drm = nouveau_drm(dev);347 uint8_t *fptable;348 uint8_t fptable_ver, headerlen = 0, recordlen, fpentries = 0xf, fpindex;349 int ret, ofs, fpstrapping;350 struct lvdstableheader lth;351 352 if (bios->fp.fptablepointer == 0x0) {353 /* Most laptop cards lack an fp table. They use DDC. */354 NV_DEBUG(drm, "Pointer to flat panel table invalid\n");355 bios->digital_min_front_porch = 0x4b;356 return 0;357 }358 359 fptable = &bios->data[bios->fp.fptablepointer];360 fptable_ver = fptable[0];361 362 switch (fptable_ver) {363 /*364 * BMP version 0x5.0x11 BIOSen have version 1 like tables, but no365 * version field, and miss one of the spread spectrum/PWM bytes.366 * This could affect early GF2Go parts (not seen any appropriate ROMs367 * though). Here we assume that a version of 0x05 matches this case368 * (combining with a BMP version check would be better), as the369 * common case for the panel type field is 0x0005, and that is in370 * fact what we are reading the first byte of.371 */372 case 0x05: /* some NV10, 11, 15, 16 */373 recordlen = 42;374 ofs = -1;375 break;376 case 0x10: /* some NV15/16, and NV11+ */377 recordlen = 44;378 ofs = 0;379 break;380 case 0x20: /* NV40+ */381 headerlen = fptable[1];382 recordlen = fptable[2];383 fpentries = fptable[3];384 /*385 * fptable[4] is the minimum386 * RAMDAC_FP_HCRTC -> RAMDAC_FP_HSYNC_START gap387 */388 bios->digital_min_front_porch = fptable[4];389 ofs = -7;390 break;391 default:392 NV_ERROR(drm,393 "FP table revision %d.%d not currently supported\n",394 fptable_ver >> 4, fptable_ver & 0xf);395 return -ENOSYS;396 }397 398 if (!bios->is_mobile) /* !mobile only needs digital_min_front_porch */399 return 0;400 401 ret = parse_lvds_manufacturer_table_header(dev, bios, <h);402 if (ret)403 return ret;404 405 if (lth.lvds_ver == 0x30 || lth.lvds_ver == 0x40) {406 bios->fp.fpxlatetableptr = bios->fp.lvdsmanufacturerpointer +407 lth.headerlen + 1;408 bios->fp.xlatwidth = lth.recordlen;409 }410 if (bios->fp.fpxlatetableptr == 0x0) {411 NV_ERROR(drm, "Pointer to flat panel xlat table invalid\n");412 return -EINVAL;413 }414 415 fpstrapping = get_fp_strap(dev, bios);416 417 fpindex = bios->data[bios->fp.fpxlatetableptr +418 fpstrapping * bios->fp.xlatwidth];419 420 if (fpindex > fpentries) {421 NV_ERROR(drm, "Bad flat panel table index\n");422 return -ENOENT;423 }424 425 /* nv4x cards need both a strap value and fpindex of 0xf to use DDC */426 if (lth.lvds_ver > 0x10)427 bios->fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf;428 429 /*430 * If either the strap or xlated fpindex value are 0xf there is no431 * panel using a strap-derived bios mode present. this condition432 * includes, but is different from, the DDC panel indicator above433 */434 if (fpstrapping == 0xf || fpindex == 0xf)435 return 0;436 437 bios->fp.mode_ptr = bios->fp.fptablepointer + headerlen +438 recordlen * fpindex + ofs;439 440 NV_INFO(drm, "BIOS FP mode: %dx%d (%dkHz pixel clock)\n",441 ROM16(bios->data[bios->fp.mode_ptr + 11]) + 1,442 ROM16(bios->data[bios->fp.mode_ptr + 25]) + 1,443 ROM16(bios->data[bios->fp.mode_ptr + 7]) * 10);444 445 return 0;446}447 448bool nouveau_bios_fp_mode(struct drm_device *dev, struct drm_display_mode *mode)449{450 struct nouveau_drm *drm = nouveau_drm(dev);451 struct nvbios *bios = &drm->vbios;452 uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr];453 454 if (!mode) /* just checking whether we can produce a mode */455 return bios->fp.mode_ptr;456 457 memset(mode, 0, sizeof(struct drm_display_mode));458 /*459 * For version 1.0 (version in byte 0):460 * bytes 1-2 are "panel type", including bits on whether Colour/mono,461 * single/dual link, and type (TFT etc.)462 * bytes 3-6 are bits per colour in RGBX463 */464 mode->clock = ROM16(mode_entry[7]) * 10;465 /* bytes 9-10 is HActive */466 mode->hdisplay = ROM16(mode_entry[11]) + 1;467 /*468 * bytes 13-14 is HValid Start469 * bytes 15-16 is HValid End470 */471 mode->hsync_start = ROM16(mode_entry[17]) + 1;472 mode->hsync_end = ROM16(mode_entry[19]) + 1;473 mode->htotal = ROM16(mode_entry[21]) + 1;474 /* bytes 23-24, 27-30 similarly, but vertical */475 mode->vdisplay = ROM16(mode_entry[25]) + 1;476 mode->vsync_start = ROM16(mode_entry[31]) + 1;477 mode->vsync_end = ROM16(mode_entry[33]) + 1;478 mode->vtotal = ROM16(mode_entry[35]) + 1;479 mode->flags |= (mode_entry[37] & 0x10) ?480 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;481 mode->flags |= (mode_entry[37] & 0x1) ?482 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;483 /*484 * bytes 38-39 relate to spread spectrum settings485 * bytes 40-43 are something to do with PWM486 */487 488 mode->status = MODE_OK;489 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;490 drm_mode_set_name(mode);491 return bios->fp.mode_ptr;492}493 494int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, bool *if_is_24bit)495{496 /*497 * The LVDS table header is (mostly) described in498 * parse_lvds_manufacturer_table_header(): the BIT header additionally499 * contains the dual-link transition pxclk (in 10s kHz), at byte 5 - if500 * straps are not being used for the panel, this specifies the frequency501 * at which modes should be set up in the dual link style.502 *503 * Following the header, the BMP (ver 0xa) table has several records,504 * indexed by a separate xlat table, indexed in turn by the fp strap in505 * EXTDEV_BOOT. Each record had a config byte, followed by 6 script506 * numbers for use by INIT_SUB which controlled panel init and power,507 * and finally a dword of ms to sleep between power off and on508 * operations.509 *510 * In the BIT versions, the table following the header serves as an511 * integrated config and xlat table: the records in the table are512 * indexed by the FP strap nibble in EXTDEV_BOOT, and each record has513 * two bytes - the first as a config byte, the second for indexing the514 * fp mode table pointed to by the BIT 'D' table515 *516 * DDC is not used until after card init, so selecting the correct table517 * entry and setting the dual link flag for EDID equipped panels,518 * requiring tests against the native-mode pixel clock, cannot be done519 * until later, when this function should be called with non-zero pxclk520 */521 struct nouveau_drm *drm = nouveau_drm(dev);522 struct nvbios *bios = &drm->vbios;523 int fpstrapping = get_fp_strap(dev, bios), lvdsmanufacturerindex = 0;524 struct lvdstableheader lth;525 uint16_t lvdsofs;526 int ret, chip_version = bios->chip_version;527 528 ret = parse_lvds_manufacturer_table_header(dev, bios, <h);529 if (ret)530 return ret;531 532 switch (lth.lvds_ver) {533 case 0x0a: /* pre NV40 */534 lvdsmanufacturerindex = bios->data[535 bios->fp.fpxlatemanufacturertableptr +536 fpstrapping];537 538 /* we're done if this isn't the EDID panel case */539 if (!pxclk)540 break;541 542 if (chip_version < 0x25) {543 /* nv17 behaviour544 *545 * It seems the old style lvds script pointer is reused546 * to select 18/24 bit colour depth for EDID panels.547 */548 lvdsmanufacturerindex =549 (bios->legacy.lvds_single_a_script_ptr & 1) ?550 2 : 0;551 if (pxclk >= bios->fp.duallink_transition_clk)552 lvdsmanufacturerindex++;553 } else if (chip_version < 0x30) {554 /* nv28 behaviour (off-chip encoder)555 *556 * nv28 does a complex dance of first using byte 121 of557 * the EDID to choose the lvdsmanufacturerindex, then558 * later attempting to match the EDID manufacturer and559 * product IDs in a table (signature 'pidt' (panel id560 * table?)), setting an lvdsmanufacturerindex of 0 and561 * an fp strap of the match index (or 0xf if none)562 */563 lvdsmanufacturerindex = 0;564 } else {565 /* nv31, nv34 behaviour */566 lvdsmanufacturerindex = 0;567 if (pxclk >= bios->fp.duallink_transition_clk)568 lvdsmanufacturerindex = 2;569 if (pxclk >= 140000)570 lvdsmanufacturerindex = 3;571 }572 573 /*574 * nvidia set the high nibble of (cr57=f, cr58) to575 * lvdsmanufacturerindex in this case; we don't576 */577 break;578 case 0x30: /* NV4x */579 case 0x40: /* G80/G90 */580 lvdsmanufacturerindex = fpstrapping;581 break;582 default:583 NV_ERROR(drm, "LVDS table revision not currently supported\n");584 return -ENOSYS;585 }586 587 lvdsofs = bios->fp.xlated_entry = bios->fp.lvdsmanufacturerpointer + lth.headerlen + lth.recordlen * lvdsmanufacturerindex;588 switch (lth.lvds_ver) {589 case 0x0a:590 bios->fp.power_off_for_reset = bios->data[lvdsofs] & 1;591 bios->fp.reset_after_pclk_change = bios->data[lvdsofs] & 2;592 bios->fp.dual_link = bios->data[lvdsofs] & 4;593 bios->fp.link_c_increment = bios->data[lvdsofs] & 8;594 *if_is_24bit = bios->data[lvdsofs] & 16;595 break;596 case 0x30:597 case 0x40:598 /*599 * No sign of the "power off for reset" or "reset for panel600 * on" bits, but it's safer to assume we should601 */602 bios->fp.power_off_for_reset = true;603 bios->fp.reset_after_pclk_change = true;604 605 /*606 * It's ok lvdsofs is wrong for nv4x edid case; dual_link is607 * over-written, and if_is_24bit isn't used608 */609 bios->fp.dual_link = bios->data[lvdsofs] & 1;610 bios->fp.if_is_24bit = bios->data[lvdsofs] & 2;611 bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4];612 bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10;613 break;614 }615 616 /* set dual_link flag for EDID case */617 if (pxclk && (chip_version < 0x25 || chip_version > 0x28))618 bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk);619 620 *dl = bios->fp.dual_link;621 622 return 0;623}624 625int run_tmds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, int pxclk)626{627 /*628 * the pxclk parameter is in kHz629 *630 * This runs the TMDS regs setting code found on BIT bios cards631 *632 * For ffs(or) == 1 use the first table, for ffs(or) == 2 and633 * ffs(or) == 3, use the second.634 */635 636 struct nouveau_drm *drm = nouveau_drm(dev);637 struct nvif_object *device = &drm->client.device.object;638 struct nvbios *bios = &drm->vbios;639 int cv = bios->chip_version;640 uint16_t clktable = 0, scriptptr;641 uint32_t sel_clk_binding, sel_clk;642 643 /* pre-nv17 off-chip tmds uses scripts, post nv17 doesn't */644 if (cv >= 0x17 && cv != 0x1a && cv != 0x20 &&645 dcbent->location != DCB_LOC_ON_CHIP)646 return 0;647 648 switch (ffs(dcbent->or)) {649 case 1:650 clktable = bios->tmds.output0_script_ptr;651 break;652 case 2:653 case 3:654 clktable = bios->tmds.output1_script_ptr;655 break;656 }657 658 if (!clktable) {659 NV_ERROR(drm, "Pixel clock comparison table not found\n");660 return -EINVAL;661 }662 663 scriptptr = clkcmptable(bios, clktable, pxclk);664 665 if (!scriptptr) {666 NV_ERROR(drm, "TMDS output init script not found\n");667 return -ENOENT;668 }669 670 /* don't let script change pll->head binding */671 sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000;672 run_digital_op_script(dev, scriptptr, dcbent, head, pxclk >= 165000);673 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;674 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);675 676 return 0;677}678 679static void parse_script_table_pointers(struct nvbios *bios, uint16_t offset)680{681 /*682 * Parses the init table segment for pointers used in script execution.683 *684 * offset + 0 (16 bits): init script tables pointer685 * offset + 2 (16 bits): macro index table pointer686 * offset + 4 (16 bits): macro table pointer687 * offset + 6 (16 bits): condition table pointer688 * offset + 8 (16 bits): io condition table pointer689 * offset + 10 (16 bits): io flag condition table pointer690 * offset + 12 (16 bits): init function table pointer691 */692 693 bios->init_script_tbls_ptr = ROM16(bios->data[offset]);694}695 696static int parse_bit_A_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)697{698 /*699 * Parses the load detect values for g80 cards.700 *701 * offset + 0 (16 bits): loadval table pointer702 */703 704 struct nouveau_drm *drm = nouveau_drm(dev);705 uint16_t load_table_ptr;706 uint8_t version, headerlen, entrylen, num_entries;707 708 if (bitentry->length != 3) {709 NV_ERROR(drm, "Do not understand BIT A table\n");710 return -EINVAL;711 }712 713 load_table_ptr = ROM16(bios->data[bitentry->offset]);714 715 if (load_table_ptr == 0x0) {716 NV_DEBUG(drm, "Pointer to BIT loadval table invalid\n");717 return -EINVAL;718 }719 720 version = bios->data[load_table_ptr];721 722 if (version != 0x10) {723 NV_ERROR(drm, "BIT loadval table version %d.%d not supported\n",724 version >> 4, version & 0xF);725 return -ENOSYS;726 }727 728 headerlen = bios->data[load_table_ptr + 1];729 entrylen = bios->data[load_table_ptr + 2];730 num_entries = bios->data[load_table_ptr + 3];731 732 if (headerlen != 4 || entrylen != 4 || num_entries != 2) {733 NV_ERROR(drm, "Do not understand BIT loadval table\n");734 return -EINVAL;735 }736 737 /* First entry is normal dac, 2nd tv-out perhaps? */738 bios->dactestval = ROM32(bios->data[load_table_ptr + headerlen]) & 0x3ff;739 740 return 0;741}742 743static int parse_bit_display_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)744{745 /*746 * Parses the flat panel table segment that the bit entry points to.747 * Starting at bitentry->offset:748 *749 * offset + 0 (16 bits): ??? table pointer - seems to have 18 byte750 * records beginning with a freq.751 * offset + 2 (16 bits): mode table pointer752 */753 struct nouveau_drm *drm = nouveau_drm(dev);754 755 if (bitentry->length != 4) {756 NV_ERROR(drm, "Do not understand BIT display table\n");757 return -EINVAL;758 }759 760 bios->fp.fptablepointer = ROM16(bios->data[bitentry->offset + 2]);761 762 return 0;763}764 765static int parse_bit_init_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)766{767 /*768 * Parses the init table segment that the bit entry points to.769 *770 * See parse_script_table_pointers for layout771 */772 struct nouveau_drm *drm = nouveau_drm(dev);773 774 if (bitentry->length < 14) {775 NV_ERROR(drm, "Do not understand init table\n");776 return -EINVAL;777 }778 779 parse_script_table_pointers(bios, bitentry->offset);780 return 0;781}782 783static int parse_bit_i_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)784{785 /*786 * BIT 'i' (info?) table787 *788 * offset + 0 (32 bits): BIOS version dword (as in B table)789 * offset + 5 (8 bits): BIOS feature byte (same as for BMP?)790 * offset + 13 (16 bits): pointer to table containing DAC load791 * detection comparison values792 *793 * There's other things in the table, purpose unknown794 */795 796 struct nouveau_drm *drm = nouveau_drm(dev);797 uint16_t daccmpoffset;798 uint8_t dacver, dacheaderlen;799 800 if (bitentry->length < 6) {801 NV_ERROR(drm, "BIT i table too short for needed information\n");802 return -EINVAL;803 }804 805 /*806 * bit 4 seems to indicate a mobile bios (doesn't suffer from BMP's807 * Quadro identity crisis), other bits possibly as for BMP feature byte808 */809 bios->feature_byte = bios->data[bitentry->offset + 5];810 bios->is_mobile = bios->feature_byte & FEATURE_MOBILE;811 812 if (bitentry->length < 15) {813 NV_WARN(drm, "BIT i table not long enough for DAC load "814 "detection comparison table\n");815 return -EINVAL;816 }817 818 daccmpoffset = ROM16(bios->data[bitentry->offset + 13]);819 820 /* doesn't exist on g80 */821 if (!daccmpoffset)822 return 0;823 824 /*825 * The first value in the table, following the header, is the826 * comparison value, the second entry is a comparison value for827 * TV load detection.828 */829 830 dacver = bios->data[daccmpoffset];831 dacheaderlen = bios->data[daccmpoffset + 1];832 833 if (dacver != 0x00 && dacver != 0x10) {834 NV_WARN(drm, "DAC load detection comparison table version "835 "%d.%d not known\n", dacver >> 4, dacver & 0xf);836 return -ENOSYS;837 }838 839 bios->dactestval = ROM32(bios->data[daccmpoffset + dacheaderlen]);840 bios->tvdactestval = ROM32(bios->data[daccmpoffset + dacheaderlen + 4]);841 842 return 0;843}844 845static int parse_bit_lvds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)846{847 /*848 * Parses the LVDS table segment that the bit entry points to.849 * Starting at bitentry->offset:850 *851 * offset + 0 (16 bits): LVDS strap xlate table pointer852 */853 854 struct nouveau_drm *drm = nouveau_drm(dev);855 856 if (bitentry->length != 2) {857 NV_ERROR(drm, "Do not understand BIT LVDS table\n");858 return -EINVAL;859 }860 861 /*862 * No idea if it's still called the LVDS manufacturer table, but863 * the concept's close enough.864 */865 bios->fp.lvdsmanufacturerpointer = ROM16(bios->data[bitentry->offset]);866 867 return 0;868}869 870static int871parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios,872 struct bit_entry *bitentry)873{874 /*875 * offset + 2 (8 bits): number of options in an876 * INIT_RAM_RESTRICT_ZM_REG_GROUP opcode option set877 * offset + 3 (16 bits): pointer to strap xlate table for RAM878 * restrict option selection879 *880 * There's a bunch of bits in this table other than the RAM restrict881 * stuff that we don't use - their use currently unknown882 */883 884 /*885 * Older bios versions don't have a sufficiently long table for886 * what we want887 */888 if (bitentry->length < 0x5)889 return 0;890 891 if (bitentry->version < 2) {892 bios->ram_restrict_group_count = bios->data[bitentry->offset + 2];893 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]);894 } else {895 bios->ram_restrict_group_count = bios->data[bitentry->offset + 0];896 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]);897 }898 899 return 0;900}901 902static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)903{904 /*905 * Parses the pointer to the TMDS table906 *907 * Starting at bitentry->offset:908 *909 * offset + 0 (16 bits): TMDS table pointer910 *911 * The TMDS table is typically found just before the DCB table, with a912 * characteristic signature of 0x11,0x13 (1.1 being version, 0x13 being913 * length?)914 *915 * At offset +7 is a pointer to a script, which I don't know how to916 * run yet.917 * At offset +9 is a pointer to another script, likewise918 * Offset +11 has a pointer to a table where the first word is a pxclk919 * frequency and the second word a pointer to a script, which should be920 * run if the comparison pxclk frequency is less than the pxclk desired.921 * This repeats for decreasing comparison frequencies922 * Offset +13 has a pointer to a similar table923 * The selection of table (and possibly +7/+9 script) is dictated by924 * "or" from the DCB.925 */926 927 struct nouveau_drm *drm = nouveau_drm(dev);928 uint16_t tmdstableptr, script1, script2;929 930 if (bitentry->length != 2) {931 NV_ERROR(drm, "Do not understand BIT TMDS table\n");932 return -EINVAL;933 }934 935 tmdstableptr = ROM16(bios->data[bitentry->offset]);936 if (!tmdstableptr) {937 NV_INFO(drm, "Pointer to TMDS table not found\n");938 return -EINVAL;939 }940 941 NV_INFO(drm, "TMDS table version %d.%d\n",942 bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf);943 944 /* nv50+ has v2.0, but we don't parse it atm */945 if (bios->data[tmdstableptr] != 0x11)946 return -ENOSYS;947 948 /*949 * These two scripts are odd: they don't seem to get run even when950 * they are not stubbed.951 */952 script1 = ROM16(bios->data[tmdstableptr + 7]);953 script2 = ROM16(bios->data[tmdstableptr + 9]);954 if (bios->data[script1] != 'q' || bios->data[script2] != 'q')955 NV_WARN(drm, "TMDS table script pointers not stubbed\n");956 957 bios->tmds.output0_script_ptr = ROM16(bios->data[tmdstableptr + 11]);958 bios->tmds.output1_script_ptr = ROM16(bios->data[tmdstableptr + 13]);959 960 return 0;961}962 963struct bit_table {964 const char id;965 int (* const parse_fn)(struct drm_device *, struct nvbios *, struct bit_entry *);966};967 968#define BIT_TABLE(id, funcid) ((struct bit_table){ id, parse_bit_##funcid##_tbl_entry })969 970int971bit_table(struct drm_device *dev, u8 id, struct bit_entry *bit)972{973 struct nouveau_drm *drm = nouveau_drm(dev);974 struct nvbios *bios = &drm->vbios;975 u8 entries, *entry;976 977 if (bios->type != NVBIOS_BIT)978 return -ENODEV;979 980 entries = bios->data[bios->offset + 10];981 entry = &bios->data[bios->offset + 12];982 while (entries--) {983 if (entry[0] == id) {984 bit->id = entry[0];985 bit->version = entry[1];986 bit->length = ROM16(entry[2]);987 bit->offset = ROM16(entry[4]);988 bit->data = ROMPTR(dev, entry[4]);989 return 0;990 }991 992 entry += bios->data[bios->offset + 9];993 }994 995 return -ENOENT;996}997 998static int999parse_bit_table(struct nvbios *bios, const uint16_t bitoffset,1000 struct bit_table *table)1001{1002 struct drm_device *dev = bios->dev;1003 struct nouveau_drm *drm = nouveau_drm(dev);1004 struct bit_entry bitentry;1005 1006 if (bit_table(dev, table->id, &bitentry) == 0)1007 return table->parse_fn(dev, bios, &bitentry);1008 1009 NV_INFO(drm, "BIT table '%c' not found\n", table->id);1010 return -ENOSYS;1011}1012 1013static int1014parse_bit_structure(struct nvbios *bios, const uint16_t bitoffset)1015{1016 int ret;1017 1018 /*1019 * The only restriction on parsing order currently is having 'i' first1020 * for use of bios->*_version or bios->feature_byte while parsing;1021 * functions shouldn't be actually *doing* anything apart from pulling1022 * data from the image into the bios struct, thus no interdependencies1023 */1024 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('i', i));1025 if (ret) /* info? */1026 return ret;1027 if (bios->major_version >= 0x60) /* g80+ */1028 parse_bit_table(bios, bitoffset, &BIT_TABLE('A', A));1029 parse_bit_table(bios, bitoffset, &BIT_TABLE('D', display));1030 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('I', init));1031 if (ret)1032 return ret;1033 parse_bit_table(bios, bitoffset, &BIT_TABLE('M', M)); /* memory? */1034 parse_bit_table(bios, bitoffset, &BIT_TABLE('L', lvds));1035 parse_bit_table(bios, bitoffset, &BIT_TABLE('T', tmds));1036 1037 return 0;1038}1039 1040static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsigned int offset)1041{1042 /*1043 * Parses the BMP structure for useful things, but does not act on them1044 *1045 * offset + 5: BMP major version1046 * offset + 6: BMP minor version1047 * offset + 9: BMP feature byte1048 * offset + 10: BCD encoded BIOS version1049 *1050 * offset + 18: init script table pointer (for bios versions < 5.10h)1051 * offset + 20: extra init script table pointer (for bios1052 * versions < 5.10h)1053 *1054 * offset + 24: memory init table pointer (used on early bios versions)1055 * offset + 26: SDR memory sequencing setup data table1056 * offset + 28: DDR memory sequencing setup data table1057 *1058 * offset + 54: index of I2C CRTC pair to use for CRT output1059 * offset + 55: index of I2C CRTC pair to use for TV output1060 * offset + 56: index of I2C CRTC pair to use for flat panel output1061 * offset + 58: write CRTC index for I2C pair 01062 * offset + 59: read CRTC index for I2C pair 01063 * offset + 60: write CRTC index for I2C pair 11064 * offset + 61: read CRTC index for I2C pair 11065 *1066 * offset + 67: maximum internal PLL frequency (single stage PLL)1067 * offset + 71: minimum internal PLL frequency (single stage PLL)1068 *1069 * offset + 75: script table pointers, as described in1070 * parse_script_table_pointers1071 *1072 * offset + 89: TMDS single link output A table pointer1073 * offset + 91: TMDS single link output B table pointer1074 * offset + 95: LVDS single link output A table pointer1075 * offset + 105: flat panel timings table pointer1076 * offset + 107: flat panel strapping translation table pointer1077 * offset + 117: LVDS manufacturer panel config table pointer1078 * offset + 119: LVDS manufacturer strapping translation table pointer1079 *1080 * offset + 142: PLL limits table pointer1081 *1082 * offset + 156: minimum pixel clock for LVDS dual link1083 */1084 1085 struct nouveau_drm *drm = nouveau_drm(dev);1086 uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor;1087 uint16_t bmplength;1088 uint16_t legacy_scripts_offset, legacy_i2c_offset;1089 1090 /* load needed defaults in case we can't parse this info */1091 bios->digital_min_front_porch = 0x4b;1092 bios->fmaxvco = 256000;1093 bios->fminvco = 128000;1094 bios->fp.duallink_transition_clk = 90000;1095 1096 bmp_version_major = bmp[5];1097 bmp_version_minor = bmp[6];1098 1099 NV_INFO(drm, "BMP version %d.%d\n",1100 bmp_version_major, bmp_version_minor);1101 1102 /*1103 * Make sure that 0x36 is blank and can't be mistaken for a DCB1104 * pointer on early versions1105 */1106 if (bmp_version_major < 5)1107 *(uint16_t *)&bios->data[0x36] = 0;1108 1109 /*1110 * Seems that the minor version was 1 for all major versions prior1111 * to 5. Version 6 could theoretically exist, but I suspect BIT1112 * happened instead.1113 */1114 if ((bmp_version_major < 5 && bmp_version_minor != 1) || bmp_version_major > 5) {1115 NV_ERROR(drm, "You have an unsupported BMP version. "1116 "Please send in your bios\n");1117 return -ENOSYS;1118 }1119 1120 if (bmp_version_major == 0)1121 /* nothing that's currently useful in this version */1122 return 0;1123 else if (bmp_version_major == 1)1124 bmplength = 44; /* exact for 1.01 */1125 else if (bmp_version_major == 2)1126 bmplength = 48; /* exact for 2.01 */1127 else if (bmp_version_major == 3)1128 bmplength = 54;1129 /* guessed - mem init tables added in this version */1130 else if (bmp_version_major == 4 || bmp_version_minor < 0x1)1131 /* don't know if 5.0 exists... */1132 bmplength = 62;1133 /* guessed - BMP I2C indices added in version 4*/1134 else if (bmp_version_minor < 0x6)1135 bmplength = 67; /* exact for 5.01 */1136 else if (bmp_version_minor < 0x10)1137 bmplength = 75; /* exact for 5.06 */1138 else if (bmp_version_minor == 0x10)1139 bmplength = 89; /* exact for 5.10h */1140 else if (bmp_version_minor < 0x14)1141 bmplength = 118; /* exact for 5.11h */1142 else if (bmp_version_minor < 0x24)1143 /*1144 * Not sure of version where pll limits came in;1145 * certainly exist by 0x24 though.1146 */1147 /* length not exact: this is long enough to get lvds members */1148 bmplength = 123;1149 else if (bmp_version_minor < 0x27)1150 /*1151 * Length not exact: this is long enough to get pll limit1152 * member1153 */1154 bmplength = 144;1155 else1156 /*1157 * Length not exact: this is long enough to get dual link1158 * transition clock.1159 */1160 bmplength = 158;1161 1162 /* checksum */1163 if (nv_cksum(bmp, 8)) {1164 NV_ERROR(drm, "Bad BMP checksum\n");1165 return -EINVAL;1166 }1167 1168 /*1169 * Bit 4 seems to indicate either a mobile bios or a quadro card --1170 * mobile behaviour consistent (nv11+), quadro only seen nv18gl-nv36gl1171 * (not nv10gl), bit 5 that the flat panel tables are present, and1172 * bit 6 a tv bios.1173 */1174 bios->feature_byte = bmp[9];1175 1176 if (bmp_version_major < 5 || bmp_version_minor < 0x10)1177 bios->old_style_init = true;1178 legacy_scripts_offset = 18;1179 if (bmp_version_major < 2)1180 legacy_scripts_offset -= 4;1181 bios->init_script_tbls_ptr = ROM16(bmp[legacy_scripts_offset]);1182 bios->extra_init_script_tbl_ptr = ROM16(bmp[legacy_scripts_offset + 2]);1183 1184 if (bmp_version_major > 2) { /* appears in BMP 3 */1185 bios->legacy.mem_init_tbl_ptr = ROM16(bmp[24]);1186 bios->legacy.sdr_seq_tbl_ptr = ROM16(bmp[26]);1187 bios->legacy.ddr_seq_tbl_ptr = ROM16(bmp[28]);1188 }1189 1190 legacy_i2c_offset = 0x48; /* BMP version 2 & 3 */1191 if (bmplength > 61)1192 legacy_i2c_offset = offset + 54;1193 bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset];1194 bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1];1195 bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2];1196 1197 if (bmplength > 74) {1198 bios->fmaxvco = ROM32(bmp[67]);1199 bios->fminvco = ROM32(bmp[71]);1200 }1201 if (bmplength > 88)1202 parse_script_table_pointers(bios, offset + 75);1203 if (bmplength > 94) {1204 bios->tmds.output0_script_ptr = ROM16(bmp[89]);1205 bios->tmds.output1_script_ptr = ROM16(bmp[91]);1206 /*1207 * Never observed in use with lvds scripts, but is reused for1208 * 18/24 bit panel interface default for EDID equipped panels1209 * (if_is_24bit not set directly to avoid any oscillation).1210 */1211 bios->legacy.lvds_single_a_script_ptr = ROM16(bmp[95]);1212 }1213 if (bmplength > 108) {1214 bios->fp.fptablepointer = ROM16(bmp[105]);1215 bios->fp.fpxlatetableptr = ROM16(bmp[107]);1216 bios->fp.xlatwidth = 1;1217 }1218 if (bmplength > 120) {1219 bios->fp.lvdsmanufacturerpointer = ROM16(bmp[117]);1220 bios->fp.fpxlatemanufacturertableptr = ROM16(bmp[119]);1221 }1222#if 01223 if (bmplength > 143)1224 bios->pll_limit_tbl_ptr = ROM16(bmp[142]);1225#endif1226 1227 if (bmplength > 157)1228 bios->fp.duallink_transition_clk = ROM16(bmp[156]) * 10;1229 1230 return 0;1231}1232 1233static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len)1234{1235 int i, j;1236 1237 for (i = 0; i <= (n - len); i++) {1238 for (j = 0; j < len; j++)1239 if (data[i + j] != str[j])1240 break;1241 if (j == len)1242 return i;1243 }1244 1245 return 0;1246}1247 1248void *1249olddcb_table(struct drm_device *dev)1250{1251 struct nouveau_drm *drm = nouveau_drm(dev);1252 u8 *dcb = NULL;1253 1254 if (drm->client.device.info.family > NV_DEVICE_INFO_V0_TNT)1255 dcb = ROMPTR(dev, drm->vbios.data[0x36]);1256 if (!dcb) {1257 NV_WARN(drm, "No DCB data found in VBIOS\n");1258 return NULL;1259 }1260 1261 if (dcb[0] >= 0x42) {1262 NV_WARN(drm, "DCB version 0x%02x unknown\n", dcb[0]);1263 return NULL;1264 } else1265 if (dcb[0] >= 0x30) {1266 if (ROM32(dcb[6]) == 0x4edcbdcb)1267 return dcb;1268 } else1269 if (dcb[0] >= 0x20) {1270 if (ROM32(dcb[4]) == 0x4edcbdcb)1271 return dcb;1272 } else1273 if (dcb[0] >= 0x15) {1274 if (!memcmp(&dcb[-7], "DEV_REC", 7))1275 return dcb;1276 } else {1277 /*1278 * v1.4 (some NV15/16, NV11+) seems the same as v1.5, but1279 * always has the same single (crt) entry, even when tv-out1280 * present, so the conclusion is this version cannot really1281 * be used.1282 *1283 * v1.2 tables (some NV6/10, and NV15+) normally have the1284 * same 5 entries, which are not specific to the card and so1285 * no use.1286 *1287 * v1.2 does have an I2C table that read_dcb_i2c_table can1288 * handle, but cards exist (nv11 in #14821) with a bad i2c1289 * table pointer, so use the indices parsed in1290 * parse_bmp_structure.1291 *1292 * v1.1 (NV5+, maybe some NV4) is entirely unhelpful1293 */1294 NV_WARN(drm, "No useful DCB data in VBIOS\n");1295 return NULL;1296 }1297 1298 NV_WARN(drm, "DCB header validation failed\n");1299 return NULL;1300}1301 1302void *1303olddcb_outp(struct drm_device *dev, u8 idx)1304{1305 u8 *dcb = olddcb_table(dev);1306 if (dcb && dcb[0] >= 0x30) {1307 if (idx < dcb[2])1308 return dcb + dcb[1] + (idx * dcb[3]);1309 } else1310 if (dcb && dcb[0] >= 0x20) {1311 u8 *i2c = ROMPTR(dev, dcb[2]);1312 u8 *ent = dcb + 8 + (idx * 8);1313 if (i2c && ent < i2c)1314 return ent;1315 } else1316 if (dcb && dcb[0] >= 0x15) {1317 u8 *i2c = ROMPTR(dev, dcb[2]);1318 u8 *ent = dcb + 4 + (idx * 10);1319 if (i2c && ent < i2c)1320 return ent;1321 }1322 1323 return NULL;1324}1325 1326int1327olddcb_outp_foreach(struct drm_device *dev, void *data,1328 int (*exec)(struct drm_device *, void *, int idx, u8 *outp))1329{1330 int ret, idx = -1;1331 u8 *outp = NULL;1332 while ((outp = olddcb_outp(dev, ++idx))) {1333 if (ROM32(outp[0]) == 0x00000000)1334 break; /* seen on an NV11 with DCB v1.5 */1335 if (ROM32(outp[0]) == 0xffffffff)1336 break; /* seen on an NV17 with DCB v2.0 */1337 1338 if ((outp[0] & 0x0f) == DCB_OUTPUT_UNUSED)1339 continue;1340 if ((outp[0] & 0x0f) == DCB_OUTPUT_EOL)1341 break;1342 1343 ret = exec(dev, data, idx, outp);1344 if (ret)1345 return ret;1346 }1347 1348 return 0;1349}1350 1351u8 *1352olddcb_conntab(struct drm_device *dev)1353{1354 u8 *dcb = olddcb_table(dev);1355 if (dcb && dcb[0] >= 0x30 && dcb[1] >= 0x16) {1356 u8 *conntab = ROMPTR(dev, dcb[0x14]);1357 if (conntab && conntab[0] >= 0x30 && conntab[0] <= 0x40)1358 return conntab;1359 }1360 return NULL;1361}1362 1363u8 *1364olddcb_conn(struct drm_device *dev, u8 idx)1365{1366 u8 *conntab = olddcb_conntab(dev);1367 if (conntab && idx < conntab[2])1368 return conntab + conntab[1] + (idx * conntab[3]);1369 return NULL;1370}1371 1372static struct dcb_output *new_dcb_entry(struct dcb_table *dcb)1373{1374 struct dcb_output *entry = &dcb->entry[dcb->entries];1375 1376 memset(entry, 0, sizeof(struct dcb_output));1377 entry->index = dcb->entries++;1378 1379 return entry;1380}1381 1382static void fabricate_dcb_output(struct dcb_table *dcb, int type, int i2c,1383 int heads, int or)1384{1385 struct dcb_output *entry = new_dcb_entry(dcb);1386 1387 entry->type = type;1388 entry->i2c_index = i2c;1389 entry->heads = heads;1390 if (type != DCB_OUTPUT_ANALOG)1391 entry->location = !DCB_LOC_ON_CHIP; /* ie OFF CHIP */1392 entry->or = or;1393}1394 1395static bool1396parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb,1397 uint32_t conn, uint32_t conf, struct dcb_output *entry)1398{1399 struct nouveau_drm *drm = nouveau_drm(dev);1400 int link = 0;1401 1402 entry->type = conn & 0xf;1403 entry->i2c_index = (conn >> 4) & 0xf;1404 entry->heads = (conn >> 8) & 0xf;1405 entry->connector = (conn >> 12) & 0xf;1406 entry->bus = (conn >> 16) & 0xf;1407 entry->location = (conn >> 20) & 0x3;1408 entry->or = (conn >> 24) & 0xf;1409 1410 switch (entry->type) {1411 case DCB_OUTPUT_ANALOG:1412 /*1413 * Although the rest of a CRT conf dword is usually1414 * zeros, mac biosen have stuff there so we must mask1415 */1416 entry->crtconf.maxfreq = (dcb->version < 0x30) ?1417 (conf & 0xffff) * 10 :1418 (conf & 0xff) * 10000;1419 break;1420 case DCB_OUTPUT_LVDS:1421 {1422 uint32_t mask;1423 if (conf & 0x1)1424 entry->lvdsconf.use_straps_for_mode = true;1425 if (dcb->version < 0x22) {1426 mask = ~0xd;1427 /*1428 * The laptop in bug 14567 lies and claims to not use1429 * straps when it does, so assume all DCB 2.0 laptops1430 * use straps, until a broken EDID using one is produced1431 */1432 entry->lvdsconf.use_straps_for_mode = true;1433 /*1434 * Both 0x4 and 0x8 show up in v2.0 tables; assume they1435 * mean the same thing (probably wrong, but might work)1436 */1437 if (conf & 0x4 || conf & 0x8)1438 entry->lvdsconf.use_power_scripts = true;1439 } else {1440 mask = ~0x7;1441 if (conf & 0x2)1442 entry->lvdsconf.use_acpi_for_edid = true;1443 if (conf & 0x4)1444 entry->lvdsconf.use_power_scripts = true;1445 entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4;1446 link = entry->lvdsconf.sor.link;1447 }1448 if (conf & mask) {1449 /*1450 * Until we even try to use these on G8x, it's1451 * useless reporting unknown bits. They all are.1452 */1453 if (dcb->version >= 0x40)1454 break;1455 1456 NV_ERROR(drm, "Unknown LVDS configuration bits, "1457 "please report\n");1458 }1459 break;1460 }1461 case DCB_OUTPUT_TV:1462 {1463 if (dcb->version >= 0x30)1464 entry->tvconf.has_component_output = conf & (0x8 << 4);1465 else1466 entry->tvconf.has_component_output = false;1467 1468 break;1469 }1470 case DCB_OUTPUT_DP:1471 entry->dpconf.sor.link = (conf & 0x00000030) >> 4;1472 entry->extdev = (conf & 0x0000ff00) >> 8;1473 switch ((conf & 0x00e00000) >> 21) {1474 case 0:1475 entry->dpconf.link_bw = 162000;1476 break;1477 case 1:1478 entry->dpconf.link_bw = 270000;1479 break;1480 case 2:1481 entry->dpconf.link_bw = 540000;1482 break;1483 case 3:1484 default:1485 entry->dpconf.link_bw = 810000;1486 break;1487 }1488 switch ((conf & 0x0f000000) >> 24) {1489 case 0xf:1490 case 0x4:1491 entry->dpconf.link_nr = 4;1492 break;1493 case 0x3:1494 case 0x2:1495 entry->dpconf.link_nr = 2;1496 break;1497 default:1498 entry->dpconf.link_nr = 1;1499 break;1500 }1501 link = entry->dpconf.sor.link;1502 break;1503 case DCB_OUTPUT_TMDS:1504 if (dcb->version >= 0x40) {1505 entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4;1506 entry->extdev = (conf & 0x0000ff00) >> 8;1507 link = entry->tmdsconf.sor.link;1508 }1509 else if (dcb->version >= 0x30)1510 entry->tmdsconf.slave_addr = (conf & 0x00000700) >> 8;1511 else if (dcb->version >= 0x22)1512 entry->tmdsconf.slave_addr = (conf & 0x00000070) >> 4;1513 break;1514 case DCB_OUTPUT_EOL:1515 /* weird g80 mobile type that "nv" treats as a terminator */1516 dcb->entries--;1517 return false;1518 default:1519 break;1520 }1521 1522 if (dcb->version < 0x40) {1523 /* Normal entries consist of a single bit, but dual link has1524 * the next most significant bit set too1525 */1526 entry->duallink_possible =1527 ((1 << (ffs(entry->or) - 1)) * 3 == entry->or);1528 } else {1529 entry->duallink_possible = (entry->sorconf.link == 3);1530 }1531 1532 /* unsure what DCB version introduces this, 3.0? */1533 if (conf & 0x100000)1534 entry->i2c_upper_default = true;1535 1536 entry->hasht = (entry->extdev << 8) | (entry->location << 4) |1537 entry->type;1538 entry->hashm = (entry->heads << 8) | (link << 6) | entry->or;1539 return true;1540}1541 1542static bool1543parse_dcb15_entry(struct drm_device *dev, struct dcb_table *dcb,1544 uint32_t conn, uint32_t conf, struct dcb_output *entry)1545{1546 struct nouveau_drm *drm = nouveau_drm(dev);1547 1548 switch (conn & 0x0000000f) {1549 case 0:1550 entry->type = DCB_OUTPUT_ANALOG;1551 break;1552 case 1:1553 entry->type = DCB_OUTPUT_TV;1554 break;1555 case 2:1556 case 4:1557 if (conn & 0x10)1558 entry->type = DCB_OUTPUT_LVDS;1559 else1560 entry->type = DCB_OUTPUT_TMDS;1561 break;1562 case 3:1563 entry->type = DCB_OUTPUT_LVDS;1564 break;1565 default:1566 NV_ERROR(drm, "Unknown DCB type %d\n", conn & 0x0000000f);1567 return false;1568 }1569 1570 entry->i2c_index = (conn & 0x0003c000) >> 14;1571 entry->heads = ((conn & 0x001c0000) >> 18) + 1;1572 entry->or = entry->heads; /* same as heads, hopefully safe enough */1573 entry->location = (conn & 0x01e00000) >> 21;1574 entry->bus = (conn & 0x0e000000) >> 25;1575 entry->duallink_possible = false;1576 1577 switch (entry->type) {1578 case DCB_OUTPUT_ANALOG:1579 entry->crtconf.maxfreq = (conf & 0xffff) * 10;1580 break;1581 case DCB_OUTPUT_TV:1582 entry->tvconf.has_component_output = false;1583 break;1584 case DCB_OUTPUT_LVDS:1585 if ((conn & 0x00003f00) >> 8 != 0x10)1586 entry->lvdsconf.use_straps_for_mode = true;1587 entry->lvdsconf.use_power_scripts = true;1588 break;1589 default:1590 break;1591 }1592 1593 return true;1594}1595 1596static1597void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb)1598{1599 /*1600 * DCB v2.0 lists each output combination separately.1601 * Here we merge compatible entries to have fewer outputs, with1602 * more options1603 */1604 1605 struct nouveau_drm *drm = nouveau_drm(dev);1606 int i, newentries = 0;1607 1608 for (i = 0; i < dcb->entries; i++) {1609 struct dcb_output *ient = &dcb->entry[i];1610 int j;1611 1612 for (j = i + 1; j < dcb->entries; j++) {1613 struct dcb_output *jent = &dcb->entry[j];1614 1615 if (jent->type == 100) /* already merged entry */1616 continue;1617 1618 /* merge heads field when all other fields the same */1619 if (jent->i2c_index == ient->i2c_index &&1620 jent->type == ient->type &&1621 jent->location == ient->location &&1622 jent->or == ient->or) {1623 NV_INFO(drm, "Merging DCB entries %d and %d\n",1624 i, j);1625 ient->heads |= jent->heads;1626 jent->type = 100; /* dummy value */1627 }1628 }1629 }1630 1631 /* Compact entries merged into others out of dcb */1632 for (i = 0; i < dcb->entries; i++) {1633 if (dcb->entry[i].type == 100)1634 continue;1635 1636 if (newentries != i) {1637 dcb->entry[newentries] = dcb->entry[i];1638 dcb->entry[newentries].index = newentries;1639 }1640 newentries++;1641 }1642 1643 dcb->entries = newentries;1644}1645 1646static bool1647apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf)1648{1649 struct nouveau_drm *drm = nouveau_drm(dev);1650 struct dcb_table *dcb = &drm->vbios.dcb;1651 1652 /* Dell Precision M63001653 * DCB entry 2: 02025312 000000101654 * DCB entry 3: 02026312 000000201655 *1656 * Identical, except apparently a different connector on a1657 * different SOR link. Not a clue how we're supposed to know1658 * which one is in use if it even shares an i2c line...1659 *1660 * Ignore the connector on the second SOR link to prevent1661 * nasty problems until this is sorted (assuming it's not a1662 * VBIOS bug).1663 */1664 if (nv_match_device(dev, 0x040d, 0x1028, 0x019b)) {1665 if (*conn == 0x02026312 && *conf == 0x00000020)1666 return false;1667 }1668 1669 /* GeForce3 Ti 2001670 *1671 * DCB reports an LVDS output that should be TMDS:1672 * DCB entry 1: f2005014 ffffffff1673 */1674 if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) {1675 if (*conn == 0xf2005014 && *conf == 0xffffffff) {1676 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1, 1, DCB_OUTPUT_B);1677 return false;1678 }1679 }1680 1681 /* XFX GT-240X-YA1682 *1683 * So many things wrong here, replace the entire encoder table..1684 */1685 if (nv_match_device(dev, 0x0ca3, 0x1682, 0x3003)) {1686 if (idx == 0) {1687 *conn = 0x02001300; /* VGA, connector 1 */1688 *conf = 0x00000028;1689 } else1690 if (idx == 1) {1691 *conn = 0x01010312; /* DVI, connector 0 */1692 *conf = 0x00020030;1693 } else1694 if (idx == 2) {1695 *conn = 0x01010310; /* VGA, connector 0 */1696 *conf = 0x00000028;1697 } else1698 if (idx == 3) {1699 *conn = 0x02022362; /* HDMI, connector 2 */1700 *conf = 0x00020010;1701 } else {1702 *conn = 0x0000000e; /* EOL */1703 *conf = 0x00000000;1704 }1705 }1706 1707 /* Some other twisted XFX board (rhbz#694914)1708 *1709 * The DVI/VGA encoder combo that's supposed to represent the1710 * DVI-I connector actually point at two different ones, and1711 * the HDMI connector ends up paired with the VGA instead.1712 *1713 * Connector table is missing anything for VGA at all, pointing it1714 * an invalid conntab entry 2 so we figure it out ourself.1715 */1716 if (nv_match_device(dev, 0x0615, 0x1682, 0x2605)) {1717 if (idx == 0) {1718 *conn = 0x02002300; /* VGA, connector 2 */1719 *conf = 0x00000028;1720 } else1721 if (idx == 1) {1722 *conn = 0x01010312; /* DVI, connector 0 */1723 *conf = 0x00020030;1724 } else1725 if (idx == 2) {1726 *conn = 0x04020310; /* VGA, connector 0 */1727 *conf = 0x00000028;1728 } else1729 if (idx == 3) {1730 *conn = 0x02021322; /* HDMI, connector 1 */1731 *conf = 0x00020010;1732 } else {1733 *conn = 0x0000000e; /* EOL */1734 *conf = 0x00000000;1735 }1736 }1737 1738 /* fdo#50830: connector indices for VGA and DVI-I are backwards */1739 if (nv_match_device(dev, 0x0421, 0x3842, 0xc793)) {1740 if (idx == 0 && *conn == 0x02000300)1741 *conn = 0x02011300;1742 else1743 if (idx == 1 && *conn == 0x04011310)1744 *conn = 0x04000310;1745 else1746 if (idx == 2 && *conn == 0x02011312)1747 *conn = 0x02000312;1748 }1749 1750 return true;1751}1752 1753static void1754fabricate_dcb_encoder_table(struct drm_device *dev, struct nvbios *bios)1755{1756 struct dcb_table *dcb = &bios->dcb;1757 int all_heads = (nv_two_heads(dev) ? 3 : 1);1758 1759#ifdef __powerpc__1760 /* Apple iMac G4 NV17 */1761 if (of_machine_is_compatible("PowerMac4,5")) {1762 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 0, all_heads, DCB_OUTPUT_B);1763 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1, all_heads, DCB_OUTPUT_C);1764 return;1765 }1766#endif1767 1768 /* Make up some sane defaults */1769 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG,1770 bios->legacy.i2c_indices.crt, 1, DCB_OUTPUT_B);1771 1772 if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0)1773 fabricate_dcb_output(dcb, DCB_OUTPUT_TV,1774 bios->legacy.i2c_indices.tv,1775 all_heads, DCB_OUTPUT_A);1776 1777 else if (bios->tmds.output0_script_ptr ||1778 bios->tmds.output1_script_ptr)1779 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS,1780 bios->legacy.i2c_indices.panel,1781 all_heads, DCB_OUTPUT_B);1782}1783 1784static int1785parse_dcb_entry(struct drm_device *dev, void *data, int idx, u8 *outp)1786{1787 struct nouveau_drm *drm = nouveau_drm(dev);1788 struct dcb_table *dcb = &drm->vbios.dcb;1789 u32 conf = (dcb->version >= 0x20) ? ROM32(outp[4]) : ROM32(outp[6]);1790 u32 conn = ROM32(outp[0]);1791 bool ret;1792 1793 if (apply_dcb_encoder_quirks(dev, idx, &conn, &conf)) {1794 struct dcb_output *entry = new_dcb_entry(dcb);1795 1796 NV_INFO(drm, "DCB outp %02d: %08x %08x\n", idx, conn, conf);1797 1798 if (dcb->version >= 0x20)1799 ret = parse_dcb20_entry(dev, dcb, conn, conf, entry);1800 else1801 ret = parse_dcb15_entry(dev, dcb, conn, conf, entry);1802 entry->id = idx;1803 1804 if (!ret)1805 return 1; /* stop parsing */1806 1807 /* Ignore the I2C index for on-chip TV-out, as there1808 * are cards with bogus values (nv31m in bug 23212),1809 * and it's otherwise useless.1810 */1811 if (entry->type == DCB_OUTPUT_TV &&1812 entry->location == DCB_LOC_ON_CHIP)1813 entry->i2c_index = 0x0f;1814 }1815 1816 return 0;1817}1818 1819static void1820dcb_fake_connectors(struct nvbios *bios)1821{1822 struct dcb_table *dcbt = &bios->dcb;1823 u8 map[16] = { };1824 int i, idx = 0;1825 1826 /* heuristic: if we ever get a non-zero connector field, assume1827 * that all the indices are valid and we don't need fake them.1828 *1829 * and, as usual, a blacklist of boards with bad bios data..1830 */1831 if (!nv_match_device(bios->dev, 0x0392, 0x107d, 0x20a2)) {1832 for (i = 0; i < dcbt->entries; i++) {1833 if (dcbt->entry[i].connector)1834 return;1835 }1836 }1837 1838 /* no useful connector info available, we need to make it up1839 * ourselves. the rule here is: anything on the same i2c bus1840 * is considered to be on the same connector. any output1841 * without an associated i2c bus is assigned its own unique1842 * connector index.1843 */1844 for (i = 0; i < dcbt->entries; i++) {1845 u8 i2c = dcbt->entry[i].i2c_index;1846 if (i2c == 0x0f) {1847 dcbt->entry[i].connector = idx++;1848 } else {1849 if (!map[i2c])1850 map[i2c] = ++idx;1851 dcbt->entry[i].connector = map[i2c] - 1;1852 }1853 }1854 1855 /* if we created more than one connector, destroy the connector1856 * table - just in case it has random, rather than stub, entries.1857 */1858 if (i > 1) {1859 u8 *conntab = olddcb_conntab(bios->dev);1860 if (conntab)1861 conntab[0] = 0x00;1862 }1863}1864 1865static int1866parse_dcb_table(struct drm_device *dev, struct nvbios *bios)1867{1868 struct nouveau_drm *drm = nouveau_drm(dev);1869 struct dcb_table *dcb = &bios->dcb;1870 u8 *dcbt, *conn;1871 int idx;1872 1873 dcbt = olddcb_table(dev);1874 if (!dcbt) {1875 /* handle pre-DCB boards */1876 if (bios->type == NVBIOS_BMP) {1877 fabricate_dcb_encoder_table(dev, bios);1878 return 0;1879 }1880 1881 return -EINVAL;1882 }1883 1884 NV_INFO(drm, "DCB version %d.%d\n", dcbt[0] >> 4, dcbt[0] & 0xf);1885 1886 dcb->version = dcbt[0];1887 olddcb_outp_foreach(dev, NULL, parse_dcb_entry);1888 1889 /*1890 * apart for v2.1+ not being known for requiring merging, this1891 * guarantees dcbent->index is the index of the entry in the rom image1892 */1893 if (dcb->version < 0x21)1894 merge_like_dcb_entries(dev, dcb);1895 1896 /* dump connector table entries to log, if any exist */1897 idx = -1;1898 while ((conn = olddcb_conn(dev, ++idx))) {1899 if (conn[0] != 0xff) {1900 if (olddcb_conntab(dev)[3] < 4)1901 NV_INFO(drm, "DCB conn %02d: %04x\n",1902 idx, ROM16(conn[0]));1903 else1904 NV_INFO(drm, "DCB conn %02d: %08x\n",1905 idx, ROM32(conn[0]));1906 }1907 }1908 dcb_fake_connectors(bios);1909 return 0;1910}1911 1912static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bios, uint16_t hwsq_offset, int entry)1913{1914 /*1915 * The header following the "HWSQ" signature has the number of entries,1916 * and the entry size1917 *1918 * An entry consists of a dword to write to the sequencer control reg1919 * (0x00001304), followed by the ucode bytes, written sequentially,1920 * starting at reg 0x000014001921 */1922 1923 struct nouveau_drm *drm = nouveau_drm(dev);1924 struct nvif_object *device = &drm->client.device.object;1925 uint8_t bytes_to_write;1926 uint16_t hwsq_entry_offset;1927 int i;1928 1929 if (bios->data[hwsq_offset] <= entry) {1930 NV_ERROR(drm, "Too few entries in HW sequencer table for "1931 "requested entry\n");1932 return -ENOENT;1933 }1934 1935 bytes_to_write = bios->data[hwsq_offset + 1];1936 1937 if (bytes_to_write != 36) {1938 NV_ERROR(drm, "Unknown HW sequencer entry size\n");1939 return -EINVAL;1940 }1941 1942 NV_INFO(drm, "Loading NV17 power sequencing microcode\n");1943 1944 hwsq_entry_offset = hwsq_offset + 2 + entry * bytes_to_write;1945 1946 /* set sequencer control */1947 nvif_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset]));1948 bytes_to_write -= 4;1949 1950 /* write ucode */1951 for (i = 0; i < bytes_to_write; i += 4)1952 nvif_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4]));1953 1954 /* twiddle NV_PBUS_DEBUG_4 */1955 nvif_wr32(device, NV_PBUS_DEBUG_4, nvif_rd32(device, NV_PBUS_DEBUG_4) | 0x18);1956 1957 return 0;1958}1959 1960static int load_nv17_hw_sequencer_ucode(struct drm_device *dev,1961 struct nvbios *bios)1962{1963 /*1964 * BMP based cards, from NV17, need a microcode loading to correctly1965 * control the GPIO etc for LVDS panels1966 *1967 * BIT based cards seem to do this directly in the init scripts1968 *1969 * The microcode entries are found by the "HWSQ" signature.1970 */1971 1972 static const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' };1973 const int sz = sizeof(hwsq_signature);1974 int hwsq_offset;1975 1976 hwsq_offset = findstr(bios->data, bios->length, hwsq_signature, sz);1977 if (!hwsq_offset)1978 return 0;1979 1980 /* always use entry 0? */1981 return load_nv17_hwsq_ucode_entry(dev, bios, hwsq_offset + sz, 0);1982}1983 1984uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev)1985{1986 struct nouveau_drm *drm = nouveau_drm(dev);1987 struct nvbios *bios = &drm->vbios;1988 static const uint8_t edid_sig[] = {1989 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 };1990 uint16_t offset = 0;1991 uint16_t newoffset;1992 int searchlen = NV_PROM_SIZE;1993 1994 if (bios->fp.edid)1995 return bios->fp.edid;1996 1997 while (searchlen) {1998 newoffset = findstr(&bios->data[offset], searchlen,1999 edid_sig, 8);2000 if (!newoffset)2001 return NULL;2002 offset += newoffset;2003 if (!nv_cksum(&bios->data[offset], EDID1_LEN))2004 break;2005 2006 searchlen -= offset;2007 offset++;2008 }2009 2010 NV_INFO(drm, "Found EDID in BIOS\n");2011 2012 return bios->fp.edid = &bios->data[offset];2013}2014 2015static bool NVInitVBIOS(struct drm_device *dev)2016{2017 struct nouveau_drm *drm = nouveau_drm(dev);2018 struct nvkm_bios *bios = nvxx_bios(drm);2019 struct nvbios *legacy = &drm->vbios;2020 2021 memset(legacy, 0, sizeof(struct nvbios));2022 spin_lock_init(&legacy->lock);2023 legacy->dev = dev;2024 2025 legacy->data = bios->data;2026 legacy->length = bios->size;2027 legacy->major_version = bios->version.major;2028 legacy->chip_version = bios->version.chip;2029 if (bios->bit_offset) {2030 legacy->type = NVBIOS_BIT;2031 legacy->offset = bios->bit_offset;2032 return !parse_bit_structure(legacy, legacy->offset + 6);2033 } else2034 if (bios->bmp_offset) {2035 legacy->type = NVBIOS_BMP;2036 legacy->offset = bios->bmp_offset;2037 return !parse_bmp_structure(dev, legacy, legacy->offset);2038 }2039 2040 return false;2041}2042 2043int2044nouveau_run_vbios_init(struct drm_device *dev)2045{2046 struct nouveau_drm *drm = nouveau_drm(dev);2047 struct nvbios *bios = &drm->vbios;2048 2049 /* Reset the BIOS head to 0. */2050 bios->state.crtchead = 0;2051 2052 if (bios->major_version < 5) /* BMP only */2053 load_nv17_hw_sequencer_ucode(dev, bios);2054 2055 if (bios->execute) {2056 bios->fp.last_script_invoc = 0;2057 bios->fp.lvds_init_run = false;2058 }2059 2060 return 0;2061}2062 2063static bool2064nouveau_bios_posted(struct drm_device *dev)2065{2066 struct nouveau_drm *drm = nouveau_drm(dev);2067 unsigned htotal;2068 2069 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA)2070 return true;2071 2072 htotal = NVReadVgaCrtc(dev, 0, 0x06);2073 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8;2074 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4;2075 htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10;2076 htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11;2077 return (htotal != 0);2078}2079 2080int2081nouveau_bios_init(struct drm_device *dev)2082{2083 struct nouveau_drm *drm = nouveau_drm(dev);2084 struct nvbios *bios = &drm->vbios;2085 int ret;2086 2087 /* only relevant for PCI devices */2088 if (!dev_is_pci(dev->dev) ||2089 nvkm_gsp_rm(nvxx_device(drm)->gsp))2090 return 0;2091 2092 if (!NVInitVBIOS(dev))2093 return -ENODEV;2094 2095 if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {2096 ret = parse_dcb_table(dev, bios);2097 if (ret)2098 return ret;2099 }2100 2101 if (!bios->major_version) /* we don't run version 0 bios */2102 return 0;2103 2104 /* init script execution disabled */2105 bios->execute = false;2106 2107 /* ... unless card isn't POSTed already */2108 if (!nouveau_bios_posted(dev)) {2109 NV_INFO(drm, "Adaptor not initialised, "2110 "running VBIOS init tables.\n");2111 bios->execute = true;2112 }2113 2114 ret = nouveau_run_vbios_init(dev);2115 if (ret)2116 return ret;2117 2118 /* feature_byte on BMP is poor, but init always sets CR4B */2119 if (bios->major_version < 5)2120 bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40;2121 2122 /* all BIT systems need p_f_m_t for digital_min_front_porch */2123 if (bios->is_mobile || bios->major_version >= 5)2124 ret = parse_fp_mode_table(dev, bios);2125 2126 /* allow subsequent scripts to execute */2127 bios->execute = true;2128 2129 return 0;2130}2131 2132void2133nouveau_bios_takedown(struct drm_device *dev)2134{2135}2136