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1/*2 * Copyright 2017 Red Hat Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 */22#include <drm/ttm/ttm_tt.h>23 24#include "nouveau_mem.h"25#include "nouveau_drv.h"26#include "nouveau_bo.h"27 28 29#include <nvif/class.h>30#include <nvif/if000a.h>31#include <nvif/if500b.h>32#include <nvif/if500d.h>33#include <nvif/if900b.h>34#include <nvif/if900d.h>35 36int37nouveau_mem_map(struct nouveau_mem *mem,38 struct nvif_vmm *vmm, struct nvif_vma *vma)39{40 union {41 struct nv50_vmm_map_v0 nv50;42 struct gf100_vmm_map_v0 gf100;43 } args;44 u32 argc = 0;45 46 switch (vmm->object.oclass) {47 case NVIF_CLASS_VMM_NV04:48 break;49 case NVIF_CLASS_VMM_NV50:50 args.nv50.version = 0;51 args.nv50.ro = 0;52 args.nv50.priv = 0;53 args.nv50.kind = mem->kind;54 args.nv50.comp = mem->comp;55 argc = sizeof(args.nv50);56 break;57 case NVIF_CLASS_VMM_GF100:58 case NVIF_CLASS_VMM_GM200:59 case NVIF_CLASS_VMM_GP100:60 args.gf100.version = 0;61 if (mem->mem.type & NVIF_MEM_VRAM)62 args.gf100.vol = 0;63 else64 args.gf100.vol = 1;65 args.gf100.ro = 0;66 args.gf100.priv = 0;67 args.gf100.kind = mem->kind;68 argc = sizeof(args.gf100);69 break;70 default:71 WARN_ON(1);72 return -ENOSYS;73 }74 75 return nvif_vmm_map(vmm, vma->addr, mem->mem.size, &args, argc, &mem->mem, 0);76}77 78void79nouveau_mem_fini(struct nouveau_mem *mem)80{81 nvif_vmm_put(&mem->drm->client.vmm.vmm, &mem->vma[1]);82 nvif_vmm_put(&mem->drm->client.vmm.vmm, &mem->vma[0]);83 mutex_lock(&mem->drm->client_mutex);84 nvif_mem_dtor(&mem->mem);85 mutex_unlock(&mem->drm->client_mutex);86}87 88int89nouveau_mem_host(struct ttm_resource *reg, struct ttm_tt *tt)90{91 struct nouveau_mem *mem = nouveau_mem(reg);92 struct nouveau_drm *drm = mem->drm;93 struct nvif_mmu *mmu = &drm->mmu;94 struct nvif_mem_ram_v0 args = {};95 u8 type;96 int ret;97 98 if (!nouveau_drm_use_coherent_gpu_mapping(drm))99 type = drm->ttm.type_ncoh[!!mem->kind];100 else101 type = drm->ttm.type_host[0];102 103 if (mem->kind && !(mmu->type[type].type & NVIF_MEM_KIND))104 mem->comp = mem->kind = 0;105 if (mem->comp && !(mmu->type[type].type & NVIF_MEM_COMP)) {106 if (mmu->object.oclass >= NVIF_CLASS_MMU_GF100)107 mem->kind = mmu->kind[mem->kind];108 mem->comp = 0;109 }110 111 if (tt->sg)112 args.sgl = tt->sg->sgl;113 else114 args.dma = tt->dma_address;115 116 mutex_lock(&drm->client_mutex);117 ret = nvif_mem_ctor_type(mmu, "ttmHostMem", mmu->mem, type, PAGE_SHIFT,118 reg->size,119 &args, sizeof(args), &mem->mem);120 mutex_unlock(&drm->client_mutex);121 return ret;122}123 124int125nouveau_mem_vram(struct ttm_resource *reg, bool contig, u8 page)126{127 struct nouveau_mem *mem = nouveau_mem(reg);128 struct nouveau_drm *drm = mem->drm;129 struct nvif_mmu *mmu = &drm->mmu;130 u64 size = ALIGN(reg->size, 1 << page);131 int ret;132 133 mutex_lock(&drm->client_mutex);134 switch (mmu->mem) {135 case NVIF_CLASS_MEM_GF100:136 ret = nvif_mem_ctor_type(mmu, "ttmVram", mmu->mem,137 drm->ttm.type_vram, page, size,138 &(struct gf100_mem_v0) {139 .contig = contig,140 }, sizeof(struct gf100_mem_v0),141 &mem->mem);142 break;143 case NVIF_CLASS_MEM_NV50:144 ret = nvif_mem_ctor_type(mmu, "ttmVram", mmu->mem,145 drm->ttm.type_vram, page, size,146 &(struct nv50_mem_v0) {147 .bankswz = mmu->kind[mem->kind] == 2,148 .contig = contig,149 }, sizeof(struct nv50_mem_v0),150 &mem->mem);151 break;152 default:153 ret = -ENOSYS;154 WARN_ON(1);155 break;156 }157 mutex_unlock(&drm->client_mutex);158 159 reg->start = mem->mem.addr >> PAGE_SHIFT;160 return ret;161}162 163void164nouveau_mem_del(struct ttm_resource_manager *man, struct ttm_resource *reg)165{166 struct nouveau_mem *mem = nouveau_mem(reg);167 168 nouveau_mem_fini(mem);169 ttm_resource_fini(man, reg);170 kfree(mem);171}172 173int174nouveau_mem_new(struct nouveau_drm *drm, u8 kind, u8 comp,175 struct ttm_resource **res)176{177 struct nouveau_mem *mem;178 179 if (!(mem = kzalloc(sizeof(*mem), GFP_KERNEL)))180 return -ENOMEM;181 182 mem->drm = drm;183 mem->kind = kind;184 mem->comp = comp;185 186 *res = &mem->base;187 return 0;188}189 190bool191nouveau_mem_intersects(struct ttm_resource *res,192 const struct ttm_place *place,193 size_t size)194{195 u32 num_pages = PFN_UP(size);196 197 /* Don't evict BOs outside of the requested placement range */198 if (place->fpfn >= (res->start + num_pages) ||199 (place->lpfn && place->lpfn <= res->start))200 return false;201 202 return true;203}204 205bool206nouveau_mem_compatible(struct ttm_resource *res,207 const struct ttm_place *place,208 size_t size)209{210 u32 num_pages = PFN_UP(size);211 212 if (res->start < place->fpfn ||213 (place->lpfn && (res->start + num_pages) > place->lpfn))214 return false;215 216 return true;217}218