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1/*2 * Copyright 2015 Red Hat Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: Ben Skeggs <bskeggs@redhat.com>23 */24#include "priv.h"25#include "chan.h"26#include "head.h"27#include "ior.h"28 29#include <nvif/class.h>30 31static const struct nvkm_ior_func32gp100_sor = {33 .route = {34 .get = gm200_sor_route_get,35 .set = gm200_sor_route_set,36 },37 .state = gf119_sor_state,38 .power = nv50_sor_power,39 .clock = gf119_sor_clock,40 .bl = >215_sor_bl,41 .hdmi = &gm200_sor_hdmi,42 .dp = &gm200_sor_dp,43 .hda = &gf119_sor_hda,44};45 46int47gp100_sor_new(struct nvkm_disp *disp, int id)48{49 struct nvkm_device *device = disp->engine.subdev.device;50 u32 hda;51 52 if (!((hda = nvkm_rd32(device, 0x08a15c)) & 0x40000000))53 hda = nvkm_rd32(device, 0x10ebb0) >> 8;54 55 return nvkm_ior_new_(&gp100_sor, disp, SOR, id, hda & BIT(id));56}57 58static const struct nvkm_disp_func59gp100_disp = {60 .oneinit = nv50_disp_oneinit,61 .init = gf119_disp_init,62 .fini = gf119_disp_fini,63 .intr = gf119_disp_intr,64 .intr_error = gf119_disp_intr_error,65 .super = gf119_disp_super,66 .uevent = &gf119_disp_chan_uevent,67 .head = { .cnt = gf119_head_cnt, .new = gf119_head_new },68 .sor = { .cnt = gf119_sor_cnt, .new = gp100_sor_new },69 .root = { 0,0,GP100_DISP },70 .user = {71 {{0,0,GK104_DISP_CURSOR }, nvkm_disp_chan_new, &gf119_disp_curs },72 {{0,0,GK104_DISP_OVERLAY }, nvkm_disp_chan_new, &gf119_disp_oimm },73 {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gf119_disp_base },74 {{0,0,GP100_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gk104_disp_core },75 {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gk104_disp_ovly },76 {}77 },78};79 80int81gp100_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,82 struct nvkm_disp **pdisp)83{84 return nvkm_disp_new_(&gp100_disp, device, type, inst, pdisp);85}86