73 lines · c
1/*2 * Copyright 2017 Red Hat Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 */22#include "priv.h"23#include "chan.h"24#include "head.h"25#include "ior.h"26 27#include <nvif/class.h>28 29static const struct nvkm_ior_func30mcp77_sor = {31 .state = g94_sor_state,32 .power = nv50_sor_power,33 .clock = nv50_sor_clock,34 .hdmi = &g84_sor_hdmi,35 .dp = &g94_sor_dp,36};37 38static int39mcp77_sor_new(struct nvkm_disp *disp, int id)40{41 return nvkm_ior_new_(&mcp77_sor, disp, SOR, id, false);42}43 44static const struct nvkm_disp_func45mcp77_disp = {46 .oneinit = nv50_disp_oneinit,47 .init = nv50_disp_init,48 .fini = nv50_disp_fini,49 .intr = nv50_disp_intr,50 .super = nv50_disp_super,51 .uevent = &nv50_disp_chan_uevent,52 .head = { .cnt = nv50_head_cnt, .new = nv50_head_new },53 .dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },54 .sor = { .cnt = g94_sor_cnt, .new = mcp77_sor_new },55 .pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new },56 .root = { 0,0,GT206_DISP },57 .user = {58 {{0,0, G82_DISP_CURSOR }, nvkm_disp_chan_new, & nv50_disp_curs },59 {{0,0, G82_DISP_OVERLAY }, nvkm_disp_chan_new, & nv50_disp_oimm },60 {{0,0,GT200_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, & g84_disp_base },61 {{0,0,GT206_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, & g94_disp_core },62 {{0,0,GT200_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, >200_disp_ovly },63 {}64 },65};66 67int68mcp77_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,69 struct nvkm_disp **pdisp)70{71 return nvkm_disp_new_(&mcp77_disp, device, type, inst, pdisp);72}73