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1/*2 * Copyright 2021 Red Hat Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 */22#include "priv.h"23#include "chan.h"24#include "runl.h"25 26#include <nvif/class.h>27 28static int29g98_fifo_runl_ctor(struct nvkm_fifo *fifo)30{31	struct nvkm_runl *runl;32 33	runl = nvkm_runl_new(fifo, 0, 0, 0);34	if (IS_ERR(runl))35		return PTR_ERR(runl);36 37	nvkm_runl_add(runl, 0, fifo->func->engn_sw, NVKM_ENGINE_SW, 0);38	nvkm_runl_add(runl, 0, fifo->func->engn_sw, NVKM_ENGINE_DMAOBJ, 0);39	nvkm_runl_add(runl, 1, fifo->func->engn, NVKM_ENGINE_GR, 0);40	nvkm_runl_add(runl, 2, fifo->func->engn, NVKM_ENGINE_MSPPP, 0);41	nvkm_runl_add(runl, 3, fifo->func->engn, NVKM_ENGINE_CE, 0);42	nvkm_runl_add(runl, 4, fifo->func->engn, NVKM_ENGINE_MSPDEC, 0);43	nvkm_runl_add(runl, 5, fifo->func->engn, NVKM_ENGINE_SEC, 0);44	nvkm_runl_add(runl, 6, fifo->func->engn, NVKM_ENGINE_MSVLD, 0);45	return 0;46}47 48static const struct nvkm_fifo_func49g98_fifo = {50	.chid_nr = nv50_fifo_chid_nr,51	.chid_ctor = nv50_fifo_chid_ctor,52	.runl_ctor = g98_fifo_runl_ctor,53	.init = nv50_fifo_init,54	.intr = nv04_fifo_intr,55	.pause = nv04_fifo_pause,56	.start = nv04_fifo_start,57	.nonstall = &g84_fifo_nonstall,58	.runl = &nv50_runl,59	.engn = &g84_engn,60	.engn_sw = &nv50_engn_sw,61	.cgrp = {{                          }, &nv04_cgrp },62	.chan = {{ 0, 0, G82_CHANNEL_GPFIFO }, &g84_chan },63};64 65int66g98_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,67	       struct nvkm_fifo **pfifo)68{69	return nvkm_fifo_new_(&g98_fifo, device, type, inst, pfifo);70}71