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1/*2 * Copyright 2013 Red Hat Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: Ben Skeggs <bskeggs@redhat.com>23 */24 25#include "os.h"26 27#define GF100 0xc028#define GF117 0xd729#define GK100 0xe030#define GK110 0xf031#define GK208 0x10832#define GM107 0x11733 34#define NV_PGRAPH_TRAPPED_ADDR 0x40070435#define NV_PGRAPH_TRAPPED_DATA_LO 0x40070836#define NV_PGRAPH_TRAPPED_DATA_HI 0x40070c37 38#define NV_PGRAPH_FE_OBJECT_TABLE(n) ((n) * 4 + 0x400700)39 40#define NV_PGRAPH_FECS_INTR_ACK 0x40900441#define NV_PGRAPH_FECS_INTR 0x40900842#define NV_PGRAPH_FECS_INTR_FWMTHD 0x0000040043#define NV_PGRAPH_FECS_INTR_CHSW 0x0000010044#define NV_PGRAPH_FECS_INTR_FIFO 0x0000000445#define NV_PGRAPH_FECS_INTR_MODE 0x40900c46#define NV_PGRAPH_FECS_INTR_MODE_FIFO 0x0000000447#define NV_PGRAPH_FECS_INTR_MODE_FIFO_LEVEL 0x0000000448#define NV_PGRAPH_FECS_INTR_MODE_FIFO_EDGE 0x0000000049#define NV_PGRAPH_FECS_INTR_EN_SET 0x40901050#define NV_PGRAPH_FECS_INTR_EN_SET_FIFO 0x0000000451#define NV_PGRAPH_FECS_INTR_ROUTE 0x40901c52#define NV_PGRAPH_FECS_ACCESS 0x40904853#define NV_PGRAPH_FECS_ACCESS_FIFO 0x0000000254#define NV_PGRAPH_FECS_FIFO_DATA 0x40906455#define NV_PGRAPH_FECS_FIFO_CMD 0x40906856#define NV_PGRAPH_FECS_FIFO_ACK 0x40907457#define NV_PGRAPH_FECS_CAPS 0x40910858#define NV_PGRAPH_FECS_SIGNAL 0x40940059#define NV_PGRAPH_FECS_IROUTE 0x40940460#define NV_PGRAPH_FECS_BAR_MASK0 0x40940c61#define NV_PGRAPH_FECS_BAR_MASK1 0x40941062#define NV_PGRAPH_FECS_BAR 0x40941463#define NV_PGRAPH_FECS_BAR_SET 0x40941864#define NV_PGRAPH_FECS_RED_SWITCH 0x40961465#define NV_PGRAPH_FECS_RED_SWITCH_ENABLE_ROP 0x0000040066#define NV_PGRAPH_FECS_RED_SWITCH_ENABLE_GPC 0x0000020067#define NV_PGRAPH_FECS_RED_SWITCH_ENABLE_MAIN 0x0000010068#define NV_PGRAPH_FECS_RED_SWITCH_POWER_ROP 0x0000004069#define NV_PGRAPH_FECS_RED_SWITCH_POWER_GPC 0x0000002070#define NV_PGRAPH_FECS_RED_SWITCH_POWER_MAIN 0x0000001071#define NV_PGRAPH_FECS_RED_SWITCH_PAUSE_GPC 0x0000000272#define NV_PGRAPH_FECS_RED_SWITCH_PAUSE_MAIN 0x0000000173#define NV_PGRAPH_FECS_MMCTX_SAVE_SWBASE 0x40970074#define NV_PGRAPH_FECS_MMCTX_LOAD_SWBASE 0x40970475#define NV_PGRAPH_FECS_MMCTX_LOAD_COUNT 0x40974c76#define NV_PGRAPH_FECS_MMCTX_SAVE_SWBASE 0x40970077#define NV_PGRAPH_FECS_MMCTX_LOAD_SWBASE 0x40970478#define NV_PGRAPH_FECS_MMCTX_BASE 0x40971079#define NV_PGRAPH_FECS_MMCTX_CTRL 0x40971480#define NV_PGRAPH_FECS_MMCTX_MULTI_STRIDE 0x40971881#define NV_PGRAPH_FECS_MMCTX_MULTI_MASK 0x40971c82#define NV_PGRAPH_FECS_MMCTX_QUEUE 0x40972083#define NV_PGRAPH_FECS_MMIO_BASE 0x40972484#define NV_PGRAPH_FECS_MMIO_CTRL 0x40972885#define NV_PGRAPH_FECS_MMIO_CTRL_BASE_ENABLE 0x0000000186#define NV_PGRAPH_FECS_MMIO_RDVAL 0x40972c87#define NV_PGRAPH_FECS_MMIO_WRVAL 0x40973088#define NV_PGRAPH_FECS_MMCTX_LOAD_COUNT 0x40974c89#if CHIPSET < GK11090#define NV_PGRAPH_FECS_CC_SCRATCH_VAL(n) ((n) * 4 + 0x409800)91#define NV_PGRAPH_FECS_CC_SCRATCH_SET(n) ((n) * 4 + 0x409820)92#define NV_PGRAPH_FECS_CC_SCRATCH_CLR(n) ((n) * 4 + 0x409840)93#define NV_PGRAPH_FECS_UNK86C 0x40986c94#else95#define NV_PGRAPH_FECS_CC_SCRATCH_VAL(n) ((n) * 4 + 0x409800)96#define NV_PGRAPH_FECS_CC_SCRATCH_CLR(n) ((n) * 4 + 0x409840)97#define NV_PGRAPH_FECS_UNK86C 0x40988c98#define NV_PGRAPH_FECS_CC_SCRATCH_SET(n) ((n) * 4 + 0x4098c0)99#endif100#define NV_PGRAPH_FECS_STRANDS_CNT 0x409880101#define NV_PGRAPH_FECS_STRAND_SAVE_SWBASE 0x409908102#define NV_PGRAPH_FECS_STRAND_LOAD_SWBASE 0x40990c103#define NV_PGRAPH_FECS_STRAND_WORDS 0x409910104#define NV_PGRAPH_FECS_STRAND_DATA 0x409918105#define NV_PGRAPH_FECS_STRAND_SELECT 0x40991c106#define NV_PGRAPH_FECS_STRAND_CMD 0x409928107#define NV_PGRAPH_FECS_STRAND_CMD_SEEK 0x00000001108#define NV_PGRAPH_FECS_STRAND_CMD_GET_INFO 0x00000002109#define NV_PGRAPH_FECS_STRAND_CMD_SAVE 0x00000003110#define NV_PGRAPH_FECS_STRAND_CMD_LOAD 0x00000004111#define NV_PGRAPH_FECS_STRAND_CMD_ACTIVATE_FILTER 0x0000000a112#define NV_PGRAPH_FECS_STRAND_CMD_DEACTIVATE_FILTER 0x0000000b113#define NV_PGRAPH_FECS_STRAND_CMD_ENABLE 0x0000000c114#define NV_PGRAPH_FECS_STRAND_CMD_DISABLE 0x0000000d115#define NV_PGRAPH_FECS_STRAND_FILTER 0x40993c116#define NV_PGRAPH_FECS_MEM_BASE 0x409a04117#define NV_PGRAPH_FECS_MEM_CHAN 0x409a0c118#define NV_PGRAPH_FECS_MEM_CMD 0x409a10119#define NV_PGRAPH_FECS_MEM_CMD_LOAD_CHAN 0x00000007120#define NV_PGRAPH_FECS_MEM_TARGET 0x409a20121#define NV_PGRAPH_FECS_MEM_TARGET_UNK31 0x80000000122#define NV_PGRAPH_FECS_MEM_TARGET_AS 0x0000001f123#define NV_PGRAPH_FECS_MEM_TARGET_AS_VM 0x00000001124#define NV_PGRAPH_FECS_MEM_TARGET_AS_VRAM 0x00000002125#define NV_PGRAPH_FECS_CHAN_ADDR 0x409b00126#define NV_PGRAPH_FECS_CHAN_NEXT 0x409b04127#define NV_PGRAPH_FECS_CHSW 0x409b0c128#define NV_PGRAPH_FECS_CHSW_ACK 0x00000001129#define NV_PGRAPH_FECS_INTR_UP_SET 0x409c1c130#define NV_PGRAPH_FECS_INTR_UP_EN 0x409c24131 132#define NV_PGRAPH_GPCX_GPCCS_INTR_ACK 0x41a004133#define NV_PGRAPH_GPCX_GPCCS_INTR 0x41a008134#define NV_PGRAPH_GPCX_GPCCS_INTR_FIFO 0x00000004135#define NV_PGRAPH_GPCX_GPCCS_INTR_EN_SET 0x41a010136#define NV_PGRAPH_GPCX_GPCCS_INTR_EN_SET_FIFO 0x00000004137#define NV_PGRAPH_GPCX_GPCCS_INTR_ROUTE 0x41a01c138#define NV_PGRAPH_GPCX_GPCCS_ACCESS 0x41a048139#define NV_PGRAPH_GPCX_GPCCS_ACCESS_FIFO 0x00000002140#define NV_PGRAPH_GPCX_GPCCS_FIFO_DATA 0x41a064141#define NV_PGRAPH_GPCX_GPCCS_FIFO_CMD 0x41a068142#define NV_PGRAPH_GPCX_GPCCS_FIFO_ACK 0x41a074143#define NV_PGRAPH_GPCX_GPCCS_UNITS 0x41a608144#define NV_PGRAPH_GPCX_GPCCS_CAPS 0x41a108145#define NV_PGRAPH_GPCX_GPCCS_RED_SWITCH 0x41a614146#define NV_PGRAPH_GPCX_GPCCS_RED_SWITCH_UNK11 0x00000800147#define NV_PGRAPH_GPCX_GPCCS_RED_SWITCH_ENABLE 0x00000200148#define NV_PGRAPH_GPCX_GPCCS_RED_SWITCH_POWER 0x00000020149#define NV_PGRAPH_GPCX_GPCCS_RED_SWITCH_PAUSE 0x00000002150#define NV_PGRAPH_GPCX_GPCCS_MYINDEX 0x41a618151#define NV_PGRAPH_GPCX_GPCCS_MMCTX_SAVE_SWBASE 0x41a700152#define NV_PGRAPH_GPCX_GPCCS_MMCTX_LOAD_SWBASE 0x41a704153#define NV_PGRAPH_GPCX_GPCCS_MMIO_BASE 0x41a724154#define NV_PGRAPH_GPCX_GPCCS_MMIO_CTRL 0x41a728155#define NV_PGRAPH_GPCX_GPCCS_MMIO_CTRL_BASE_ENABLE 0x00000001156#define NV_PGRAPH_GPCX_GPCCS_MMIO_RDVAL 0x41a72c157#define NV_PGRAPH_GPCX_GPCCS_MMIO_WRVAL 0x41a730158#define NV_PGRAPH_GPCX_GPCCS_MMCTX_LOAD_COUNT 0x41a74c159#if CHIPSET < GK110160#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_VAL(n) ((n) * 4 + 0x41a800)161#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_SET(n) ((n) * 4 + 0x41a820)162#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_CLR(n) ((n) * 4 + 0x41a840)163#define NV_PGRAPH_GPCX_GPCCS_UNK86C 0x41a86c164#else165#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_VAL(n) ((n) * 4 + 0x41a800)166#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_CLR(n) ((n) * 4 + 0x41a840)167#define NV_PGRAPH_GPCX_GPCCS_UNK86C 0x41a88c168#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_SET(n) ((n) * 4 + 0x41a8c0)169#endif170#define NV_PGRAPH_GPCX_GPCCS_STRAND_SELECT 0x41a91c171#define NV_PGRAPH_GPCX_GPCCS_STRAND_CMD 0x41a928172#define NV_PGRAPH_GPCX_GPCCS_STRAND_CMD_SAVE 0x00000003173#define NV_PGRAPH_GPCX_GPCCS_STRAND_CMD_LOAD 0x00000004174#define NV_PGRAPH_GPCX_GPCCS_MEM_BASE 0x41aa04175#define NV_PGRAPH_GPCX_GPCCS_TPC_STATUS 0x41acfc176 177#define NV_PGRAPH_GPC0_TPC0 0x504000178#define NV_PGRAPH_GPC0_TPC0__SIZE 0x000800179 180#define NV_PGRAPH_GPC0_TPCX_STRAND_INDEX 0x501d60181#define NV_PGRAPH_GPC0_TPCX_STRAND_INDEX_ALL 0x0000003f182#define NV_PGRAPH_GPC0_TPCX_STRAND_DATA 0x501d98183#define NV_PGRAPH_GPC0_TPCX_STRAND_SELECT 0x501d9c184#define NV_PGRAPH_GPC0_TPCX_STRAND_CMD 0x501da8185#define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_SEEK 0x00000001186#define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_GET_INFO 0x00000002187#define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_SAVE 0x00000003188#define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_LOAD 0x00000004189#define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_ENABLE 0x0000000c190#define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_DISABLE 0x0000000d191#define NV_PGRAPH_GPC0_TPCX_STRAND_MEM_BASE 0x501dc4192 193#define NV_TPC_STRAND_INDEX 0x560194#define NV_TPC_STRAND_CNT 0x570195#define NV_TPC_STRAND_SAVE_SWBASE 0x588196#define NV_TPC_STRAND_LOAD_SWBASE 0x58c197#define NV_TPC_STRAND_WORDS 0x590198 199#define mmctx_data(r,c) .b32 (((c - 1) << 26) | r)200#define queue_init .skip 72 // (2 * 4) + ((8 * 4) * 2)201 202#define T_WAIT 0203#define T_MMCTX 1204#define T_STRWAIT 2205#define T_STRINIT 3206#define T_AUTO 4207#define T_CHAN 5208#define T_LOAD 6209#define T_SAVE 7210#define T_LCHAN 8211#define T_LCTXH 9212#define T_STRTPC 10213 214#if CHIPSET < GK208215#define imm32(reg,val) /*216*/ movw reg ((val) & 0x0000ffff) /*217*/ sethi reg ((val) & 0xffff0000)218#else219#define imm32(reg,val) /*220*/ mov reg (val)221#endif222 223#define nv_mkio(rv,r,i) /*224*/ imm32(rv, (((r) & 0xffc) << 6) | ((i) << 2))225 226#define hash #227#define fn(a) a228#if CHIPSET < GK208229#define call(a) call fn(hash)a230#else231#define call(a) lcall fn(hash)a232#endif233 234#define nv_iord(rv,r,i) /*235*/ nv_mkio(rv,r,i) /*236*/ iord rv I[rv]237 238#define nv_iowr(r,i,rv) /*239*/ nv_mkio($r0,r,i) /*240*/ iowr I[$r0] rv /*241*/ clear b32 $r0242 243#define nv_rd32(reg,addr) /*244*/ imm32($r14, addr) /*245*/ call(nv_rd32) /*246*/ mov b32 reg $r15247 248#define nv_wr32(addr,reg) /*249*/ mov b32 $r15 reg /*250*/ imm32($r14, addr) /*251*/ call(nv_wr32)252 253#define trace_set(bit) /*254*/ clear b32 $r9 /*255*/ bset $r9 bit /*256*/ nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_SET(7), 0, $r9)257 258#define trace_clr(bit) /*259*/ clear b32 $r9 /*260*/ bset $r9 bit /*261*/ nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_CLR(7), 0, $r9)262