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1/*2 * Copyright 2013 Red Hat Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: Ben Skeggs <bskeggs@redhat.com>23 */24#define anx9805_pad(p) container_of((p), struct anx9805_pad, base)25#define anx9805_bus(p) container_of((p), struct anx9805_bus, base)26#define anx9805_aux(p) container_of((p), struct anx9805_aux, base)27#include "aux.h"28#include "bus.h"29 30struct anx9805_pad {31	struct nvkm_i2c_pad base;32	struct nvkm_i2c_bus *bus;33	u8 addr;34};35 36struct anx9805_bus {37	struct nvkm_i2c_bus base;38	struct anx9805_pad *pad;39	u8 addr;40};41 42static int43anx9805_bus_xfer(struct nvkm_i2c_bus *base, struct i2c_msg *msgs, int num)44{45	struct anx9805_bus *bus = anx9805_bus(base);46	struct anx9805_pad *pad = bus->pad;47	struct i2c_adapter *adap = &pad->bus->i2c;48	struct i2c_msg *msg = msgs;49	int ret = -ETIMEDOUT;50	int i, j, cnt = num;51	u8 seg = 0x00, off = 0x00, tmp;52 53	tmp = nvkm_rdi2cr(adap, pad->addr, 0x07) & ~0x10;54	nvkm_wri2cr(adap, pad->addr, 0x07, tmp | 0x10);55	nvkm_wri2cr(adap, pad->addr, 0x07, tmp);56	nvkm_wri2cr(adap, bus->addr, 0x43, 0x05);57	mdelay(5);58 59	while (cnt--) {60		if ( (msg->flags & I2C_M_RD) && msg->addr == 0x50) {61			nvkm_wri2cr(adap, bus->addr, 0x40, msg->addr << 1);62			nvkm_wri2cr(adap, bus->addr, 0x41, seg);63			nvkm_wri2cr(adap, bus->addr, 0x42, off);64			nvkm_wri2cr(adap, bus->addr, 0x44, msg->len);65			nvkm_wri2cr(adap, bus->addr, 0x45, 0x00);66			nvkm_wri2cr(adap, bus->addr, 0x43, 0x01);67			for (i = 0; i < msg->len; i++) {68				j = 0;69				while (nvkm_rdi2cr(adap, bus->addr, 0x46) & 0x10) {70					mdelay(5);71					if (j++ == 32)72						goto done;73				}74				msg->buf[i] = nvkm_rdi2cr(adap, bus->addr, 0x47);75			}76		} else77		if (!(msg->flags & I2C_M_RD)) {78			if (msg->addr == 0x50 && msg->len == 0x01) {79				off = msg->buf[0];80			} else81			if (msg->addr == 0x30 && msg->len == 0x01) {82				seg = msg->buf[0];83			} else84				goto done;85		} else {86			goto done;87		}88		msg++;89	}90 91	ret = num;92done:93	nvkm_wri2cr(adap, bus->addr, 0x43, 0x00);94	return ret;95}96 97static const struct nvkm_i2c_bus_func98anx9805_bus_func = {99	.xfer = anx9805_bus_xfer,100};101 102static int103anx9805_bus_new(struct nvkm_i2c_pad *base, int id, u8 drive,104		struct nvkm_i2c_bus **pbus)105{106	struct anx9805_pad *pad = anx9805_pad(base);107	struct anx9805_bus *bus;108	int ret;109 110	if (!(bus = kzalloc(sizeof(*bus), GFP_KERNEL)))111		return -ENOMEM;112	*pbus = &bus->base;113	bus->pad = pad;114 115	ret = nvkm_i2c_bus_ctor(&anx9805_bus_func, &pad->base, id, &bus->base);116	if (ret)117		return ret;118 119	switch (pad->addr) {120	case 0x39: bus->addr = 0x3d; break;121	case 0x3b: bus->addr = 0x3f; break;122	default:123		return -ENOSYS;124	}125 126	return 0;127}128 129struct anx9805_aux {130	struct nvkm_i2c_aux base;131	struct anx9805_pad *pad;132	u8 addr;133};134 135static int136anx9805_aux_xfer(struct nvkm_i2c_aux *base, bool retry,137		 u8 type, u32 addr, u8 *data, u8 *size)138{139	struct anx9805_aux *aux = anx9805_aux(base);140	struct anx9805_pad *pad = aux->pad;141	struct i2c_adapter *adap = &pad->bus->i2c;142	int i, ret = -ETIMEDOUT;143	u8 buf[16] = {};144	u8 tmp;145 146	AUX_DBG(&aux->base, "%02x %05x %d", type, addr, *size);147 148	tmp = nvkm_rdi2cr(adap, pad->addr, 0x07) & ~0x04;149	nvkm_wri2cr(adap, pad->addr, 0x07, tmp | 0x04);150	nvkm_wri2cr(adap, pad->addr, 0x07, tmp);151	nvkm_wri2cr(adap, pad->addr, 0xf7, 0x01);152 153	nvkm_wri2cr(adap, aux->addr, 0xe4, 0x80);154	if (!(type & 1)) {155		memcpy(buf, data, *size);156		AUX_DBG(&aux->base, "%16ph", buf);157		for (i = 0; i < *size; i++)158			nvkm_wri2cr(adap, aux->addr, 0xf0 + i, buf[i]);159	}160	nvkm_wri2cr(adap, aux->addr, 0xe5, ((*size - 1) << 4) | type);161	nvkm_wri2cr(adap, aux->addr, 0xe6, (addr & 0x000ff) >>  0);162	nvkm_wri2cr(adap, aux->addr, 0xe7, (addr & 0x0ff00) >>  8);163	nvkm_wri2cr(adap, aux->addr, 0xe8, (addr & 0xf0000) >> 16);164	nvkm_wri2cr(adap, aux->addr, 0xe9, 0x01);165 166	i = 0;167	while ((tmp = nvkm_rdi2cr(adap, aux->addr, 0xe9)) & 0x01) {168		mdelay(5);169		if (i++ == 32)170			goto done;171	}172 173	if ((tmp = nvkm_rdi2cr(adap, pad->addr, 0xf7)) & 0x01) {174		ret = -EIO;175		goto done;176	}177 178	if (type & 1) {179		for (i = 0; i < *size; i++)180			buf[i] = nvkm_rdi2cr(adap, aux->addr, 0xf0 + i);181		AUX_DBG(&aux->base, "%16ph", buf);182		memcpy(data, buf, *size);183	}184 185	ret = 0;186done:187	nvkm_wri2cr(adap, pad->addr, 0xf7, 0x01);188	return ret;189}190 191static int192anx9805_aux_lnk_ctl(struct nvkm_i2c_aux *base,193		    int link_nr, int link_bw, bool enh)194{195	struct anx9805_aux *aux = anx9805_aux(base);196	struct anx9805_pad *pad = aux->pad;197	struct i2c_adapter *adap = &pad->bus->i2c;198	u8 tmp, i;199 200	AUX_DBG(&aux->base, "ANX9805 train %d %02x %d",201		link_nr, link_bw, enh);202 203	nvkm_wri2cr(adap, aux->addr, 0xa0, link_bw);204	nvkm_wri2cr(adap, aux->addr, 0xa1, link_nr | (enh ? 0x80 : 0x00));205	nvkm_wri2cr(adap, aux->addr, 0xa2, 0x01);206	nvkm_wri2cr(adap, aux->addr, 0xa8, 0x01);207 208	i = 0;209	while ((tmp = nvkm_rdi2cr(adap, aux->addr, 0xa8)) & 0x01) {210		mdelay(5);211		if (i++ == 100) {212			AUX_ERR(&aux->base, "link training timeout");213			return -ETIMEDOUT;214		}215	}216 217	if (tmp & 0x70) {218		AUX_ERR(&aux->base, "link training failed");219		return -EIO;220	}221 222	return 0;223}224 225static const struct nvkm_i2c_aux_func226anx9805_aux_func = {227	.xfer = anx9805_aux_xfer,228	.lnk_ctl = anx9805_aux_lnk_ctl,229};230 231static int232anx9805_aux_new(struct nvkm_i2c_pad *base, int id, u8 drive,233		struct nvkm_i2c_aux **pbus)234{235	struct anx9805_pad *pad = anx9805_pad(base);236	struct anx9805_aux *aux;237	int ret;238 239	if (!(aux = kzalloc(sizeof(*aux), GFP_KERNEL)))240		return -ENOMEM;241	*pbus = &aux->base;242	aux->pad = pad;243 244	ret = nvkm_i2c_aux_ctor(&anx9805_aux_func, &pad->base, id, &aux->base);245	if (ret)246		return ret;247 248	switch (pad->addr) {249	case 0x39: aux->addr = 0x38; break;250	case 0x3b: aux->addr = 0x3c; break;251	default:252		return -ENOSYS;253	}254 255	return 0;256}257 258static const struct nvkm_i2c_pad_func259anx9805_pad_func = {260	.bus_new_4 = anx9805_bus_new,261	.aux_new_6 = anx9805_aux_new,262};263 264int265anx9805_pad_new(struct nvkm_i2c_bus *bus, int id, u8 addr,266		struct nvkm_i2c_pad **ppad)267{268	struct anx9805_pad *pad;269 270	if (!(pad = kzalloc(sizeof(*pad), GFP_KERNEL)))271		return -ENOMEM;272	*ppad = &pad->base;273 274	nvkm_i2c_pad_ctor(&anx9805_pad_func, bus->pad->i2c, id, &pad->base);275	pad->bus = bus;276	pad->addr = addr;277	return 0;278}279