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1/*2 * Copyright 2012 Red Hat Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: Ben Skeggs23 */24#define nv04_instmem(p) container_of((p), struct nv04_instmem, base)25#include "priv.h"26 27#include <core/ramht.h>28#include <subdev/bar.h>29 30struct nv04_instmem {31 struct nvkm_instmem base;32 struct nvkm_mm heap;33};34 35/******************************************************************************36 * instmem object implementation37 *****************************************************************************/38#define nv04_instobj(p) container_of((p), struct nv04_instobj, base.memory)39 40struct nv04_instobj {41 struct nvkm_instobj base;42 struct nv04_instmem *imem;43 struct nvkm_mm_node *node;44};45 46static void47nv04_instobj_wr32(struct nvkm_memory *memory, u64 offset, u32 data)48{49 struct nv04_instobj *iobj = nv04_instobj(memory);50 struct nvkm_device *device = iobj->imem->base.subdev.device;51 nvkm_wr32(device, 0x700000 + iobj->node->offset + offset, data);52}53 54static u3255nv04_instobj_rd32(struct nvkm_memory *memory, u64 offset)56{57 struct nv04_instobj *iobj = nv04_instobj(memory);58 struct nvkm_device *device = iobj->imem->base.subdev.device;59 return nvkm_rd32(device, 0x700000 + iobj->node->offset + offset);60}61 62static const struct nvkm_memory_ptrs63nv04_instobj_ptrs = {64 .rd32 = nv04_instobj_rd32,65 .wr32 = nv04_instobj_wr32,66};67 68static void69nv04_instobj_release(struct nvkm_memory *memory)70{71}72 73static void __iomem *74nv04_instobj_acquire(struct nvkm_memory *memory)75{76 struct nv04_instobj *iobj = nv04_instobj(memory);77 struct nvkm_device *device = iobj->imem->base.subdev.device;78 return device->pri + 0x700000 + iobj->node->offset;79}80 81static u6482nv04_instobj_size(struct nvkm_memory *memory)83{84 return nv04_instobj(memory)->node->length;85}86 87static u6488nv04_instobj_addr(struct nvkm_memory *memory)89{90 return nv04_instobj(memory)->node->offset;91}92 93static enum nvkm_memory_target94nv04_instobj_target(struct nvkm_memory *memory)95{96 return NVKM_MEM_TARGET_INST;97}98 99static void *100nv04_instobj_dtor(struct nvkm_memory *memory)101{102 struct nv04_instobj *iobj = nv04_instobj(memory);103 mutex_lock(&iobj->imem->base.mutex);104 nvkm_mm_free(&iobj->imem->heap, &iobj->node);105 mutex_unlock(&iobj->imem->base.mutex);106 nvkm_instobj_dtor(&iobj->imem->base, &iobj->base);107 return iobj;108}109 110static const struct nvkm_memory_func111nv04_instobj_func = {112 .dtor = nv04_instobj_dtor,113 .target = nv04_instobj_target,114 .size = nv04_instobj_size,115 .addr = nv04_instobj_addr,116 .acquire = nv04_instobj_acquire,117 .release = nv04_instobj_release,118};119 120static int121nv04_instobj_new(struct nvkm_instmem *base, u32 size, u32 align, bool zero,122 struct nvkm_memory **pmemory)123{124 struct nv04_instmem *imem = nv04_instmem(base);125 struct nv04_instobj *iobj;126 int ret;127 128 if (!(iobj = kzalloc(sizeof(*iobj), GFP_KERNEL)))129 return -ENOMEM;130 *pmemory = &iobj->base.memory;131 132 nvkm_instobj_ctor(&nv04_instobj_func, &imem->base, &iobj->base);133 iobj->base.memory.ptrs = &nv04_instobj_ptrs;134 iobj->imem = imem;135 136 mutex_lock(&imem->base.mutex);137 ret = nvkm_mm_head(&imem->heap, 0, 1, size, size, align ? align : 1, &iobj->node);138 mutex_unlock(&imem->base.mutex);139 return ret;140}141 142/******************************************************************************143 * instmem subdev implementation144 *****************************************************************************/145 146static u32147nv04_instmem_rd32(struct nvkm_instmem *imem, u32 addr)148{149 return nvkm_rd32(imem->subdev.device, 0x700000 + addr);150}151 152static void153nv04_instmem_wr32(struct nvkm_instmem *imem, u32 addr, u32 data)154{155 nvkm_wr32(imem->subdev.device, 0x700000 + addr, data);156}157 158void159nv04_instmem_resume(struct nvkm_instmem *imem)160{161 struct nvkm_instobj *iobj;162 163 list_for_each_entry(iobj, &imem->boot, head) {164 if (iobj->suspend)165 nvkm_instobj_load(iobj);166 }167 168 nvkm_bar_bar2_init(imem->subdev.device);169 170 list_for_each_entry(iobj, &imem->list, head) {171 if (iobj->suspend)172 nvkm_instobj_load(iobj);173 }174}175 176int177nv04_instmem_suspend(struct nvkm_instmem *imem)178{179 struct nvkm_instobj *iobj;180 181 list_for_each_entry(iobj, &imem->list, head) {182 if (iobj->preserve) {183 int ret = nvkm_instobj_save(iobj);184 if (ret)185 return ret;186 }187 }188 189 nvkm_bar_bar2_fini(imem->subdev.device);190 191 list_for_each_entry(iobj, &imem->boot, head) {192 int ret = nvkm_instobj_save(iobj);193 if (ret)194 return ret;195 }196 197 return 0;198}199 200static int201nv04_instmem_oneinit(struct nvkm_instmem *base)202{203 struct nv04_instmem *imem = nv04_instmem(base);204 struct nvkm_device *device = imem->base.subdev.device;205 int ret;206 207 /* PRAMIN aperture maps over the end of VRAM, reserve it */208 imem->base.reserved = 512 * 1024;209 210 ret = nvkm_mm_init(&imem->heap, 0, 0, imem->base.reserved, 1);211 if (ret)212 return ret;213 214 /* 0x00000-0x10000: reserve for probable vbios image */215 ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x10000, 0, false,216 &imem->base.vbios);217 if (ret)218 return ret;219 220 /* 0x10000-0x18000: reserve for RAMHT */221 ret = nvkm_ramht_new(device, 0x08000, 0, NULL, &imem->base.ramht);222 if (ret)223 return ret;224 225 /* 0x18000-0x18800: reserve for RAMFC (enough for 32 nv30 channels) */226 ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x00800, 0, true,227 &imem->base.ramfc);228 if (ret)229 return ret;230 231 /* 0x18800-0x18a00: reserve for RAMRO */232 ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x00200, 0, false,233 &imem->base.ramro);234 if (ret)235 return ret;236 237 return 0;238}239 240static void *241nv04_instmem_dtor(struct nvkm_instmem *base)242{243 struct nv04_instmem *imem = nv04_instmem(base);244 nvkm_memory_unref(&imem->base.ramfc);245 nvkm_memory_unref(&imem->base.ramro);246 nvkm_ramht_del(&imem->base.ramht);247 nvkm_memory_unref(&imem->base.vbios);248 nvkm_mm_fini(&imem->heap);249 return imem;250}251 252static const struct nvkm_instmem_func253nv04_instmem = {254 .dtor = nv04_instmem_dtor,255 .oneinit = nv04_instmem_oneinit,256 .suspend = nv04_instmem_suspend,257 .resume = nv04_instmem_resume,258 .rd32 = nv04_instmem_rd32,259 .wr32 = nv04_instmem_wr32,260 .memory_new = nv04_instobj_new,261 .zero = false,262};263 264int265nv04_instmem_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,266 struct nvkm_instmem **pimem)267{268 struct nv04_instmem *imem;269 270 if (!(imem = kzalloc(sizeof(*imem), GFP_KERNEL)))271 return -ENOMEM;272 nvkm_instmem_ctor(&nv04_instmem, device, type, inst, &imem->base);273 *pimem = &imem->base;274 return 0;275}276