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1/*2 * Copyright 2012 Red Hat Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: Ben Skeggs23 */24#include "mem.h"25#include "vmm.h"26 27#include <core/option.h>28 29#include <nvif/class.h>30 31static void32nv44_mmu_init(struct nvkm_mmu *mmu)33{34 struct nvkm_device *device = mmu->subdev.device;35 struct nvkm_memory *pt = mmu->vmm->pd->pt[0]->memory;36 u32 addr;37 38 /* calculate vram address of this PRAMIN block, object must be39 * allocated on 512KiB alignment, and not exceed a total size40 * of 512KiB for this to work correctly41 */42 addr = nvkm_rd32(device, 0x10020c);43 addr -= ((nvkm_memory_addr(pt) >> 19) + 1) << 19;44 45 nvkm_wr32(device, 0x100850, 0x80000000);46 nvkm_wr32(device, 0x100818, mmu->vmm->null);47 nvkm_wr32(device, 0x100804, (nvkm_memory_size(pt) / 4) * 4096);48 nvkm_wr32(device, 0x100850, 0x00008000);49 nvkm_mask(device, 0x10008c, 0x00000200, 0x00000200);50 nvkm_wr32(device, 0x100820, 0x00000000);51 nvkm_wr32(device, 0x10082c, 0x00000001);52 nvkm_wr32(device, 0x100800, addr | 0x00000010);53}54 55static const struct nvkm_mmu_func56nv44_mmu = {57 .init = nv44_mmu_init,58 .dma_bits = 39,59 .mmu = {{ -1, -1, NVIF_CLASS_MMU_NV04}},60 .mem = {{ -1, -1, NVIF_CLASS_MEM_NV04}, nv04_mem_new, nv04_mem_map },61 .vmm = {{ -1, -1, NVIF_CLASS_VMM_NV04}, nv44_vmm_new, true },62};63 64int65nv44_mmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,66 struct nvkm_mmu **pmmu)67{68 if (device->type == NVKM_DEVICE_AGP ||69 !nvkm_boolopt(device->cfgopt, "NvPCIE", true))70 return nv04_mmu_new(device, type, inst, pmmu);71 72 return nvkm_mmu_new_(&nv44_mmu, device, type, inst, pmmu);73}74