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1/*2 * Copyright 2018 Red Hat Inc.3 * Copyright 2019 NVIDIA Corporation.4 *5 * Permission is hereby granted, free of charge, to any person obtaining a6 * copy of this software and associated documentation files (the "Software"),7 * to deal in the Software without restriction, including without limitation8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,9 * and/or sell copies of the Software, and to permit persons to whom the10 * Software is furnished to do so, subject to the following conditions:11 *12 * The above copyright notice and this permission notice shall be included in13 * all copies or substantial portions of the Software.14 *15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR21 * OTHER DEALINGS IN THE SOFTWARE.22 */23#include "mem.h"24#include "vmm.h"25 26#include <core/option.h>27#include <subdev/gsp.h>28 29#include <nvif/class.h>30 31static const u8 *32tu102_mmu_kind(struct nvkm_mmu *mmu, int *count, u8 *invalid)33{34 static const u835 kind[16] = {36 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* 0x00 */37 0x06, 0x06, 0x02, 0x01, 0x03, 0x04, 0x05, 0x07,38 };39 *count = ARRAY_SIZE(kind);40 *invalid = 0x07;41 return kind;42}43 44static const struct nvkm_mmu_func45tu102_mmu = {46 .dma_bits = 47,47 .mmu = {{ -1, -1, NVIF_CLASS_MMU_GF100}},48 .mem = {{ -1, 0, NVIF_CLASS_MEM_GF100}, gf100_mem_new, gf100_mem_map },49 .vmm = {{ -1, 0, NVIF_CLASS_VMM_GP100}, tu102_vmm_new },50 .kind = tu102_mmu_kind,51 .kind_sys = true,52};53 54int55tu102_mmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,56 struct nvkm_mmu **pmmu)57{58 if (nvkm_gsp_rm(device->gsp))59 return r535_mmu_new(&tu102_mmu, device, type, inst, pmmu);60 61 return nvkm_mmu_new_(&tu102_mmu, device, type, inst, pmmu);62}63