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1/*2 * Copyright 2013 Red Hat Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: Ben Skeggs23 */24 25#ifdef INCLUDE_PROC26process(PROC_HOST, #host_init, #host_recv)27#endif28 29/******************************************************************************30 * HOST data segment31 *****************************************************************************/32#ifdef INCLUDE_DATA33// HOST (R)FIFO packet format34.equ #fifo_process 0x0035.equ #fifo_message 0x0436.equ #fifo_data0 0x0837.equ #fifo_data1 0x0c38 39// HOST HOST->PWR queue description40.equ #fifo_qlen 4 // log2(size of queue entry in bytes)41.equ #fifo_qnum 3 // log2(max number of entries in queue)42.equ #fifo_qmaskb (1 << #fifo_qnum) // max number of entries in queue43.equ #fifo_qmaskp (#fifo_qmaskb - 1)44.equ #fifo_qmaskf ((#fifo_qmaskb << 1) - 1)45.equ #fifo_qsize (1 << (#fifo_qlen + #fifo_qnum))46fifo_queue: .skip 128 // #fifo_qsize47 48// HOST PWR->HOST queue description49.equ #rfifo_qlen 4 // log2(size of queue entry in bytes)50.equ #rfifo_qnum 3 // log2(max number of entries in queue)51.equ #rfifo_qmaskb (1 << #rfifo_qnum) // max number of entries in queue52.equ #rfifo_qmaskp (#rfifo_qmaskb - 1)53.equ #rfifo_qmaskf ((#rfifo_qmaskb << 1) - 1)54.equ #rfifo_qsize (1 << (#rfifo_qlen + #rfifo_qnum))55rfifo_queue: .skip 128 // #rfifo_qsize56#endif57 58/******************************************************************************59 * HOST code segment60 *****************************************************************************/61#ifdef INCLUDE_CODE62// HOST->PWR comms - dequeue message(s) for process(es) from FIFO63//64// $r15 - current (host)65// $r0 - zero66host_send:67 nv_iord($r1, NV_PPWR_FIFO_GET(0))68 nv_iord($r2, NV_PPWR_FIFO_PUT(0))69 cmp b32 $r1 $r270 bra e #host_send_done71 // calculate address of message72 and $r14 $r1 #fifo_qmaskp73 shl b32 $r14 $r14 #fifo_qlen74 add b32 $r14 #fifo_queue75 76 // read message data, and pass to appropriate process77 ld b32 $r11 D[$r14 + #fifo_data1]78 ld b32 $r12 D[$r14 + #fifo_data0]79 ld b32 $r13 D[$r14 + #fifo_message]80 ld b32 $r14 D[$r14 + #fifo_process]81 call(send)82 83 // increment GET84 add b32 $r1 0x185 and $r14 $r1 #fifo_qmaskf86 nv_iowr(NV_PPWR_FIFO_GET(0), $r14)87 bra #host_send88 host_send_done:89 ret90 91// PWR->HOST comms - enqueue message for HOST to RFIFO92//93// $r15 - current (host)94// $r14 - process95// $r13 - message96// $r12 - message data 097// $r11 - message data 198// $r0 - zero99host_recv:100 // message from intr handler == HOST->PWR comms pending101 imm32($r1, PROC_KERN)102 cmp b32 $r14 $r1103 bra e #host_send104 105 // wait for space in RFIFO106 host_recv_wait:107 nv_iord($r1, NV_PPWR_RFIFO_GET)108 nv_iord($r2, NV_PPWR_RFIFO_PUT)109 xor $r1 #rfifo_qmaskb110 cmp b32 $r1 $r2111 bra e #host_recv_wait112 113 and $r3 $r2 #rfifo_qmaskp114 shl b32 $r3 #rfifo_qlen115 add b32 $r3 #rfifo_queue116 117 // enqueue message118 st b32 D[$r3 + #fifo_data1] $r11119 st b32 D[$r3 + #fifo_data0] $r12120 st b32 D[$r3 + #fifo_message] $r13121 st b32 D[$r3 + #fifo_process] $r14122 123 add b32 $r2 0x1124 and $r2 #rfifo_qmaskf125 nv_iowr(NV_PPWR_RFIFO_PUT, $r2)126 127 // notify host of pending message128 mov $r2 NV_PPWR_INTR_TRIGGER_USER0129 nv_iowr(NV_PPWR_INTR_TRIGGER, $r2)130 ret131 132// $r15 - current (host)133// $r0 - zero134host_init:135 // store each fifo's base/size in H2D/D2H scratch regs136 mov $r1 #fifo_qsize137 shl b32 $r1 16138 or $r1 #fifo_queue139 nv_iowr(NV_PPWR_H2D, $r1);140 141 mov $r1 #rfifo_qsize142 shl b32 $r1 16143 or $r1 #rfifo_queue144 nv_iowr(NV_PPWR_D2H, $r1);145 146 // enable fifo subintr for first fifo147 mov $r1 1148 nv_iowr(NV_PPWR_FIFO_INTR_EN, $r1)149 ret150#endif151