155 lines · c
1/*2 * Copyright 2012 Red Hat Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: Ben Skeggs23 */24#include "priv.h"25 26static int27pwm_info(struct nvkm_therm *therm, int line)28{29 struct nvkm_subdev *subdev = &therm->subdev;30 struct nvkm_device *device = subdev->device;31 u32 gpio = nvkm_rd32(device, 0x00d610 + (line * 0x04));32 33 switch (gpio & 0x000000c0) {34 case 0x00000000: /* normal mode, possibly pwm forced off by us */35 case 0x00000040: /* nvio special */36 switch (gpio & 0x0000001f) {37 case 0x00: return 2;38 case 0x19: return 1;39 case 0x1c: return 0;40 case 0x1e: return 2;41 default:42 break;43 }44 break;45 default:46 break;47 }48 49 nvkm_error(subdev, "GPIO %d unknown PWM: %08x\n", line, gpio);50 return -ENODEV;51}52 53int54gf119_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable)55{56 struct nvkm_device *device = therm->subdev.device;57 u32 data = enable ? 0x00000040 : 0x00000000;58 int indx = pwm_info(therm, line);59 if (indx < 0)60 return indx;61 else if (indx < 2)62 nvkm_mask(device, 0x00d610 + (line * 0x04), 0x000000c0, data);63 /* nothing to do for indx == 2, it seems hardwired to PTHERM */64 return 0;65}66 67int68gf119_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty)69{70 struct nvkm_device *device = therm->subdev.device;71 int indx = pwm_info(therm, line);72 if (indx < 0)73 return indx;74 else if (indx < 2) {75 if (nvkm_rd32(device, 0x00d610 + (line * 0x04)) & 0x00000040) {76 *divs = nvkm_rd32(device, 0x00e114 + (indx * 8));77 *duty = nvkm_rd32(device, 0x00e118 + (indx * 8));78 return 0;79 }80 } else if (indx == 2) {81 *divs = nvkm_rd32(device, 0x0200d8) & 0x1fff;82 *duty = nvkm_rd32(device, 0x0200dc) & 0x1fff;83 return 0;84 }85 86 return -EINVAL;87}88 89int90gf119_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty)91{92 struct nvkm_device *device = therm->subdev.device;93 int indx = pwm_info(therm, line);94 if (indx < 0)95 return indx;96 else if (indx < 2) {97 nvkm_wr32(device, 0x00e114 + (indx * 8), divs);98 nvkm_wr32(device, 0x00e118 + (indx * 8), duty | 0x80000000);99 } else if (indx == 2) {100 nvkm_mask(device, 0x0200d8, 0x1fff, divs); /* keep the high bits */101 nvkm_wr32(device, 0x0200dc, duty | 0x40000000);102 }103 return 0;104}105 106int107gf119_fan_pwm_clock(struct nvkm_therm *therm, int line)108{109 struct nvkm_device *device = therm->subdev.device;110 int indx = pwm_info(therm, line);111 if (indx < 0)112 return 0;113 else if (indx < 2)114 return (device->crystal * 1000) / 20;115 else116 return device->crystal * 1000 / 10;117}118 119void120gf119_therm_init(struct nvkm_therm *therm)121{122 struct nvkm_device *device = therm->subdev.device;123 124 g84_sensor_setup(therm);125 126 /* enable fan tach, count revolutions per-second */127 nvkm_mask(device, 0x00e720, 0x00000003, 0x00000002);128 if (therm->fan->tach.func != DCB_GPIO_UNUSED) {129 nvkm_mask(device, 0x00d79c, 0x000000ff, therm->fan->tach.line);130 nvkm_wr32(device, 0x00e724, device->crystal * 1000);131 nvkm_mask(device, 0x00e720, 0x00000001, 0x00000001);132 }133 nvkm_mask(device, 0x00e720, 0x00000002, 0x00000000);134}135 136static const struct nvkm_therm_func137gf119_therm = {138 .init = gf119_therm_init,139 .fini = g84_therm_fini,140 .pwm_ctrl = gf119_fan_pwm_ctrl,141 .pwm_get = gf119_fan_pwm_get,142 .pwm_set = gf119_fan_pwm_set,143 .pwm_clock = gf119_fan_pwm_clock,144 .temp_get = g84_temp_get,145 .fan_sense = gt215_therm_fan_sense,146 .program_alarms = nvkm_therm_program_alarms_polling,147};148 149int150gf119_therm_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,151 struct nvkm_therm **ptherm)152{153 return nvkm_therm_new_(&gf119_therm, device, type, inst, ptherm);154}155