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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * HDMI driver definition for TI OMAP5 processors.4 *5 * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/6 */7 8#ifndef _HDMI5_CORE_H_9#define _HDMI5_CORE_H_10 11#include "hdmi.h"12 13/* HDMI IP Core System */14 15/* HDMI Identification */16#define HDMI_CORE_DESIGN_ID 0x0000017#define HDMI_CORE_REVISION_ID 0x0000418#define HDMI_CORE_PRODUCT_ID0 0x0000819#define HDMI_CORE_PRODUCT_ID1 0x0000C20#define HDMI_CORE_CONFIG0_ID 0x0001021#define HDMI_CORE_CONFIG1_ID 0x0001422#define HDMI_CORE_CONFIG2_ID 0x0001823#define HDMI_CORE_CONFIG3_ID 0x0001C24 25/* HDMI Interrupt */26#define HDMI_CORE_IH_FC_STAT0 0x0040027#define HDMI_CORE_IH_FC_STAT1 0x0040428#define HDMI_CORE_IH_FC_STAT2 0x0040829#define HDMI_CORE_IH_AS_STAT0 0x0040C30#define HDMI_CORE_IH_PHY_STAT0 0x0041031#define HDMI_CORE_IH_I2CM_STAT0 0x0041432#define HDMI_CORE_IH_CEC_STAT0 0x0041833#define HDMI_CORE_IH_VP_STAT0 0x0041C34#define HDMI_CORE_IH_I2CMPHY_STAT0 0x0042035#define HDMI_CORE_IH_MUTE 0x007FC36 37/* HDMI Video Sampler */38#define HDMI_CORE_TX_INVID0 0x0080039#define HDMI_CORE_TX_INSTUFFING 0x0080440#define HDMI_CORE_TX_RGYDATA0 0x0080841#define HDMI_CORE_TX_RGYDATA1 0x0080C42#define HDMI_CORE_TX_RCRDATA0 0x0081043#define HDMI_CORE_TX_RCRDATA1 0x0081444#define HDMI_CORE_TX_BCBDATA0 0x0081845#define HDMI_CORE_TX_BCBDATA1 0x0081C46 47/* HDMI Video Packetizer */48#define HDMI_CORE_VP_STATUS 0x0200049#define HDMI_CORE_VP_PR_CD 0x0200450#define HDMI_CORE_VP_STUFF 0x0200851#define HDMI_CORE_VP_REMAP 0x0200C52#define HDMI_CORE_VP_CONF 0x0201053#define HDMI_CORE_VP_STAT 0x0201454#define HDMI_CORE_VP_INT 0x0201855#define HDMI_CORE_VP_MASK 0x0201C56#define HDMI_CORE_VP_POL 0x0202057 58/* Frame Composer */59#define HDMI_CORE_FC_INVIDCONF 0x0400060#define HDMI_CORE_FC_INHACTIV0 0x0400461#define HDMI_CORE_FC_INHACTIV1 0x0400862#define HDMI_CORE_FC_INHBLANK0 0x0400C63#define HDMI_CORE_FC_INHBLANK1 0x0401064#define HDMI_CORE_FC_INVACTIV0 0x0401465#define HDMI_CORE_FC_INVACTIV1 0x0401866#define HDMI_CORE_FC_INVBLANK 0x0401C67#define HDMI_CORE_FC_HSYNCINDELAY0 0x0402068#define HDMI_CORE_FC_HSYNCINDELAY1 0x0402469#define HDMI_CORE_FC_HSYNCINWIDTH0 0x0402870#define HDMI_CORE_FC_HSYNCINWIDTH1 0x0402C71#define HDMI_CORE_FC_VSYNCINDELAY 0x0403072#define HDMI_CORE_FC_VSYNCINWIDTH 0x0403473#define HDMI_CORE_FC_INFREQ0 0x0403874#define HDMI_CORE_FC_INFREQ1 0x0403C75#define HDMI_CORE_FC_INFREQ2 0x0404076#define HDMI_CORE_FC_CTRLDUR 0x0404477#define HDMI_CORE_FC_EXCTRLDUR 0x0404878#define HDMI_CORE_FC_EXCTRLSPAC 0x0404C79#define HDMI_CORE_FC_CH0PREAM 0x0405080#define HDMI_CORE_FC_CH1PREAM 0x0405481#define HDMI_CORE_FC_CH2PREAM 0x0405882#define HDMI_CORE_FC_AVICONF3 0x0405C83#define HDMI_CORE_FC_GCP 0x0406084#define HDMI_CORE_FC_AVICONF0 0x0406485#define HDMI_CORE_FC_AVICONF1 0x0406886#define HDMI_CORE_FC_AVICONF2 0x0406C87#define HDMI_CORE_FC_AVIVID 0x0407088#define HDMI_CORE_FC_AVIETB0 0x0407489#define HDMI_CORE_FC_AVIETB1 0x0407890#define HDMI_CORE_FC_AVISBB0 0x0407C91#define HDMI_CORE_FC_AVISBB1 0x0408092#define HDMI_CORE_FC_AVIELB0 0x0408493#define HDMI_CORE_FC_AVIELB1 0x0408894#define HDMI_CORE_FC_AVISRB0 0x0408C95#define HDMI_CORE_FC_AVISRB1 0x0409096#define HDMI_CORE_FC_AUDICONF0 0x0409497#define HDMI_CORE_FC_AUDICONF1 0x0409898#define HDMI_CORE_FC_AUDICONF2 0x0409C99#define HDMI_CORE_FC_AUDICONF3 0x040A0100#define HDMI_CORE_FC_VSDIEEEID0 0x040A4101#define HDMI_CORE_FC_VSDSIZE 0x040A8102#define HDMI_CORE_FC_VSDIEEEID1 0x040C0103#define HDMI_CORE_FC_VSDIEEEID2 0x040C4104#define HDMI_CORE_FC_VSDPAYLOAD(n) (n * 4 + 0x040C8)105#define HDMI_CORE_FC_SPDVENDORNAME(n) (n * 4 + 0x04128)106#define HDMI_CORE_FC_SPDPRODUCTNAME(n) (n * 4 + 0x04148)107#define HDMI_CORE_FC_SPDDEVICEINF 0x04188108#define HDMI_CORE_FC_AUDSCONF 0x0418C109#define HDMI_CORE_FC_AUDSSTAT 0x04190110#define HDMI_CORE_FC_AUDSV 0x04194111#define HDMI_CORE_FC_AUDSU 0x04198112#define HDMI_CORE_FC_AUDSCHNLS(n) (n * 4 + 0x0419C)113#define HDMI_CORE_FC_CTRLQHIGH 0x041CC114#define HDMI_CORE_FC_CTRLQLOW 0x041D0115#define HDMI_CORE_FC_ACP0 0x041D4116#define HDMI_CORE_FC_ACP(n) ((16-n) * 4 + 0x04208)117#define HDMI_CORE_FC_ISCR1_0 0x04248118#define HDMI_CORE_FC_ISCR1(n) ((16-n) * 4 + 0x0424C)119#define HDMI_CORE_FC_ISCR2(n) ((15-n) * 4 + 0x0428C)120#define HDMI_CORE_FC_DATAUTO0 0x042CC121#define HDMI_CORE_FC_DATAUTO1 0x042D0122#define HDMI_CORE_FC_DATAUTO2 0x042D4123#define HDMI_CORE_FC_DATMAN 0x042D8124#define HDMI_CORE_FC_DATAUTO3 0x042DC125#define HDMI_CORE_FC_RDRB(n) (n * 4 + 0x042E0)126#define HDMI_CORE_FC_STAT0 0x04340127#define HDMI_CORE_FC_INT0 0x04344128#define HDMI_CORE_FC_MASK0 0x04348129#define HDMI_CORE_FC_POL0 0x0434C130#define HDMI_CORE_FC_STAT1 0x04350131#define HDMI_CORE_FC_INT1 0x04354132#define HDMI_CORE_FC_MASK1 0x04358133#define HDMI_CORE_FC_POL1 0x0435C134#define HDMI_CORE_FC_STAT2 0x04360135#define HDMI_CORE_FC_INT2 0x04364136#define HDMI_CORE_FC_MASK2 0x04368137#define HDMI_CORE_FC_POL2 0x0436C138#define HDMI_CORE_FC_PRCONF 0x04380139#define HDMI_CORE_FC_GMD_STAT 0x04400140#define HDMI_CORE_FC_GMD_EN 0x04404141#define HDMI_CORE_FC_GMD_UP 0x04408142#define HDMI_CORE_FC_GMD_CONF 0x0440C143#define HDMI_CORE_FC_GMD_HB 0x04410144#define HDMI_CORE_FC_GMD_PB(n) (n * 4 + 0x04414)145#define HDMI_CORE_FC_DBGFORCE 0x04800146#define HDMI_CORE_FC_DBGAUD0CH0 0x04804147#define HDMI_CORE_FC_DBGAUD1CH0 0x04808148#define HDMI_CORE_FC_DBGAUD2CH0 0x0480C149#define HDMI_CORE_FC_DBGAUD0CH1 0x04810150#define HDMI_CORE_FC_DBGAUD1CH1 0x04814151#define HDMI_CORE_FC_DBGAUD2CH1 0x04818152#define HDMI_CORE_FC_DBGAUD0CH2 0x0481C153#define HDMI_CORE_FC_DBGAUD1CH2 0x04820154#define HDMI_CORE_FC_DBGAUD2CH2 0x04824155#define HDMI_CORE_FC_DBGAUD0CH3 0x04828156#define HDMI_CORE_FC_DBGAUD1CH3 0x0482C157#define HDMI_CORE_FC_DBGAUD2CH3 0x04830158#define HDMI_CORE_FC_DBGAUD0CH4 0x04834159#define HDMI_CORE_FC_DBGAUD1CH4 0x04838160#define HDMI_CORE_FC_DBGAUD2CH4 0x0483C161#define HDMI_CORE_FC_DBGAUD0CH5 0x04840162#define HDMI_CORE_FC_DBGAUD1CH5 0x04844163#define HDMI_CORE_FC_DBGAUD2CH5 0x04848164#define HDMI_CORE_FC_DBGAUD0CH6 0x0484C165#define HDMI_CORE_FC_DBGAUD1CH6 0x04850166#define HDMI_CORE_FC_DBGAUD2CH6 0x04854167#define HDMI_CORE_FC_DBGAUD0CH7 0x04858168#define HDMI_CORE_FC_DBGAUD1CH7 0x0485C169#define HDMI_CORE_FC_DBGAUD2CH7 0x04860170#define HDMI_CORE_FC_DBGTMDS0 0x04864171#define HDMI_CORE_FC_DBGTMDS1 0x04868172#define HDMI_CORE_FC_DBGTMDS2 0x0486C173#define HDMI_CORE_PHY_MASK0 0x0C018174#define HDMI_CORE_PHY_I2CM_INT_ADDR 0x0C09C175#define HDMI_CORE_PHY_I2CM_CTLINT_ADDR 0x0C0A0176 177/* HDMI Audio */178#define HDMI_CORE_AUD_CONF0 0x0C400179#define HDMI_CORE_AUD_CONF1 0x0C404180#define HDMI_CORE_AUD_INT 0x0C408181#define HDMI_CORE_AUD_N1 0x0C800182#define HDMI_CORE_AUD_N2 0x0C804183#define HDMI_CORE_AUD_N3 0x0C808184#define HDMI_CORE_AUD_CTS1 0x0C80C185#define HDMI_CORE_AUD_CTS2 0x0C810186#define HDMI_CORE_AUD_CTS3 0x0C814187#define HDMI_CORE_AUD_INCLKFS 0x0C818188#define HDMI_CORE_AUD_CC08 0x0CC08189#define HDMI_CORE_AUD_GP_CONF0 0x0D400190#define HDMI_CORE_AUD_GP_CONF1 0x0D404191#define HDMI_CORE_AUD_GP_CONF2 0x0D408192#define HDMI_CORE_AUD_D010 0x0D010193#define HDMI_CORE_AUD_GP_STAT 0x0D40C194#define HDMI_CORE_AUD_GP_INT 0x0D410195#define HDMI_CORE_AUD_GP_POL 0x0D414196#define HDMI_CORE_AUD_GP_MASK 0x0D418197 198/* HDMI Main Controller */199#define HDMI_CORE_MC_CLKDIS 0x10004200#define HDMI_CORE_MC_SWRSTZREQ 0x10008201#define HDMI_CORE_MC_FLOWCTRL 0x10010202#define HDMI_CORE_MC_PHYRSTZ 0x10014203#define HDMI_CORE_MC_LOCKONCLOCK 0x10018204 205/* HDMI COLOR SPACE CONVERTER */206#define HDMI_CORE_CSC_CFG 0x10400207#define HDMI_CORE_CSC_SCALE 0x10404208#define HDMI_CORE_CSC_COEF_A1_MSB 0x10408209#define HDMI_CORE_CSC_COEF_A1_LSB 0x1040C210#define HDMI_CORE_CSC_COEF_A2_MSB 0x10410211#define HDMI_CORE_CSC_COEF_A2_LSB 0x10414212#define HDMI_CORE_CSC_COEF_A3_MSB 0x10418213#define HDMI_CORE_CSC_COEF_A3_LSB 0x1041C214#define HDMI_CORE_CSC_COEF_A4_MSB 0x10420215#define HDMI_CORE_CSC_COEF_A4_LSB 0x10424216#define HDMI_CORE_CSC_COEF_B1_MSB 0x10428217#define HDMI_CORE_CSC_COEF_B1_LSB 0x1042C218#define HDMI_CORE_CSC_COEF_B2_MSB 0x10430219#define HDMI_CORE_CSC_COEF_B2_LSB 0x10434220#define HDMI_CORE_CSC_COEF_B3_MSB 0x10438221#define HDMI_CORE_CSC_COEF_B3_LSB 0x1043C222#define HDMI_CORE_CSC_COEF_B4_MSB 0x10440223#define HDMI_CORE_CSC_COEF_B4_LSB 0x10444224#define HDMI_CORE_CSC_COEF_C1_MSB 0x10448225#define HDMI_CORE_CSC_COEF_C1_LSB 0x1044C226#define HDMI_CORE_CSC_COEF_C2_MSB 0x10450227#define HDMI_CORE_CSC_COEF_C2_LSB 0x10454228#define HDMI_CORE_CSC_COEF_C3_MSB 0x10458229#define HDMI_CORE_CSC_COEF_C3_LSB 0x1045C230#define HDMI_CORE_CSC_COEF_C4_MSB 0x10460231#define HDMI_CORE_CSC_COEF_C4_LSB 0x10464232 233/* HDMI HDCP */234#define HDMI_CORE_HDCP_MASK 0x14020235 236/* HDMI CEC */237#define HDMI_CORE_CEC_MASK 0x17408238 239/* HDMI I2C Master */240#define HDMI_CORE_I2CM_SLAVE 0x157C8241#define HDMI_CORE_I2CM_ADDRESS 0x157CC242#define HDMI_CORE_I2CM_DATAO 0x157D0243#define HDMI_CORE_I2CM_DATAI 0X157D4244#define HDMI_CORE_I2CM_OPERATION 0x157D8245#define HDMI_CORE_I2CM_INT 0x157DC246#define HDMI_CORE_I2CM_CTLINT 0x157E0247#define HDMI_CORE_I2CM_DIV 0x157E4248#define HDMI_CORE_I2CM_SEGADDR 0x157E8249#define HDMI_CORE_I2CM_SOFTRSTZ 0x157EC250#define HDMI_CORE_I2CM_SEGPTR 0x157F0251#define HDMI_CORE_I2CM_SS_SCL_HCNT_1_ADDR 0x157F4252#define HDMI_CORE_I2CM_SS_SCL_HCNT_0_ADDR 0x157F8253#define HDMI_CORE_I2CM_SS_SCL_LCNT_1_ADDR 0x157FC254#define HDMI_CORE_I2CM_SS_SCL_LCNT_0_ADDR 0x15800255#define HDMI_CORE_I2CM_FS_SCL_HCNT_1_ADDR 0x15804256#define HDMI_CORE_I2CM_FS_SCL_HCNT_0_ADDR 0x15808257#define HDMI_CORE_I2CM_FS_SCL_LCNT_1_ADDR 0x1580C258#define HDMI_CORE_I2CM_FS_SCL_LCNT_0_ADDR 0x15810259#define HDMI_CORE_I2CM_SDA_HOLD_ADDR 0x15814260 261enum hdmi_core_packet_mode {262 HDMI_PACKETMODERESERVEDVALUE = 0,263 HDMI_PACKETMODE24BITPERPIXEL = 4,264 HDMI_PACKETMODE30BITPERPIXEL = 5,265 HDMI_PACKETMODE36BITPERPIXEL = 6,266 HDMI_PACKETMODE48BITPERPIXEL = 7,267};268 269struct hdmi_core_vid_config {270 struct hdmi_config v_fc_config;271 enum hdmi_core_packet_mode packet_mode;272 int data_enable_pol;273 int vblank_osc;274 int hblank;275 int vblank;276};277 278struct csc_table {279 u16 a1, a2, a3, a4;280 u16 b1, b2, b3, b4;281 u16 c1, c2, c3, c4;282};283 284void hdmi5_core_ddc_init(struct hdmi_core_data *core);285int hdmi5_core_ddc_read(void *data, u8 *buf, unsigned int block, size_t len);286void hdmi5_core_ddc_uninit(struct hdmi_core_data *core);287 288void hdmi5_core_dump(struct hdmi_core_data *core, struct seq_file *s);289int hdmi5_core_handle_irqs(struct hdmi_core_data *core);290void hdmi5_configure(struct hdmi_core_data *core, struct hdmi_wp_data *wp,291 struct hdmi_config *cfg);292int hdmi5_core_init(struct platform_device *pdev, struct hdmi_core_data *core);293 294int hdmi5_audio_config(struct hdmi_core_data *core, struct hdmi_wp_data *wp,295 struct omap_dss_audio *audio, u32 pclk);296#endif297