2117 lines · c
1/*2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sub license,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice (including the12 * next paragraph) shall be included in all copies or substantial portions13 * of the Software.14 *15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER21 * DEALINGS IN THE SOFTWARE.22 */23 24#include <linux/debugfs.h>25#include <linux/delay.h>26#include <linux/gpio/consumer.h>27#include <linux/iopoll.h>28#include <linux/module.h>29#include <linux/of_platform.h>30#include <linux/platform_device.h>31#include <linux/pm_runtime.h>32#include <linux/regulator/consumer.h>33 34#include <video/display_timing.h>35#include <video/of_display_timing.h>36#include <video/videomode.h>37 38#include <drm/display/drm_dp_aux_bus.h>39#include <drm/display/drm_dp_helper.h>40#include <drm/drm_crtc.h>41#include <drm/drm_device.h>42#include <drm/drm_edid.h>43#include <drm/drm_panel.h>44 45/**46 * struct panel_delay - Describes delays for a simple panel.47 */48struct panel_delay {49 /**50 * @hpd_reliable: Time for HPD to be reliable51 *52 * The time (in milliseconds) that it takes after powering the panel53 * before the HPD signal is reliable. Ideally this is 0 but some panels,54 * board designs, or bad pulldown configs can cause a glitch here.55 *56 * NOTE: on some old panel data this number appears to be much too big.57 * Presumably some old panels simply didn't have HPD hooked up and put58 * the hpd_absent here because this field predates the59 * hpd_absent. While that works, it's non-ideal.60 */61 unsigned int hpd_reliable;62 63 /**64 * @hpd_absent: Time to wait if HPD isn't hooked up.65 *66 * Add this to the prepare delay if we know Hot Plug Detect isn't used.67 *68 * This is T3-max on eDP timing diagrams or the delay from power on69 * until HPD is guaranteed to be asserted.70 */71 unsigned int hpd_absent;72 73 /**74 * @powered_on_to_enable: Time between panel powered on and enable.75 *76 * The minimum time, in milliseconds, that needs to have passed77 * between when panel powered on and enable may begin.78 *79 * This is (T3+T4+T5+T6+T8)-min on eDP timing diagrams or after the80 * power supply enabled until we can turn the backlight on and see81 * valid data.82 *83 * This doesn't normally need to be set if timings are already met by84 * prepare_to_enable or enable.85 */86 unsigned int powered_on_to_enable;87 88 /**89 * @prepare_to_enable: Time between prepare and enable.90 *91 * The minimum time, in milliseconds, that needs to have passed92 * between when prepare finished and enable may begin. If at93 * enable time less time has passed since prepare finished,94 * the driver waits for the remaining time.95 *96 * If a fixed enable delay is also specified, we'll start97 * counting before delaying for the fixed delay.98 *99 * If a fixed prepare delay is also specified, we won't start100 * counting until after the fixed delay. We can't overlap this101 * fixed delay with the min time because the fixed delay102 * doesn't happen at the end of the function if a HPD GPIO was103 * specified.104 *105 * In other words:106 * prepare()107 * ...108 * // do fixed prepare delay109 * // wait for HPD GPIO if applicable110 * // start counting for prepare_to_enable111 *112 * enable()113 * // do fixed enable delay114 * // enforce prepare_to_enable min time115 *116 * This is not specified in a standard way on eDP timing diagrams.117 * It is effectively the time from HPD going high till you can118 * turn on the backlight.119 */120 unsigned int prepare_to_enable;121 122 /**123 * @enable: Time for the panel to display a valid frame.124 *125 * The time (in milliseconds) that it takes for the panel to126 * display the first valid frame after starting to receive127 * video data.128 *129 * This is (T6-min + max(T7-max, T8-min)) on eDP timing diagrams or130 * the delay after link training finishes until we can turn the131 * backlight on and see valid data.132 */133 unsigned int enable;134 135 /**136 * @disable: Time for the panel to turn the display off.137 *138 * The time (in milliseconds) that it takes for the panel to139 * turn the display off (no content is visible).140 *141 * This is T9-min (delay from backlight off to end of valid video142 * data) on eDP timing diagrams. It is not common to set.143 */144 unsigned int disable;145 146 /**147 * @unprepare: Time to power down completely.148 *149 * The time (in milliseconds) that it takes for the panel150 * to power itself down completely.151 *152 * This time is used to prevent a future "prepare" from153 * starting until at least this many milliseconds has passed.154 * If at prepare time less time has passed since unprepare155 * finished, the driver waits for the remaining time.156 *157 * This is T12-min on eDP timing diagrams.158 */159 unsigned int unprepare;160};161 162/**163 * struct panel_desc - Describes a simple panel.164 */165struct panel_desc {166 /**167 * @modes: Pointer to array of fixed modes appropriate for this panel.168 *169 * If only one mode then this can just be the address of the mode.170 * NOTE: cannot be used with "timings" and also if this is specified171 * then you cannot override the mode in the device tree.172 */173 const struct drm_display_mode *modes;174 175 /** @num_modes: Number of elements in modes array. */176 unsigned int num_modes;177 178 /**179 * @timings: Pointer to array of display timings180 *181 * NOTE: cannot be used with "modes" and also these will be used to182 * validate a device tree override if one is present.183 */184 const struct display_timing *timings;185 186 /** @num_timings: Number of elements in timings array. */187 unsigned int num_timings;188 189 /** @bpc: Bits per color. */190 unsigned int bpc;191 192 /** @size: Structure containing the physical size of this panel. */193 struct {194 /**195 * @size.width: Width (in mm) of the active display area.196 */197 unsigned int width;198 199 /**200 * @size.height: Height (in mm) of the active display area.201 */202 unsigned int height;203 } size;204 205 /** @delay: Structure containing various delay values for this panel. */206 struct panel_delay delay;207};208 209/**210 * struct edp_panel_entry - Maps panel ID to delay / panel name.211 */212struct edp_panel_entry {213 /** @ident: edid identity used for panel matching. */214 const struct drm_edid_ident ident;215 216 /** @delay: The power sequencing delays needed for this panel. */217 const struct panel_delay *delay;218 219 /** @override_edid_mode: Override the mode obtained by edid. */220 const struct drm_display_mode *override_edid_mode;221};222 223struct panel_edp {224 struct drm_panel base;225 bool no_hpd;226 227 ktime_t prepared_time;228 ktime_t powered_on_time;229 ktime_t unprepared_time;230 231 const struct panel_desc *desc;232 233 struct regulator *supply;234 struct i2c_adapter *ddc;235 struct drm_dp_aux *aux;236 237 struct gpio_desc *enable_gpio;238 struct gpio_desc *hpd_gpio;239 240 const struct edp_panel_entry *detected_panel;241 242 const struct drm_edid *drm_edid;243 244 struct drm_display_mode override_mode;245 246 enum drm_panel_orientation orientation;247};248 249static inline struct panel_edp *to_panel_edp(struct drm_panel *panel)250{251 return container_of(panel, struct panel_edp, base);252}253 254static unsigned int panel_edp_get_timings_modes(struct panel_edp *panel,255 struct drm_connector *connector)256{257 struct drm_display_mode *mode;258 unsigned int i, num = 0;259 260 for (i = 0; i < panel->desc->num_timings; i++) {261 const struct display_timing *dt = &panel->desc->timings[i];262 struct videomode vm;263 264 videomode_from_timing(dt, &vm);265 mode = drm_mode_create(connector->dev);266 if (!mode) {267 dev_err(panel->base.dev, "failed to add mode %ux%u\n",268 dt->hactive.typ, dt->vactive.typ);269 continue;270 }271 272 drm_display_mode_from_videomode(&vm, mode);273 274 mode->type |= DRM_MODE_TYPE_DRIVER;275 276 if (panel->desc->num_timings == 1)277 mode->type |= DRM_MODE_TYPE_PREFERRED;278 279 drm_mode_probed_add(connector, mode);280 num++;281 }282 283 return num;284}285 286static unsigned int panel_edp_get_display_modes(struct panel_edp *panel,287 struct drm_connector *connector)288{289 struct drm_display_mode *mode;290 unsigned int i, num = 0;291 292 for (i = 0; i < panel->desc->num_modes; i++) {293 const struct drm_display_mode *m = &panel->desc->modes[i];294 295 mode = drm_mode_duplicate(connector->dev, m);296 if (!mode) {297 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n",298 m->hdisplay, m->vdisplay,299 drm_mode_vrefresh(m));300 continue;301 }302 303 mode->type |= DRM_MODE_TYPE_DRIVER;304 305 if (panel->desc->num_modes == 1)306 mode->type |= DRM_MODE_TYPE_PREFERRED;307 308 drm_mode_set_name(mode);309 310 drm_mode_probed_add(connector, mode);311 num++;312 }313 314 return num;315}316 317static int panel_edp_override_edid_mode(struct panel_edp *panel,318 struct drm_connector *connector,319 const struct drm_display_mode *override_mode)320{321 struct drm_display_mode *mode;322 323 mode = drm_mode_duplicate(connector->dev, override_mode);324 if (!mode) {325 dev_err(panel->base.dev, "failed to add additional mode\n");326 return 0;327 }328 329 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;330 drm_mode_set_name(mode);331 drm_mode_probed_add(connector, mode);332 return 1;333}334 335static int panel_edp_get_non_edid_modes(struct panel_edp *panel,336 struct drm_connector *connector)337{338 struct drm_display_mode *mode;339 bool has_override = panel->override_mode.type;340 unsigned int num = 0;341 342 if (!panel->desc)343 return 0;344 345 if (has_override) {346 mode = drm_mode_duplicate(connector->dev,347 &panel->override_mode);348 if (mode) {349 drm_mode_probed_add(connector, mode);350 num = 1;351 } else {352 dev_err(panel->base.dev, "failed to add override mode\n");353 }354 }355 356 /* Only add timings if override was not there or failed to validate */357 if (num == 0 && panel->desc->num_timings)358 num = panel_edp_get_timings_modes(panel, connector);359 360 /*361 * Only add fixed modes if timings/override added no mode.362 *363 * We should only ever have either the display timings specified364 * or a fixed mode. Anything else is rather bogus.365 */366 WARN_ON(panel->desc->num_timings && panel->desc->num_modes);367 if (num == 0)368 num = panel_edp_get_display_modes(panel, connector);369 370 connector->display_info.bpc = panel->desc->bpc;371 connector->display_info.width_mm = panel->desc->size.width;372 connector->display_info.height_mm = panel->desc->size.height;373 374 return num;375}376 377static void panel_edp_wait(ktime_t start_ktime, unsigned int min_ms)378{379 ktime_t now_ktime, min_ktime;380 381 if (!min_ms)382 return;383 384 min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms));385 now_ktime = ktime_get_boottime();386 387 if (ktime_before(now_ktime, min_ktime))388 msleep(ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1);389}390 391static int panel_edp_disable(struct drm_panel *panel)392{393 struct panel_edp *p = to_panel_edp(panel);394 395 if (p->desc->delay.disable)396 msleep(p->desc->delay.disable);397 398 return 0;399}400 401static int panel_edp_suspend(struct device *dev)402{403 struct panel_edp *p = dev_get_drvdata(dev);404 405 drm_dp_dpcd_set_powered(p->aux, false);406 gpiod_set_value_cansleep(p->enable_gpio, 0);407 regulator_disable(p->supply);408 p->unprepared_time = ktime_get_boottime();409 410 return 0;411}412 413static int panel_edp_unprepare(struct drm_panel *panel)414{415 int ret;416 417 ret = pm_runtime_put_sync_suspend(panel->dev);418 if (ret < 0)419 return ret;420 421 return 0;422}423 424static int panel_edp_get_hpd_gpio(struct device *dev, struct panel_edp *p)425{426 p->hpd_gpio = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN);427 if (IS_ERR(p->hpd_gpio))428 return dev_err_probe(dev, PTR_ERR(p->hpd_gpio),429 "failed to get 'hpd' GPIO\n");430 431 return 0;432}433 434static bool panel_edp_can_read_hpd(struct panel_edp *p)435{436 return !p->no_hpd && (p->hpd_gpio || (p->aux && p->aux->wait_hpd_asserted));437}438 439static int panel_edp_prepare_once(struct panel_edp *p)440{441 struct device *dev = p->base.dev;442 unsigned int delay;443 int err;444 int hpd_asserted;445 unsigned long hpd_wait_us;446 447 panel_edp_wait(p->unprepared_time, p->desc->delay.unprepare);448 449 err = regulator_enable(p->supply);450 if (err < 0) {451 dev_err(dev, "failed to enable supply: %d\n", err);452 return err;453 }454 455 gpiod_set_value_cansleep(p->enable_gpio, 1);456 drm_dp_dpcd_set_powered(p->aux, true);457 458 p->powered_on_time = ktime_get_boottime();459 460 delay = p->desc->delay.hpd_reliable;461 if (p->no_hpd)462 delay = max(delay, p->desc->delay.hpd_absent);463 if (delay)464 msleep(delay);465 466 if (panel_edp_can_read_hpd(p)) {467 if (p->desc->delay.hpd_absent)468 hpd_wait_us = p->desc->delay.hpd_absent * 1000UL;469 else470 hpd_wait_us = 2000000;471 472 if (p->hpd_gpio) {473 err = readx_poll_timeout(gpiod_get_value_cansleep,474 p->hpd_gpio, hpd_asserted,475 hpd_asserted, 1000, hpd_wait_us);476 if (hpd_asserted < 0)477 err = hpd_asserted;478 } else {479 err = p->aux->wait_hpd_asserted(p->aux, hpd_wait_us);480 }481 482 if (err) {483 if (err != -ETIMEDOUT)484 dev_err(dev,485 "error waiting for hpd GPIO: %d\n", err);486 goto error;487 }488 }489 490 p->prepared_time = ktime_get_boottime();491 492 return 0;493 494error:495 drm_dp_dpcd_set_powered(p->aux, false);496 gpiod_set_value_cansleep(p->enable_gpio, 0);497 regulator_disable(p->supply);498 p->unprepared_time = ktime_get_boottime();499 500 return err;501}502 503/*504 * Some panels simply don't always come up and need to be power cycled to505 * work properly. We'll allow for a handful of retries.506 */507#define MAX_PANEL_PREPARE_TRIES 5508 509static int panel_edp_resume(struct device *dev)510{511 struct panel_edp *p = dev_get_drvdata(dev);512 int ret;513 int try;514 515 for (try = 0; try < MAX_PANEL_PREPARE_TRIES; try++) {516 ret = panel_edp_prepare_once(p);517 if (ret != -ETIMEDOUT)518 break;519 }520 521 if (ret == -ETIMEDOUT)522 dev_err(dev, "Prepare timeout after %d tries\n", try);523 else if (try)524 dev_warn(dev, "Prepare needed %d retries\n", try);525 526 return ret;527}528 529static int panel_edp_prepare(struct drm_panel *panel)530{531 int ret;532 533 ret = pm_runtime_get_sync(panel->dev);534 if (ret < 0) {535 pm_runtime_put_autosuspend(panel->dev);536 return ret;537 }538 539 return 0;540}541 542static int panel_edp_enable(struct drm_panel *panel)543{544 struct panel_edp *p = to_panel_edp(panel);545 unsigned int delay;546 547 delay = p->desc->delay.enable;548 549 /*550 * If there is a "prepare_to_enable" delay then that's supposed to be551 * the delay from HPD going high until we can turn the backlight on.552 * However, we can only count this if HPD is readable by the panel553 * driver.554 *555 * If we aren't handling the HPD pin ourselves then the best we556 * can do is assume that HPD went high immediately before we were557 * called (and link training took zero time). Note that "no-hpd"558 * actually counts as handling HPD ourselves since we're doing the559 * worst case delay (in prepare) ourselves.560 *561 * NOTE: if we ever end up in this "if" statement then we're562 * guaranteed that the panel_edp_wait() call below will do no delay.563 * It already handles that case, though, so we don't need any special564 * code for it.565 */566 if (p->desc->delay.prepare_to_enable &&567 !panel_edp_can_read_hpd(p) && !p->no_hpd)568 delay = max(delay, p->desc->delay.prepare_to_enable);569 570 if (delay)571 msleep(delay);572 573 panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable);574 575 panel_edp_wait(p->powered_on_time, p->desc->delay.powered_on_to_enable);576 577 return 0;578}579 580static int panel_edp_get_modes(struct drm_panel *panel,581 struct drm_connector *connector)582{583 struct panel_edp *p = to_panel_edp(panel);584 int num = 0;585 bool has_hard_coded_modes = p->desc->num_timings || p->desc->num_modes;586 bool has_override_edid_mode = p->detected_panel &&587 p->detected_panel != ERR_PTR(-EINVAL) &&588 p->detected_panel->override_edid_mode;589 590 /* probe EDID if a DDC bus is available */591 if (p->ddc) {592 pm_runtime_get_sync(panel->dev);593 594 if (!p->drm_edid)595 p->drm_edid = drm_edid_read_ddc(connector, p->ddc);596 597 drm_edid_connector_update(connector, p->drm_edid);598 599 /*600 * If both edid and hard-coded modes exists, skip edid modes to601 * avoid multiple preferred modes.602 */603 if (p->drm_edid && !has_hard_coded_modes) {604 if (has_override_edid_mode) {605 /*606 * override_edid_mode is specified. Use607 * override_edid_mode instead of from edid.608 */609 num += panel_edp_override_edid_mode(p, connector,610 p->detected_panel->override_edid_mode);611 } else {612 num += drm_edid_connector_add_modes(connector);613 }614 }615 616 pm_runtime_mark_last_busy(panel->dev);617 pm_runtime_put_autosuspend(panel->dev);618 }619 620 if (has_hard_coded_modes)621 num += panel_edp_get_non_edid_modes(p, connector);622 else if (!num)623 dev_warn(p->base.dev, "No display modes\n");624 625 /*626 * TODO: Remove once all drm drivers call627 * drm_connector_set_orientation_from_panel()628 */629 drm_connector_set_panel_orientation(connector, p->orientation);630 631 return num;632}633 634static int panel_edp_get_timings(struct drm_panel *panel,635 unsigned int num_timings,636 struct display_timing *timings)637{638 struct panel_edp *p = to_panel_edp(panel);639 unsigned int i;640 641 if (p->desc->num_timings < num_timings)642 num_timings = p->desc->num_timings;643 644 if (timings)645 for (i = 0; i < num_timings; i++)646 timings[i] = p->desc->timings[i];647 648 return p->desc->num_timings;649}650 651static enum drm_panel_orientation panel_edp_get_orientation(struct drm_panel *panel)652{653 struct panel_edp *p = to_panel_edp(panel);654 655 return p->orientation;656}657 658static int detected_panel_show(struct seq_file *s, void *data)659{660 struct drm_panel *panel = s->private;661 struct panel_edp *p = to_panel_edp(panel);662 663 if (IS_ERR(p->detected_panel))664 seq_puts(s, "UNKNOWN\n");665 else if (!p->detected_panel)666 seq_puts(s, "HARDCODED\n");667 else668 seq_printf(s, "%s\n", p->detected_panel->ident.name);669 670 return 0;671}672 673DEFINE_SHOW_ATTRIBUTE(detected_panel);674 675static void panel_edp_debugfs_init(struct drm_panel *panel, struct dentry *root)676{677 debugfs_create_file("detected_panel", 0600, root, panel, &detected_panel_fops);678}679 680static const struct drm_panel_funcs panel_edp_funcs = {681 .disable = panel_edp_disable,682 .unprepare = panel_edp_unprepare,683 .prepare = panel_edp_prepare,684 .enable = panel_edp_enable,685 .get_modes = panel_edp_get_modes,686 .get_orientation = panel_edp_get_orientation,687 .get_timings = panel_edp_get_timings,688 .debugfs_init = panel_edp_debugfs_init,689};690 691#define PANEL_EDP_BOUNDS_CHECK(to_check, bounds, field) \692 (to_check->field.typ >= bounds->field.min && \693 to_check->field.typ <= bounds->field.max)694static void panel_edp_parse_panel_timing_node(struct device *dev,695 struct panel_edp *panel,696 const struct display_timing *ot)697{698 const struct panel_desc *desc = panel->desc;699 struct videomode vm;700 unsigned int i;701 702 if (WARN_ON(desc->num_modes)) {703 dev_err(dev, "Reject override mode: panel has a fixed mode\n");704 return;705 }706 if (WARN_ON(!desc->num_timings)) {707 dev_err(dev, "Reject override mode: no timings specified\n");708 return;709 }710 711 for (i = 0; i < panel->desc->num_timings; i++) {712 const struct display_timing *dt = &panel->desc->timings[i];713 714 if (!PANEL_EDP_BOUNDS_CHECK(ot, dt, hactive) ||715 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hfront_porch) ||716 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hback_porch) ||717 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hsync_len) ||718 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vactive) ||719 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vfront_porch) ||720 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vback_porch) ||721 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vsync_len))722 continue;723 724 if (ot->flags != dt->flags)725 continue;726 727 videomode_from_timing(ot, &vm);728 drm_display_mode_from_videomode(&vm, &panel->override_mode);729 panel->override_mode.type |= DRM_MODE_TYPE_DRIVER |730 DRM_MODE_TYPE_PREFERRED;731 break;732 }733 734 if (WARN_ON(!panel->override_mode.type))735 dev_err(dev, "Reject override mode: No display_timing found\n");736}737 738static const struct edp_panel_entry *find_edp_panel(u32 panel_id, const struct drm_edid *edid);739 740static void panel_edp_set_conservative_timings(struct panel_edp *panel, struct panel_desc *desc)741{742 /*743 * It's highly likely that the panel will work if we use very744 * conservative timings, so let's do that.745 *746 * Nearly all panels have a "unprepare" delay of 500 ms though747 * there are a few with 1000. Let's stick 2000 in just to be748 * super conservative.749 *750 * An "enable" delay of 80 ms seems the most common, but we'll751 * throw in 200 ms to be safe.752 */753 desc->delay.unprepare = 2000;754 desc->delay.enable = 200;755 756 panel->detected_panel = ERR_PTR(-EINVAL);757}758 759static int generic_edp_panel_probe(struct device *dev, struct panel_edp *panel)760{761 struct panel_desc *desc;762 const struct drm_edid *base_block;763 u32 panel_id;764 char vend[4];765 u16 product_id;766 u32 reliable_ms = 0;767 u32 absent_ms = 0;768 int ret;769 770 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);771 if (!desc)772 return -ENOMEM;773 panel->desc = desc;774 775 /*776 * Read the dts properties for the initial probe. These are used by777 * the runtime resume code which will get called by the778 * pm_runtime_get_sync() call below.779 */780 of_property_read_u32(dev->of_node, "hpd-reliable-delay-ms", &reliable_ms);781 desc->delay.hpd_reliable = reliable_ms;782 of_property_read_u32(dev->of_node, "hpd-absent-delay-ms", &absent_ms);783 desc->delay.hpd_absent = absent_ms;784 785 /* Power the panel on so we can read the EDID */786 ret = pm_runtime_get_sync(dev);787 if (ret < 0) {788 dev_err(dev,789 "Couldn't power on panel to ID it; using conservative timings: %d\n",790 ret);791 panel_edp_set_conservative_timings(panel, desc);792 goto exit;793 }794 795 base_block = drm_edid_read_base_block(panel->ddc);796 if (base_block) {797 panel_id = drm_edid_get_panel_id(base_block);798 } else {799 dev_err(dev, "Couldn't read EDID for ID; using conservative timings\n");800 panel_edp_set_conservative_timings(panel, desc);801 goto exit;802 }803 drm_edid_decode_panel_id(panel_id, vend, &product_id);804 805 panel->detected_panel = find_edp_panel(panel_id, base_block);806 807 drm_edid_free(base_block);808 809 /*810 * We're using non-optimized timings and want it really obvious that811 * someone needs to add an entry to the table, so we'll do a WARN_ON812 * splat.813 */814 if (WARN_ON(!panel->detected_panel)) {815 dev_warn(dev,816 "Unknown panel %s %#06x, using conservative timings\n",817 vend, product_id);818 panel_edp_set_conservative_timings(panel, desc);819 } else {820 dev_info(dev, "Detected %s %s (%#06x)\n",821 vend, panel->detected_panel->ident.name, product_id);822 823 /* Update the delay; everything else comes from EDID */824 desc->delay = *panel->detected_panel->delay;825 }826 827exit:828 pm_runtime_mark_last_busy(dev);829 pm_runtime_put_autosuspend(dev);830 831 return 0;832}833 834static int panel_edp_probe(struct device *dev, const struct panel_desc *desc,835 struct drm_dp_aux *aux)836{837 struct panel_edp *panel;838 struct display_timing dt;839 struct device_node *ddc;840 int err;841 842 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);843 if (!panel)844 return -ENOMEM;845 846 panel->prepared_time = 0;847 panel->desc = desc;848 panel->aux = aux;849 850 panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd");851 if (!panel->no_hpd) {852 err = panel_edp_get_hpd_gpio(dev, panel);853 if (err)854 return err;855 }856 857 panel->supply = devm_regulator_get(dev, "power");858 if (IS_ERR(panel->supply))859 return PTR_ERR(panel->supply);860 861 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable",862 GPIOD_OUT_LOW);863 if (IS_ERR(panel->enable_gpio))864 return dev_err_probe(dev, PTR_ERR(panel->enable_gpio),865 "failed to request GPIO\n");866 867 err = of_drm_get_panel_orientation(dev->of_node, &panel->orientation);868 if (err) {869 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);870 return err;871 }872 873 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);874 if (ddc) {875 panel->ddc = of_find_i2c_adapter_by_node(ddc);876 of_node_put(ddc);877 878 if (!panel->ddc)879 return -EPROBE_DEFER;880 } else if (aux) {881 panel->ddc = &aux->ddc;882 }883 884 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt))885 panel_edp_parse_panel_timing_node(dev, panel, &dt);886 887 dev_set_drvdata(dev, panel);888 889 drm_panel_init(&panel->base, dev, &panel_edp_funcs, DRM_MODE_CONNECTOR_eDP);890 891 err = drm_panel_of_backlight(&panel->base);892 if (err)893 goto err_finished_ddc_init;894 895 /*896 * We use runtime PM for prepare / unprepare since those power the panel897 * on and off and those can be very slow operations. This is important898 * to optimize powering the panel on briefly to read the EDID before899 * fully enabling the panel.900 */901 pm_runtime_enable(dev);902 pm_runtime_set_autosuspend_delay(dev, 1000);903 pm_runtime_use_autosuspend(dev);904 905 if (of_device_is_compatible(dev->of_node, "edp-panel")) {906 err = generic_edp_panel_probe(dev, panel);907 if (err) {908 dev_err_probe(dev, err,909 "Couldn't detect panel nor find a fallback\n");910 goto err_finished_pm_runtime;911 }912 /* generic_edp_panel_probe() replaces desc in the panel */913 desc = panel->desc;914 } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) {915 dev_warn(dev, "Expected bpc in {6,8,10} but got: %u\n", desc->bpc);916 }917 918 if (!panel->base.backlight && panel->aux) {919 pm_runtime_get_sync(dev);920 err = drm_panel_dp_aux_backlight(&panel->base, panel->aux);921 pm_runtime_mark_last_busy(dev);922 pm_runtime_put_autosuspend(dev);923 924 /*925 * Warn if we get an error, but don't consider it fatal. Having926 * a panel where we can't control the backlight is better than927 * no panel.928 */929 if (err)930 dev_warn(dev, "failed to register dp aux backlight: %d\n", err);931 }932 933 drm_panel_add(&panel->base);934 935 return 0;936 937err_finished_pm_runtime:938 pm_runtime_dont_use_autosuspend(dev);939 pm_runtime_disable(dev);940err_finished_ddc_init:941 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc))942 put_device(&panel->ddc->dev);943 944 return err;945}946 947static void panel_edp_shutdown(struct device *dev)948{949 struct panel_edp *panel = dev_get_drvdata(dev);950 951 /*952 * NOTE: the following two calls don't really belong here. It is the953 * responsibility of a correctly written DRM modeset driver to call954 * drm_atomic_helper_shutdown() at shutdown time and that should955 * cause the panel to be disabled / unprepared if needed. For now,956 * however, we'll keep these calls due to the sheer number of957 * different DRM modeset drivers used with panel-edp. Once we've958 * confirmed that all DRM modeset drivers using this panel properly959 * call drm_atomic_helper_shutdown() we can simply delete the two960 * calls below.961 *962 * TO BE EXPLICIT: THE CALLS BELOW SHOULDN'T BE COPIED TO ANY NEW963 * PANEL DRIVERS.964 *965 * FIXME: If we're still haven't figured out if all DRM modeset966 * drivers properly call drm_atomic_helper_shutdown() but we _have_967 * managed to make sure that DRM modeset drivers get their shutdown()968 * callback before the panel's shutdown() callback (perhaps using969 * device link), we could add a WARN_ON here to help move forward.970 */971 if (panel->base.enabled)972 drm_panel_disable(&panel->base);973 if (panel->base.prepared)974 drm_panel_unprepare(&panel->base);975}976 977static void panel_edp_remove(struct device *dev)978{979 struct panel_edp *panel = dev_get_drvdata(dev);980 981 drm_panel_remove(&panel->base);982 panel_edp_shutdown(dev);983 984 pm_runtime_dont_use_autosuspend(dev);985 pm_runtime_disable(dev);986 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc))987 put_device(&panel->ddc->dev);988 989 drm_edid_free(panel->drm_edid);990 panel->drm_edid = NULL;991}992 993static const struct display_timing auo_b101ean01_timing = {994 .pixelclock = { 65300000, 72500000, 75000000 },995 .hactive = { 1280, 1280, 1280 },996 .hfront_porch = { 18, 119, 119 },997 .hback_porch = { 21, 21, 21 },998 .hsync_len = { 32, 32, 32 },999 .vactive = { 800, 800, 800 },1000 .vfront_porch = { 4, 4, 4 },1001 .vback_porch = { 8, 8, 8 },1002 .vsync_len = { 18, 20, 20 },1003};1004 1005static const struct panel_desc auo_b101ean01 = {1006 .timings = &auo_b101ean01_timing,1007 .num_timings = 1,1008 .bpc = 6,1009 .size = {1010 .width = 217,1011 .height = 136,1012 },1013};1014 1015static const struct drm_display_mode auo_b116xa3_mode = {1016 .clock = 70589,1017 .hdisplay = 1366,1018 .hsync_start = 1366 + 40,1019 .hsync_end = 1366 + 40 + 40,1020 .htotal = 1366 + 40 + 40 + 32,1021 .vdisplay = 768,1022 .vsync_start = 768 + 10,1023 .vsync_end = 768 + 10 + 12,1024 .vtotal = 768 + 10 + 12 + 6,1025 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,1026};1027 1028static const struct drm_display_mode auo_b116xak01_mode = {1029 .clock = 69300,1030 .hdisplay = 1366,1031 .hsync_start = 1366 + 48,1032 .hsync_end = 1366 + 48 + 32,1033 .htotal = 1366 + 48 + 32 + 10,1034 .vdisplay = 768,1035 .vsync_start = 768 + 4,1036 .vsync_end = 768 + 4 + 6,1037 .vtotal = 768 + 4 + 6 + 15,1038 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,1039};1040 1041static const struct panel_desc auo_b116xak01 = {1042 .modes = &auo_b116xak01_mode,1043 .num_modes = 1,1044 .bpc = 6,1045 .size = {1046 .width = 256,1047 .height = 144,1048 },1049 .delay = {1050 .hpd_absent = 200,1051 .unprepare = 500,1052 .enable = 50,1053 },1054};1055 1056static const struct drm_display_mode auo_b133htn01_mode = {1057 .clock = 150660,1058 .hdisplay = 1920,1059 .hsync_start = 1920 + 172,1060 .hsync_end = 1920 + 172 + 80,1061 .htotal = 1920 + 172 + 80 + 60,1062 .vdisplay = 1080,1063 .vsync_start = 1080 + 25,1064 .vsync_end = 1080 + 25 + 10,1065 .vtotal = 1080 + 25 + 10 + 10,1066};1067 1068static const struct panel_desc auo_b133htn01 = {1069 .modes = &auo_b133htn01_mode,1070 .num_modes = 1,1071 .bpc = 6,1072 .size = {1073 .width = 293,1074 .height = 165,1075 },1076 .delay = {1077 .hpd_reliable = 105,1078 .enable = 20,1079 .unprepare = 50,1080 },1081};1082 1083static const struct drm_display_mode auo_b133xtn01_mode = {1084 .clock = 69500,1085 .hdisplay = 1366,1086 .hsync_start = 1366 + 48,1087 .hsync_end = 1366 + 48 + 32,1088 .htotal = 1366 + 48 + 32 + 20,1089 .vdisplay = 768,1090 .vsync_start = 768 + 3,1091 .vsync_end = 768 + 3 + 6,1092 .vtotal = 768 + 3 + 6 + 13,1093};1094 1095static const struct panel_desc auo_b133xtn01 = {1096 .modes = &auo_b133xtn01_mode,1097 .num_modes = 1,1098 .bpc = 6,1099 .size = {1100 .width = 293,1101 .height = 165,1102 },1103};1104 1105static const struct drm_display_mode boe_nv101wxmn51_modes[] = {1106 {1107 .clock = 71900,1108 .hdisplay = 1280,1109 .hsync_start = 1280 + 48,1110 .hsync_end = 1280 + 48 + 32,1111 .htotal = 1280 + 48 + 32 + 80,1112 .vdisplay = 800,1113 .vsync_start = 800 + 3,1114 .vsync_end = 800 + 3 + 5,1115 .vtotal = 800 + 3 + 5 + 24,1116 },1117 {1118 .clock = 57500,1119 .hdisplay = 1280,1120 .hsync_start = 1280 + 48,1121 .hsync_end = 1280 + 48 + 32,1122 .htotal = 1280 + 48 + 32 + 80,1123 .vdisplay = 800,1124 .vsync_start = 800 + 3,1125 .vsync_end = 800 + 3 + 5,1126 .vtotal = 800 + 3 + 5 + 24,1127 },1128};1129 1130static const struct panel_desc boe_nv101wxmn51 = {1131 .modes = boe_nv101wxmn51_modes,1132 .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes),1133 .bpc = 8,1134 .size = {1135 .width = 217,1136 .height = 136,1137 },1138 .delay = {1139 /* TODO: should be hpd-absent and no-hpd should be set? */1140 .hpd_reliable = 210,1141 .enable = 50,1142 .unprepare = 160,1143 },1144};1145 1146static const struct drm_display_mode boe_nv110wtm_n61_modes[] = {1147 {1148 .clock = 207800,1149 .hdisplay = 2160,1150 .hsync_start = 2160 + 48,1151 .hsync_end = 2160 + 48 + 32,1152 .htotal = 2160 + 48 + 32 + 100,1153 .vdisplay = 1440,1154 .vsync_start = 1440 + 3,1155 .vsync_end = 1440 + 3 + 6,1156 .vtotal = 1440 + 3 + 6 + 31,1157 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,1158 },1159 {1160 .clock = 138500,1161 .hdisplay = 2160,1162 .hsync_start = 2160 + 48,1163 .hsync_end = 2160 + 48 + 32,1164 .htotal = 2160 + 48 + 32 + 100,1165 .vdisplay = 1440,1166 .vsync_start = 1440 + 3,1167 .vsync_end = 1440 + 3 + 6,1168 .vtotal = 1440 + 3 + 6 + 31,1169 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,1170 },1171};1172 1173static const struct panel_desc boe_nv110wtm_n61 = {1174 .modes = boe_nv110wtm_n61_modes,1175 .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes),1176 .bpc = 8,1177 .size = {1178 .width = 233,1179 .height = 155,1180 },1181 .delay = {1182 .hpd_absent = 200,1183 .prepare_to_enable = 80,1184 .enable = 50,1185 .unprepare = 500,1186 },1187};1188 1189/* Also used for boe_nv133fhm_n62 */1190static const struct drm_display_mode boe_nv133fhm_n61_modes = {1191 .clock = 147840,1192 .hdisplay = 1920,1193 .hsync_start = 1920 + 48,1194 .hsync_end = 1920 + 48 + 32,1195 .htotal = 1920 + 48 + 32 + 200,1196 .vdisplay = 1080,1197 .vsync_start = 1080 + 3,1198 .vsync_end = 1080 + 3 + 6,1199 .vtotal = 1080 + 3 + 6 + 31,1200 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,1201};1202 1203/* Also used for boe_nv133fhm_n62 */1204static const struct panel_desc boe_nv133fhm_n61 = {1205 .modes = &boe_nv133fhm_n61_modes,1206 .num_modes = 1,1207 .bpc = 6,1208 .size = {1209 .width = 294,1210 .height = 165,1211 },1212 .delay = {1213 /*1214 * When power is first given to the panel there's a short1215 * spike on the HPD line. It was explained that this spike1216 * was until the TCON data download was complete. On1217 * one system this was measured at 8 ms. We'll put 15 ms1218 * in the prepare delay just to be safe. That means:1219 * - If HPD isn't hooked up you still have 200 ms delay.1220 * - If HPD is hooked up we won't try to look at it for the1221 * first 15 ms.1222 */1223 .hpd_reliable = 15,1224 .hpd_absent = 200,1225 1226 .unprepare = 500,1227 },1228};1229 1230static const struct drm_display_mode boe_nv140fhmn49_modes[] = {1231 {1232 .clock = 148500,1233 .hdisplay = 1920,1234 .hsync_start = 1920 + 48,1235 .hsync_end = 1920 + 48 + 32,1236 .htotal = 2200,1237 .vdisplay = 1080,1238 .vsync_start = 1080 + 3,1239 .vsync_end = 1080 + 3 + 5,1240 .vtotal = 1125,1241 },1242};1243 1244static const struct panel_desc boe_nv140fhmn49 = {1245 .modes = boe_nv140fhmn49_modes,1246 .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes),1247 .bpc = 6,1248 .size = {1249 .width = 309,1250 .height = 174,1251 },1252 .delay = {1253 /* TODO: should be hpd-absent and no-hpd should be set? */1254 .hpd_reliable = 210,1255 .enable = 50,1256 .unprepare = 160,1257 },1258};1259 1260static const struct drm_display_mode innolux_n116bca_ea1_mode = {1261 .clock = 76420,1262 .hdisplay = 1366,1263 .hsync_start = 1366 + 136,1264 .hsync_end = 1366 + 136 + 30,1265 .htotal = 1366 + 136 + 30 + 60,1266 .vdisplay = 768,1267 .vsync_start = 768 + 8,1268 .vsync_end = 768 + 8 + 12,1269 .vtotal = 768 + 8 + 12 + 12,1270 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,1271};1272 1273static const struct panel_desc innolux_n116bca_ea1 = {1274 .modes = &innolux_n116bca_ea1_mode,1275 .num_modes = 1,1276 .bpc = 6,1277 .size = {1278 .width = 256,1279 .height = 144,1280 },1281 .delay = {1282 .hpd_absent = 200,1283 .enable = 80,1284 .disable = 50,1285 .unprepare = 500,1286 },1287};1288 1289/*1290 * Datasheet specifies that at 60 Hz refresh rate:1291 * - total horizontal time: { 1506, 1592, 1716 }1292 * - total vertical time: { 788, 800, 868 }1293 *1294 * ...but doesn't go into exactly how that should be split into a front1295 * porch, back porch, or sync length. For now we'll leave a single setting1296 * here which allows a bit of tweaking of the pixel clock at the expense of1297 * refresh rate.1298 */1299static const struct display_timing innolux_n116bge_timing = {1300 .pixelclock = { 72600000, 76420000, 80240000 },1301 .hactive = { 1366, 1366, 1366 },1302 .hfront_porch = { 136, 136, 136 },1303 .hback_porch = { 60, 60, 60 },1304 .hsync_len = { 30, 30, 30 },1305 .vactive = { 768, 768, 768 },1306 .vfront_porch = { 8, 8, 8 },1307 .vback_porch = { 12, 12, 12 },1308 .vsync_len = { 12, 12, 12 },1309 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,1310};1311 1312static const struct panel_desc innolux_n116bge = {1313 .timings = &innolux_n116bge_timing,1314 .num_timings = 1,1315 .bpc = 6,1316 .size = {1317 .width = 256,1318 .height = 144,1319 },1320};1321 1322static const struct drm_display_mode innolux_n125hce_gn1_mode = {1323 .clock = 162000,1324 .hdisplay = 1920,1325 .hsync_start = 1920 + 40,1326 .hsync_end = 1920 + 40 + 40,1327 .htotal = 1920 + 40 + 40 + 80,1328 .vdisplay = 1080,1329 .vsync_start = 1080 + 4,1330 .vsync_end = 1080 + 4 + 4,1331 .vtotal = 1080 + 4 + 4 + 24,1332};1333 1334static const struct panel_desc innolux_n125hce_gn1 = {1335 .modes = &innolux_n125hce_gn1_mode,1336 .num_modes = 1,1337 .bpc = 8,1338 .size = {1339 .width = 276,1340 .height = 155,1341 },1342};1343 1344static const struct drm_display_mode innolux_p120zdg_bf1_mode = {1345 .clock = 206016,1346 .hdisplay = 2160,1347 .hsync_start = 2160 + 48,1348 .hsync_end = 2160 + 48 + 32,1349 .htotal = 2160 + 48 + 32 + 80,1350 .vdisplay = 1440,1351 .vsync_start = 1440 + 3,1352 .vsync_end = 1440 + 3 + 10,1353 .vtotal = 1440 + 3 + 10 + 27,1354 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,1355};1356 1357static const struct panel_desc innolux_p120zdg_bf1 = {1358 .modes = &innolux_p120zdg_bf1_mode,1359 .num_modes = 1,1360 .bpc = 8,1361 .size = {1362 .width = 254,1363 .height = 169,1364 },1365 .delay = {1366 .hpd_absent = 200,1367 .unprepare = 500,1368 },1369};1370 1371static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = {1372 .clock = 81000,1373 .hdisplay = 1366,1374 .hsync_start = 1366 + 40,1375 .hsync_end = 1366 + 40 + 32,1376 .htotal = 1366 + 40 + 32 + 62,1377 .vdisplay = 768,1378 .vsync_start = 768 + 5,1379 .vsync_end = 768 + 5 + 5,1380 .vtotal = 768 + 5 + 5 + 122,1381 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,1382};1383 1384static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = {1385 .modes = &kingdisplay_kd116n21_30nv_a010_mode,1386 .num_modes = 1,1387 .bpc = 6,1388 .size = {1389 .width = 256,1390 .height = 144,1391 },1392 .delay = {1393 .hpd_absent = 200,1394 },1395};1396 1397static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {1398 .clock = 200000,1399 .hdisplay = 1536,1400 .hsync_start = 1536 + 12,1401 .hsync_end = 1536 + 12 + 16,1402 .htotal = 1536 + 12 + 16 + 48,1403 .vdisplay = 2048,1404 .vsync_start = 2048 + 8,1405 .vsync_end = 2048 + 8 + 4,1406 .vtotal = 2048 + 8 + 4 + 8,1407 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,1408};1409 1410static const struct panel_desc lg_lp079qx1_sp0v = {1411 .modes = &lg_lp079qx1_sp0v_mode,1412 .num_modes = 1,1413 .size = {1414 .width = 129,1415 .height = 171,1416 },1417};1418 1419static const struct drm_display_mode lg_lp097qx1_spa1_mode = {1420 .clock = 205210,1421 .hdisplay = 2048,1422 .hsync_start = 2048 + 150,1423 .hsync_end = 2048 + 150 + 5,1424 .htotal = 2048 + 150 + 5 + 5,1425 .vdisplay = 1536,1426 .vsync_start = 1536 + 3,1427 .vsync_end = 1536 + 3 + 1,1428 .vtotal = 1536 + 3 + 1 + 9,1429};1430 1431static const struct panel_desc lg_lp097qx1_spa1 = {1432 .modes = &lg_lp097qx1_spa1_mode,1433 .num_modes = 1,1434 .size = {1435 .width = 208,1436 .height = 147,1437 },1438};1439 1440static const struct drm_display_mode lg_lp120up1_mode = {1441 .clock = 162300,1442 .hdisplay = 1920,1443 .hsync_start = 1920 + 40,1444 .hsync_end = 1920 + 40 + 40,1445 .htotal = 1920 + 40 + 40 + 80,1446 .vdisplay = 1280,1447 .vsync_start = 1280 + 4,1448 .vsync_end = 1280 + 4 + 4,1449 .vtotal = 1280 + 4 + 4 + 12,1450};1451 1452static const struct panel_desc lg_lp120up1 = {1453 .modes = &lg_lp120up1_mode,1454 .num_modes = 1,1455 .bpc = 8,1456 .size = {1457 .width = 267,1458 .height = 183,1459 },1460};1461 1462static const struct drm_display_mode lg_lp129qe_mode = {1463 .clock = 285250,1464 .hdisplay = 2560,1465 .hsync_start = 2560 + 48,1466 .hsync_end = 2560 + 48 + 32,1467 .htotal = 2560 + 48 + 32 + 80,1468 .vdisplay = 1700,1469 .vsync_start = 1700 + 3,1470 .vsync_end = 1700 + 3 + 10,1471 .vtotal = 1700 + 3 + 10 + 36,1472};1473 1474static const struct panel_desc lg_lp129qe = {1475 .modes = &lg_lp129qe_mode,1476 .num_modes = 1,1477 .bpc = 8,1478 .size = {1479 .width = 272,1480 .height = 181,1481 },1482};1483 1484static const struct drm_display_mode neweast_wjfh116008a_modes[] = {1485 {1486 .clock = 138500,1487 .hdisplay = 1920,1488 .hsync_start = 1920 + 48,1489 .hsync_end = 1920 + 48 + 32,1490 .htotal = 1920 + 48 + 32 + 80,1491 .vdisplay = 1080,1492 .vsync_start = 1080 + 3,1493 .vsync_end = 1080 + 3 + 5,1494 .vtotal = 1080 + 3 + 5 + 23,1495 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,1496 }, {1497 .clock = 110920,1498 .hdisplay = 1920,1499 .hsync_start = 1920 + 48,1500 .hsync_end = 1920 + 48 + 32,1501 .htotal = 1920 + 48 + 32 + 80,1502 .vdisplay = 1080,1503 .vsync_start = 1080 + 3,1504 .vsync_end = 1080 + 3 + 5,1505 .vtotal = 1080 + 3 + 5 + 23,1506 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,1507 }1508};1509 1510static const struct panel_desc neweast_wjfh116008a = {1511 .modes = neweast_wjfh116008a_modes,1512 .num_modes = 2,1513 .bpc = 6,1514 .size = {1515 .width = 260,1516 .height = 150,1517 },1518 .delay = {1519 .hpd_reliable = 110,1520 .enable = 20,1521 .unprepare = 500,1522 },1523};1524 1525static const struct drm_display_mode samsung_lsn122dl01_c01_mode = {1526 .clock = 271560,1527 .hdisplay = 2560,1528 .hsync_start = 2560 + 48,1529 .hsync_end = 2560 + 48 + 32,1530 .htotal = 2560 + 48 + 32 + 80,1531 .vdisplay = 1600,1532 .vsync_start = 1600 + 2,1533 .vsync_end = 1600 + 2 + 5,1534 .vtotal = 1600 + 2 + 5 + 57,1535};1536 1537static const struct panel_desc samsung_lsn122dl01_c01 = {1538 .modes = &samsung_lsn122dl01_c01_mode,1539 .num_modes = 1,1540 .size = {1541 .width = 263,1542 .height = 164,1543 },1544};1545 1546static const struct drm_display_mode samsung_ltn140at29_301_mode = {1547 .clock = 76300,1548 .hdisplay = 1366,1549 .hsync_start = 1366 + 64,1550 .hsync_end = 1366 + 64 + 48,1551 .htotal = 1366 + 64 + 48 + 128,1552 .vdisplay = 768,1553 .vsync_start = 768 + 2,1554 .vsync_end = 768 + 2 + 5,1555 .vtotal = 768 + 2 + 5 + 17,1556};1557 1558static const struct panel_desc samsung_ltn140at29_301 = {1559 .modes = &samsung_ltn140at29_301_mode,1560 .num_modes = 1,1561 .bpc = 6,1562 .size = {1563 .width = 320,1564 .height = 187,1565 },1566};1567 1568static const struct drm_display_mode sharp_ld_d5116z01b_mode = {1569 .clock = 168480,1570 .hdisplay = 1920,1571 .hsync_start = 1920 + 48,1572 .hsync_end = 1920 + 48 + 32,1573 .htotal = 1920 + 48 + 32 + 80,1574 .vdisplay = 1280,1575 .vsync_start = 1280 + 3,1576 .vsync_end = 1280 + 3 + 10,1577 .vtotal = 1280 + 3 + 10 + 57,1578 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,1579};1580 1581static const struct panel_desc sharp_ld_d5116z01b = {1582 .modes = &sharp_ld_d5116z01b_mode,1583 .num_modes = 1,1584 .bpc = 8,1585 .size = {1586 .width = 260,1587 .height = 120,1588 },1589};1590 1591static const struct display_timing sharp_lq123p1jx31_timing = {1592 .pixelclock = { 252750000, 252750000, 266604720 },1593 .hactive = { 2400, 2400, 2400 },1594 .hfront_porch = { 48, 48, 48 },1595 .hback_porch = { 80, 80, 84 },1596 .hsync_len = { 32, 32, 32 },1597 .vactive = { 1600, 1600, 1600 },1598 .vfront_porch = { 3, 3, 3 },1599 .vback_porch = { 33, 33, 120 },1600 .vsync_len = { 10, 10, 10 },1601 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,1602};1603 1604static const struct panel_desc sharp_lq123p1jx31 = {1605 .timings = &sharp_lq123p1jx31_timing,1606 .num_timings = 1,1607 .bpc = 8,1608 .size = {1609 .width = 259,1610 .height = 173,1611 },1612 .delay = {1613 .hpd_reliable = 110,1614 .enable = 50,1615 .unprepare = 550,1616 },1617};1618 1619static const struct of_device_id platform_of_match[] = {1620 {1621 /* Must be first */1622 .compatible = "edp-panel",1623 },1624 /*1625 * Do not add panels to the list below unless they cannot be handled by1626 * the generic edp-panel compatible.1627 *1628 * The only two valid reasons are:1629 * - Because of the panel issues (e.g. broken EDID or broken1630 * identification).1631 * - Because the eDP drivers didn't wire up the AUX bus properly.1632 * NOTE that, though this is a marginally valid reason,1633 * some justification needs to be made for why the platform can't1634 * wire up the AUX bus properly.1635 *1636 * In all other cases the platform should use the aux-bus and declare1637 * the panel using the 'edp-panel' compatible as a device on the AUX1638 * bus.1639 */1640 {1641 .compatible = "auo,b101ean01",1642 .data = &auo_b101ean01,1643 }, {1644 .compatible = "auo,b116xa01",1645 .data = &auo_b116xak01,1646 }, {1647 .compatible = "auo,b133htn01",1648 .data = &auo_b133htn01,1649 }, {1650 .compatible = "auo,b133xtn01",1651 .data = &auo_b133xtn01,1652 }, {1653 .compatible = "boe,nv101wxmn51",1654 .data = &boe_nv101wxmn51,1655 }, {1656 .compatible = "boe,nv110wtm-n61",1657 .data = &boe_nv110wtm_n61,1658 }, {1659 .compatible = "boe,nv133fhm-n61",1660 .data = &boe_nv133fhm_n61,1661 }, {1662 .compatible = "boe,nv133fhm-n62",1663 .data = &boe_nv133fhm_n61,1664 }, {1665 .compatible = "boe,nv140fhmn49",1666 .data = &boe_nv140fhmn49,1667 }, {1668 .compatible = "innolux,n116bca-ea1",1669 .data = &innolux_n116bca_ea1,1670 }, {1671 .compatible = "innolux,n116bge",1672 .data = &innolux_n116bge,1673 }, {1674 .compatible = "innolux,n125hce-gn1",1675 .data = &innolux_n125hce_gn1,1676 }, {1677 .compatible = "innolux,p120zdg-bf1",1678 .data = &innolux_p120zdg_bf1,1679 }, {1680 .compatible = "kingdisplay,kd116n21-30nv-a010",1681 .data = &kingdisplay_kd116n21_30nv_a010,1682 }, {1683 .compatible = "lg,lp079qx1-sp0v",1684 .data = &lg_lp079qx1_sp0v,1685 }, {1686 .compatible = "lg,lp097qx1-spa1",1687 .data = &lg_lp097qx1_spa1,1688 }, {1689 .compatible = "lg,lp120up1",1690 .data = &lg_lp120up1,1691 }, {1692 .compatible = "lg,lp129qe",1693 .data = &lg_lp129qe,1694 }, {1695 .compatible = "neweast,wjfh116008a",1696 .data = &neweast_wjfh116008a,1697 }, {1698 .compatible = "samsung,lsn122dl01-c01",1699 .data = &samsung_lsn122dl01_c01,1700 }, {1701 .compatible = "samsung,ltn140at29-301",1702 .data = &samsung_ltn140at29_301,1703 }, {1704 .compatible = "sharp,ld-d5116z01b",1705 .data = &sharp_ld_d5116z01b,1706 }, {1707 .compatible = "sharp,lq123p1jx31",1708 .data = &sharp_lq123p1jx31,1709 }, {1710 /* sentinel */1711 }1712};1713MODULE_DEVICE_TABLE(of, platform_of_match);1714 1715static const struct panel_delay delay_200_500_p2e80 = {1716 .hpd_absent = 200,1717 .unprepare = 500,1718 .prepare_to_enable = 80,1719};1720 1721static const struct panel_delay delay_200_500_e50_p2e80 = {1722 .hpd_absent = 200,1723 .unprepare = 500,1724 .enable = 50,1725 .prepare_to_enable = 80,1726};1727 1728static const struct panel_delay delay_200_500_p2e100 = {1729 .hpd_absent = 200,1730 .unprepare = 500,1731 .prepare_to_enable = 100,1732};1733 1734static const struct panel_delay delay_200_500_e50 = {1735 .hpd_absent = 200,1736 .unprepare = 500,1737 .enable = 50,1738};1739 1740static const struct panel_delay delay_200_500_e50_p2e200 = {1741 .hpd_absent = 200,1742 .unprepare = 500,1743 .enable = 50,1744 .prepare_to_enable = 200,1745};1746 1747static const struct panel_delay delay_200_500_e80 = {1748 .hpd_absent = 200,1749 .unprepare = 500,1750 .enable = 80,1751};1752 1753static const struct panel_delay delay_200_500_e80_d50 = {1754 .hpd_absent = 200,1755 .unprepare = 500,1756 .enable = 80,1757 .disable = 50,1758};1759 1760static const struct panel_delay delay_80_500_e50 = {1761 .hpd_absent = 80,1762 .unprepare = 500,1763 .enable = 50,1764};1765 1766static const struct panel_delay delay_100_500_e200 = {1767 .hpd_absent = 100,1768 .unprepare = 500,1769 .enable = 200,1770};1771 1772static const struct panel_delay delay_200_500_e200 = {1773 .hpd_absent = 200,1774 .unprepare = 500,1775 .enable = 200,1776};1777 1778static const struct panel_delay delay_200_500_e200_d200 = {1779 .hpd_absent = 200,1780 .unprepare = 500,1781 .enable = 200,1782 .disable = 200,1783};1784 1785static const struct panel_delay delay_200_500_e200_d10 = {1786 .hpd_absent = 200,1787 .unprepare = 500,1788 .enable = 200,1789 .disable = 10,1790};1791 1792static const struct panel_delay delay_200_150_e200 = {1793 .hpd_absent = 200,1794 .unprepare = 150,1795 .enable = 200,1796};1797 1798static const struct panel_delay delay_200_500_e50_po2e200 = {1799 .hpd_absent = 200,1800 .unprepare = 500,1801 .enable = 50,1802 .powered_on_to_enable = 200,1803};1804 1805#define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \1806{ \1807 .ident = { \1808 .name = _name, \1809 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \1810 product_id), \1811 }, \1812 .delay = _delay \1813}1814 1815#define EDP_PANEL_ENTRY2(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name, _mode) \1816{ \1817 .ident = { \1818 .name = _name, \1819 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \1820 product_id), \1821 }, \1822 .delay = _delay, \1823 .override_edid_mode = _mode \1824}1825 1826/*1827 * This table is used to figure out power sequencing delays for panels that1828 * are detected by EDID. Entries here may point to entries in the1829 * platform_of_match table (if a panel is listed in both places).1830 *1831 * Sort first by vendor, then by product ID.1832 */1833static const struct edp_panel_entry edp_panels[] = {1834 EDP_PANEL_ENTRY('A', 'U', 'O', 0x105c, &delay_200_500_e50, "B116XTN01.0"),1835 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1062, &delay_200_500_e50, "B120XAN01.0"),1836 EDP_PANEL_ENTRY('A', 'U', 'O', 0x125c, &delay_200_500_e50, "Unknown"),1837 EDP_PANEL_ENTRY('A', 'U', 'O', 0x145c, &delay_200_500_e50, "B116XAB01.4"),1838 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1999, &delay_200_500_e50, "Unknown"),1839 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1e9b, &delay_200_500_e50, "B133UAN02.1"),1840 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1ea5, &delay_200_500_e50, "B116XAK01.6"),1841 EDP_PANEL_ENTRY('A', 'U', 'O', 0x203d, &delay_200_500_e50, "B140HTN02.0"),1842 EDP_PANEL_ENTRY('A', 'U', 'O', 0x208d, &delay_200_500_e50, "B140HTN02.1"),1843 EDP_PANEL_ENTRY('A', 'U', 'O', 0x235c, &delay_200_500_e50, "B116XTN02.3"),1844 EDP_PANEL_ENTRY('A', 'U', 'O', 0x239b, &delay_200_500_e50, "B116XAN06.1"),1845 EDP_PANEL_ENTRY('A', 'U', 'O', 0x255c, &delay_200_500_e50, "B116XTN02.5"),1846 EDP_PANEL_ENTRY('A', 'U', 'O', 0x403d, &delay_200_500_e50, "B140HAN04.0"),1847 EDP_PANEL_ENTRY('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAN04.0"),1848 EDP_PANEL_ENTRY2('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01.0",1849 &auo_b116xa3_mode),1850 EDP_PANEL_ENTRY('A', 'U', 'O', 0x435c, &delay_200_500_e50, "Unknown"),1851 EDP_PANEL_ENTRY('A', 'U', 'O', 0x582d, &delay_200_500_e50, "B133UAN01.0"),1852 EDP_PANEL_ENTRY('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1"),1853 EDP_PANEL_ENTRY('A', 'U', 'O', 0x635c, &delay_200_500_e50, "B116XAN06.3"),1854 EDP_PANEL_ENTRY('A', 'U', 'O', 0x639c, &delay_200_500_e50, "B140HAK02.7"),1855 EDP_PANEL_ENTRY('A', 'U', 'O', 0x723c, &delay_200_500_e50, "B140XTN07.2"),1856 EDP_PANEL_ENTRY('A', 'U', 'O', 0x73aa, &delay_200_500_e50, "B116XTN02.3"),1857 EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"),1858 EDP_PANEL_ENTRY('A', 'U', 'O', 0xa199, &delay_200_500_e50, "B116XAN06.1"),1859 EDP_PANEL_ENTRY('A', 'U', 'O', 0xc4b4, &delay_200_500_e50, "B116XAT04.1"),1860 EDP_PANEL_ENTRY('A', 'U', 'O', 0xd497, &delay_200_500_e50, "B120XAN01.0"),1861 EDP_PANEL_ENTRY('A', 'U', 'O', 0xf390, &delay_200_500_e50, "B140XTN07.7"),1862 1863 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0607, &delay_200_500_e200, "Unknown"),1864 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0608, &delay_200_500_e50, "NT116WHM-N11"),1865 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0609, &delay_200_500_e50_po2e200, "NT116WHM-N21 V4.1"),1866 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0623, &delay_200_500_e200, "NT116WHM-N21 V4.0"),1867 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0668, &delay_200_500_e200, "Unknown"),1868 EDP_PANEL_ENTRY('B', 'O', 'E', 0x068f, &delay_200_500_e200, "Unknown"),1869 EDP_PANEL_ENTRY('B', 'O', 'E', 0x06e5, &delay_200_500_e200, "Unknown"),1870 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0705, &delay_200_500_e200, "Unknown"),1871 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0715, &delay_200_150_e200, "NT116WHM-N21"),1872 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0717, &delay_200_500_e50_po2e200, "NV133FHM-N42"),1873 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0731, &delay_200_500_e80, "NT116WHM-N42"),1874 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0741, &delay_200_500_e200, "NT116WHM-N44"),1875 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0744, &delay_200_500_e200, "Unknown"),1876 EDP_PANEL_ENTRY('B', 'O', 'E', 0x074c, &delay_200_500_e200, "Unknown"),1877 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0751, &delay_200_500_e200, "Unknown"),1878 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0754, &delay_200_500_e50_po2e200, "NV116WHM-N45"),1879 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0771, &delay_200_500_e200, "Unknown"),1880 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T01"),1881 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0797, &delay_200_500_e200, "Unknown"),1882 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07a8, &delay_200_500_e50_po2e200, "NT116WHM-N21"),1883 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM-N61"),1884 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d3, &delay_200_500_e200, "Unknown"),1885 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f6, &delay_200_500_e200, "NT140FHM-N44"),1886 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f8, &delay_200_500_e200, "Unknown"),1887 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0813, &delay_200_500_e200, "Unknown"),1888 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0827, &delay_200_500_e50_p2e80, "NT140WHM-N44 V8.0"),1889 EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM-N62"),1890 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0843, &delay_200_500_e200, "Unknown"),1891 EDP_PANEL_ENTRY('B', 'O', 'E', 0x08b2, &delay_200_500_e200, "NT140WHM-N49"),1892 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0848, &delay_200_500_e200, "Unknown"),1893 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0849, &delay_200_500_e200, "Unknown"),1894 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09c3, &delay_200_500_e50, "NT116WHM-N21,836X2"),1895 EDP_PANEL_ENTRY('B', 'O', 'E', 0x094b, &delay_200_500_e50, "NT116WHM-N21"),1896 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0951, &delay_200_500_e80, "NV116WHM-N47"),1897 EDP_PANEL_ENTRY('B', 'O', 'E', 0x095f, &delay_200_500_e50, "NE135FBM-N41 v8.1"),1898 EDP_PANEL_ENTRY('B', 'O', 'E', 0x096e, &delay_200_500_e50_po2e200, "NV116WHM-T07 V8.0"),1899 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0979, &delay_200_500_e50, "NV116WHM-N49 V8.0"),1900 EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM-N61"),1901 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0993, &delay_200_500_e80, "NV116WHM-T14 V8.0"),1902 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ad, &delay_200_500_e80, "NV116WHM-N47"),1903 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ae, &delay_200_500_e200, "NT140FHM-N45"),1904 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09dd, &delay_200_500_e50, "NT116WHM-N21"),1905 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a1b, &delay_200_500_e50, "NV133WUM-N63"),1906 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a36, &delay_200_500_e200, "Unknown"),1907 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a3e, &delay_200_500_e80, "NV116WHM-N49"),1908 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45"),1909 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ac5, &delay_200_500_e50, "NV116WHM-N4C"),1910 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ae8, &delay_200_500_e50_p2e80, "NV140WUM-N41"),1911 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b34, &delay_200_500_e80, "NV122WUM-N41"),1912 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b43, &delay_200_500_e200, "NV140FHM-T09"),1913 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b56, &delay_200_500_e80, "NT140FHM-N47"),1914 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b66, &delay_200_500_e80, "NE140WUM-N6G"),1915 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c20, &delay_200_500_e80, "NT140FHM-N47"),1916 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cb6, &delay_200_500_e200, "NT116WHM-N44"),1917 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cfa, &delay_200_500_e50, "NV116WHM-A4D"),1918 1919 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1130, &delay_200_500_e50, "N116BGE-EB2"),1920 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1132, &delay_200_500_e80_d50, "N116BGE-EA2"),1921 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1138, &innolux_n116bca_ea1.delay, "N116BCA-EA1-RC4"),1922 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1139, &delay_200_500_e80_d50, "N116BGE-EA2"),1923 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1141, &delay_200_500_e80_d50, "Unknown"),1924 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1145, &delay_200_500_e80_d50, "N116BCN-EB1"),1925 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114a, &delay_200_500_e80_d50, "Unknown"),1926 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116BCA-EA1"),1927 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1152, &delay_200_500_e80_d50, "N116BCN-EA1"),1928 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1153, &delay_200_500_e80_d50, "N116BGE-EA2"),1929 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1154, &delay_200_500_e80_d50, "N116BCA-EA2"),1930 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1156, &delay_200_500_e80_d50, "Unknown"),1931 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1157, &delay_200_500_e80_d50, "N116BGE-EA2"),1932 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115b, &delay_200_500_e80_d50, "N116BCN-EB1"),1933 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115d, &delay_200_500_e80_d50, "N116BCA-EA2"),1934 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115e, &delay_200_500_e80_d50, "N116BCA-EA1"),1935 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1160, &delay_200_500_e80_d50, "N116BCJ-EAK"),1936 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1161, &delay_200_500_e80, "N116BCP-EA2"),1937 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-EA1"),1938 EDP_PANEL_ENTRY('C', 'M', 'N', 0x142b, &delay_200_500_e80_d50, "N140HCA-EAC"),1939 EDP_PANEL_ENTRY('C', 'M', 'N', 0x142e, &delay_200_500_e80_d50, "N140BGA-EA4"),1940 EDP_PANEL_ENTRY('C', 'M', 'N', 0x144f, &delay_200_500_e80_d50, "N140HGA-EA1"),1941 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1468, &delay_200_500_e80, "N140HGA-EA1"),1942 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d4, &delay_200_500_e80_d50, "N140HCA-EAC"),1943 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d6, &delay_200_500_e80_d50, "N140BGA-EA4"),1944 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14e5, &delay_200_500_e80_d50, "N140HGA-EA1"),1945 1946 EDP_PANEL_ENTRY('C', 'S', 'O', 0x1200, &delay_200_500_e50_p2e200, "MNC207QS1-1"),1947 1948 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1100, &delay_200_500_e80_d50, "MNB601LS1-1"),1949 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1104, &delay_200_500_e50, "MNB601LS1-4"),1950 1951 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d51, &delay_200_500_e200, "Unknown"),1952 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5b, &delay_200_500_e200, "MB116AN01"),1953 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5c, &delay_200_500_e200, "MB116AN01-2"),1954 1955 EDP_PANEL_ENTRY('I', 'V', 'O', 0x048e, &delay_200_500_e200_d10, "M116NWR6 R5"),1956 EDP_PANEL_ENTRY('I', 'V', 'O', 0x057d, &delay_200_500_e200, "R140NWF5 RH"),1957 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854a, &delay_200_500_p2e100, "M133NW4J"),1958 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854b, &delay_200_500_p2e100, "R133NW4K-R0"),1959 EDP_PANEL_ENTRY('I', 'V', 'O', 0x8c4d, &delay_200_150_e200, "R140NWFM R1"),1960 1961 EDP_PANEL_ENTRY('K', 'D', 'B', 0x044f, &delay_200_500_e80_d50, "Unknown"),1962 EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.delay, "116N21-30NV-A010"),1963 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1118, &delay_200_500_e50, "KD116N29-30NK-A005"),1964 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"),1965 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1212, &delay_200_500_e50, "KD116N0930A16"),1966 1967 EDP_PANEL_ENTRY('K', 'D', 'C', 0x044f, &delay_200_500_e50, "KD116N9-30NH-F3"),1968 EDP_PANEL_ENTRY('K', 'D', 'C', 0x05f1, &delay_200_500_e80_d50, "KD116N5-30NV-G7"),1969 EDP_PANEL_ENTRY('K', 'D', 'C', 0x0809, &delay_200_500_e50, "KD116N2930A15"),1970 1971 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0000, &delay_200_500_e200_d200, "Unknown"),1972 EDP_PANEL_ENTRY('L', 'G', 'D', 0x048d, &delay_200_500_e200_d200, "Unknown"),1973 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0497, &delay_200_500_e200_d200, "LP116WH7-SPB1"),1974 EDP_PANEL_ENTRY('L', 'G', 'D', 0x052c, &delay_200_500_e200_d200, "LP133WF2-SPL7"),1975 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0537, &delay_200_500_e200_d200, "Unknown"),1976 EDP_PANEL_ENTRY('L', 'G', 'D', 0x054a, &delay_200_500_e200_d200, "LP116WH8-SPC1"),1977 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0567, &delay_200_500_e200_d200, "Unknown"),1978 EDP_PANEL_ENTRY('L', 'G', 'D', 0x05af, &delay_200_500_e200_d200, "Unknown"),1979 EDP_PANEL_ENTRY('L', 'G', 'D', 0x05f1, &delay_200_500_e200_d200, "Unknown"),1980 1981 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"),1982 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &delay_80_500_e50, "LQ140M1JW46"),1983 EDP_PANEL_ENTRY('S', 'H', 'P', 0x153a, &delay_200_500_e50, "LQ140T1JH01"),1984 EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10"),1985 1986 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0100, &delay_100_500_e200, "2081116HHD028001-51D"),1987 1988 { /* sentinal */ }1989};1990 1991static const struct edp_panel_entry *find_edp_panel(u32 panel_id, const struct drm_edid *edid)1992{1993 const struct edp_panel_entry *panel;1994 1995 if (!panel_id)1996 return NULL;1997 1998 /*1999 * Match with identity first. This allows handling the case where2000 * vendors incorrectly reused the same panel ID for multiple panels that2001 * need different settings. If there's no match, try again with panel2002 * ID, which should be unique.2003 */2004 for (panel = edp_panels; panel->ident.panel_id; panel++)2005 if (drm_edid_match(edid, &panel->ident))2006 return panel;2007 2008 for (panel = edp_panels; panel->ident.panel_id; panel++)2009 if (panel->ident.panel_id == panel_id)2010 return panel;2011 2012 return NULL;2013}2014 2015static int panel_edp_platform_probe(struct platform_device *pdev)2016{2017 const struct of_device_id *id;2018 2019 /* Skip one since "edp-panel" is only supported on DP AUX bus */2020 id = of_match_node(platform_of_match + 1, pdev->dev.of_node);2021 if (!id)2022 return -ENODEV;2023 2024 return panel_edp_probe(&pdev->dev, id->data, NULL);2025}2026 2027static void panel_edp_platform_remove(struct platform_device *pdev)2028{2029 panel_edp_remove(&pdev->dev);2030}2031 2032static void panel_edp_platform_shutdown(struct platform_device *pdev)2033{2034 panel_edp_shutdown(&pdev->dev);2035}2036 2037static const struct dev_pm_ops panel_edp_pm_ops = {2038 SET_RUNTIME_PM_OPS(panel_edp_suspend, panel_edp_resume, NULL)2039 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,2040 pm_runtime_force_resume)2041};2042 2043static struct platform_driver panel_edp_platform_driver = {2044 .driver = {2045 .name = "panel-edp",2046 .of_match_table = platform_of_match,2047 .pm = &panel_edp_pm_ops,2048 },2049 .probe = panel_edp_platform_probe,2050 .remove_new = panel_edp_platform_remove,2051 .shutdown = panel_edp_platform_shutdown,2052};2053 2054static int panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device *aux_ep)2055{2056 const struct of_device_id *id;2057 2058 id = of_match_node(platform_of_match, aux_ep->dev.of_node);2059 if (!id)2060 return -ENODEV;2061 2062 return panel_edp_probe(&aux_ep->dev, id->data, aux_ep->aux);2063}2064 2065static void panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device *aux_ep)2066{2067 panel_edp_remove(&aux_ep->dev);2068}2069 2070static void panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device *aux_ep)2071{2072 panel_edp_shutdown(&aux_ep->dev);2073}2074 2075static struct dp_aux_ep_driver panel_edp_dp_aux_ep_driver = {2076 .driver = {2077 .name = "panel-simple-dp-aux",2078 .of_match_table = platform_of_match, /* Same as platform one! */2079 .pm = &panel_edp_pm_ops,2080 },2081 .probe = panel_edp_dp_aux_ep_probe,2082 .remove = panel_edp_dp_aux_ep_remove,2083 .shutdown = panel_edp_dp_aux_ep_shutdown,2084};2085 2086static int __init panel_edp_init(void)2087{2088 int err;2089 2090 err = platform_driver_register(&panel_edp_platform_driver);2091 if (err < 0)2092 return err;2093 2094 err = dp_aux_dp_driver_register(&panel_edp_dp_aux_ep_driver);2095 if (err < 0)2096 goto err_did_platform_register;2097 2098 return 0;2099 2100err_did_platform_register:2101 platform_driver_unregister(&panel_edp_platform_driver);2102 2103 return err;2104}2105module_init(panel_edp_init);2106 2107static void __exit panel_edp_exit(void)2108{2109 dp_aux_dp_driver_unregister(&panel_edp_dp_aux_ep_driver);2110 platform_driver_unregister(&panel_edp_platform_driver);2111}2112module_exit(panel_edp_exit);2113 2114MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");2115MODULE_DESCRIPTION("DRM Driver for Simple eDP Panels");2116MODULE_LICENSE("GPL and additional rights");2117