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1// SPDX-License-Identifier: GPL-2.0+2/*3 * Copyright (C) 2019-2024 Linaro Ltd4 * Author: Sumit Semwal <sumit.semwal@linaro.org>5 *	 Dmitry Baryshkov <dmitry.baryshkov@linaro.org>6 */7 8#include <linux/backlight.h>9#include <linux/delay.h>10#include <linux/gpio/consumer.h>11#include <linux/module.h>12#include <linux/of.h>13#include <linux/regulator/consumer.h>14 15#include <video/mipi_display.h>16 17#include <drm/drm_mipi_dsi.h>18#include <drm/drm_panel.h>19#include <drm/drm_probe_helper.h>20#include <drm/display/drm_dsc.h>21#include <drm/display/drm_dsc_helper.h>22 23#define NUM_SUPPLIES 224 25struct sw43408_panel {26	struct drm_panel base;27	struct mipi_dsi_device *link;28 29	struct regulator_bulk_data supplies[NUM_SUPPLIES];30 31	struct gpio_desc *reset_gpio;32 33	struct drm_dsc_config dsc;34};35 36static inline struct sw43408_panel *to_panel_info(struct drm_panel *panel)37{38	return container_of(panel, struct sw43408_panel, base);39}40 41static int sw43408_unprepare(struct drm_panel *panel)42{43	struct sw43408_panel *sw43408 = to_panel_info(panel);44	struct mipi_dsi_multi_context ctx = { .dsi = sw43408->link };45	int ret;46 47	mipi_dsi_dcs_set_display_off_multi(&ctx);48 49	mipi_dsi_dcs_enter_sleep_mode_multi(&ctx);50 51	mipi_dsi_msleep(&ctx, 100);52 53	gpiod_set_value(sw43408->reset_gpio, 1);54 55	ret = regulator_bulk_disable(ARRAY_SIZE(sw43408->supplies), sw43408->supplies);56 57	return ret ? : ctx.accum_err;58}59 60static int sw43408_program(struct drm_panel *panel)61{62	struct sw43408_panel *sw43408 = to_panel_info(panel);63	struct mipi_dsi_multi_context ctx = { .dsi = sw43408->link };64	struct drm_dsc_picture_parameter_set pps;65 66	mipi_dsi_dcs_write_seq_multi(&ctx, MIPI_DCS_SET_GAMMA_CURVE, 0x02);67 68	mipi_dsi_dcs_set_tear_on_multi(&ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);69 70	mipi_dsi_dcs_write_seq_multi(&ctx, 0x53, 0x0c, 0x30);71	mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x00, 0x70, 0xdf, 0x00, 0x70, 0xdf);72	mipi_dsi_dcs_write_seq_multi(&ctx, 0xf7, 0x01, 0x49, 0x0c);73 74	mipi_dsi_dcs_exit_sleep_mode_multi(&ctx);75 76	mipi_dsi_msleep(&ctx, 135);77 78	/* COMPRESSION_MODE moved after setting the PPS */79 80	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0xac);81	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5,82			       0x00, 0x3a, 0x00, 0x3a, 0x00, 0x0e, 0x10);83	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5,84			       0x75, 0x60, 0x2d, 0x5d, 0x80, 0x00, 0x0a, 0x0b,85			       0x00, 0x05, 0x0b, 0x00, 0x80, 0x0d, 0x0e, 0x40,86			       0x00, 0x0c, 0x00, 0x16, 0x00, 0xb8, 0x00, 0x80,87			       0x0d, 0x0e, 0x40, 0x00, 0x0c, 0x00, 0x16, 0x00,88			       0xb8, 0x00, 0x81, 0x00, 0x03, 0x03, 0x03, 0x01,89			       0x01);90	mipi_dsi_msleep(&ctx, 85);91	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcd,92			       0x00, 0x00, 0x00, 0x19, 0x19, 0x19, 0x19, 0x19,93			       0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19,94			       0x16, 0x16);95	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x80, 0x5c, 0x07, 0x03, 0x28);96	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x02, 0x02, 0x0f);97	mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x04, 0x61, 0xdb, 0x04, 0x70, 0xdb);98	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0xca);99 100	mipi_dsi_dcs_set_display_on_multi(&ctx);101 102	mipi_dsi_msleep(&ctx, 50);103 104	sw43408->link->mode_flags &= ~MIPI_DSI_MODE_LPM;105 106	drm_dsc_pps_payload_pack(&pps, sw43408->link->dsc);107 108	mipi_dsi_picture_parameter_set_multi(&ctx, &pps);109 110	sw43408->link->mode_flags |= MIPI_DSI_MODE_LPM;111 112	/*113	 * This panel uses PPS selectors with offset:114	 * PPS 1 if pps_identifier is 0115	 * PPS 2 if pps_identifier is 1116	 */117	mipi_dsi_compression_mode_ext_multi(&ctx, true,118					    MIPI_DSI_COMPRESSION_DSC, 1);119	return ctx.accum_err;120}121 122static int sw43408_prepare(struct drm_panel *panel)123{124	struct sw43408_panel *ctx = to_panel_info(panel);125	int ret;126 127	ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);128	if (ret < 0)129		return ret;130 131	usleep_range(5000, 6000);132 133	gpiod_set_value(ctx->reset_gpio, 0);134	usleep_range(9000, 10000);135	gpiod_set_value(ctx->reset_gpio, 1);136	usleep_range(1000, 2000);137	gpiod_set_value(ctx->reset_gpio, 0);138	usleep_range(9000, 10000);139 140	ret = sw43408_program(panel);141	if (ret)142		goto poweroff;143 144	return 0;145 146poweroff:147	gpiod_set_value(ctx->reset_gpio, 1);148	regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);149	return ret;150}151 152static const struct drm_display_mode sw43408_mode = {153	.clock = (1080 + 20 + 32 + 20) * (2160 + 20 + 4 + 20) * 60 / 1000,154 155	.hdisplay = 1080,156	.hsync_start = 1080 + 20,157	.hsync_end = 1080 + 20 + 32,158	.htotal = 1080 + 20 + 32 + 20,159 160	.vdisplay = 2160,161	.vsync_start = 2160 + 20,162	.vsync_end = 2160 + 20 + 4,163	.vtotal = 2160 + 20 + 4 + 20,164 165	.width_mm = 62,166	.height_mm = 124,167 168	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,169};170 171static int sw43408_get_modes(struct drm_panel *panel,172			     struct drm_connector *connector)173{174	return drm_connector_helper_get_modes_fixed(connector, &sw43408_mode);175}176 177static int sw43408_backlight_update_status(struct backlight_device *bl)178{179	struct mipi_dsi_device *dsi = bl_get_data(bl);180	u16 brightness = backlight_get_brightness(bl);181 182	return mipi_dsi_dcs_set_display_brightness_large(dsi, brightness);183}184 185static const struct backlight_ops sw43408_backlight_ops = {186	.update_status = sw43408_backlight_update_status,187};188 189static int sw43408_backlight_init(struct sw43408_panel *ctx)190{191	struct device *dev = &ctx->link->dev;192	const struct backlight_properties props = {193		.type = BACKLIGHT_PLATFORM,194		.brightness = 255,195		.max_brightness = 255,196	};197 198	ctx->base.backlight = devm_backlight_device_register(dev, dev_name(dev), dev,199							     ctx->link,200							     &sw43408_backlight_ops,201							     &props);202 203	if (IS_ERR(ctx->base.backlight))204		return dev_err_probe(dev, PTR_ERR(ctx->base.backlight),205				     "Failed to create backlight\n");206 207	return 0;208}209 210static const struct drm_panel_funcs sw43408_funcs = {211	.unprepare = sw43408_unprepare,212	.prepare = sw43408_prepare,213	.get_modes = sw43408_get_modes,214};215 216static const struct of_device_id sw43408_of_match[] = {217	{ .compatible = "lg,sw43408", },218	{ /* sentinel */ }219};220MODULE_DEVICE_TABLE(of, sw43408_of_match);221 222static int sw43408_add(struct sw43408_panel *ctx)223{224	struct device *dev = &ctx->link->dev;225	int ret;226 227	ctx->supplies[0].supply = "vddi"; /* 1.88 V */228	ctx->supplies[0].init_load_uA = 62000;229	ctx->supplies[1].supply = "vpnl"; /* 3.0 V */230	ctx->supplies[1].init_load_uA = 857000;231 232	ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),233				      ctx->supplies);234	if (ret < 0)235		return ret;236 237	ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);238	if (IS_ERR(ctx->reset_gpio)) {239		ret = PTR_ERR(ctx->reset_gpio);240		return dev_err_probe(dev, ret, "cannot get reset gpio\n");241	}242 243	ret = sw43408_backlight_init(ctx);244	if (ret < 0)245		return ret;246 247	ctx->base.prepare_prev_first = true;248 249	drm_panel_init(&ctx->base, dev, &sw43408_funcs, DRM_MODE_CONNECTOR_DSI);250 251	drm_panel_add(&ctx->base);252	return ret;253}254 255static int sw43408_probe(struct mipi_dsi_device *dsi)256{257	struct sw43408_panel *ctx;258	int ret;259 260	ctx = devm_kzalloc(&dsi->dev, sizeof(*ctx), GFP_KERNEL);261	if (!ctx)262		return -ENOMEM;263 264	dsi->mode_flags = MIPI_DSI_MODE_LPM;265	dsi->format = MIPI_DSI_FMT_RGB888;266	dsi->lanes = 4;267 268	ctx->link = dsi;269	mipi_dsi_set_drvdata(dsi, ctx);270 271	ret = sw43408_add(ctx);272	if (ret < 0)273		return ret;274 275	/* The panel works only in the DSC mode. Set DSC params. */276	ctx->dsc.dsc_version_major = 0x1;277	ctx->dsc.dsc_version_minor = 0x1;278 279	/* slice_count * slice_width == width */280	ctx->dsc.slice_height = 16;281	ctx->dsc.slice_width = 540;282	ctx->dsc.slice_count = 2;283	ctx->dsc.bits_per_component = 8;284	ctx->dsc.bits_per_pixel = 8 << 4;285	ctx->dsc.block_pred_enable = true;286 287	dsi->dsc = &ctx->dsc;288 289	return mipi_dsi_attach(dsi);290}291 292static void sw43408_remove(struct mipi_dsi_device *dsi)293{294	struct sw43408_panel *ctx = mipi_dsi_get_drvdata(dsi);295	int ret;296 297	ret = sw43408_unprepare(&ctx->base);298	if (ret < 0)299		dev_err(&dsi->dev, "failed to unprepare panel: %d\n", ret);300 301	ret = mipi_dsi_detach(dsi);302	if (ret < 0)303		dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret);304 305	drm_panel_remove(&ctx->base);306}307 308static struct mipi_dsi_driver sw43408_driver = {309	.driver = {310		.name = "panel-lg-sw43408",311		.of_match_table = sw43408_of_match,312	},313	.probe = sw43408_probe,314	.remove = sw43408_remove,315};316module_mipi_dsi_driver(sw43408_driver);317 318MODULE_AUTHOR("Sumit Semwal <sumit.semwal@linaro.org>");319MODULE_DESCRIPTION("LG SW436408 MIPI-DSI LED panel");320MODULE_LICENSE("GPL");321