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1/*2 * Copyright 2010 Advanced Micro Devices, Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: Alex Deucher23 */24#ifndef __NI_REG_H__25#define __NI_REG_H__26 27/* northern islands - DCE5 */28 29#define NI_INPUT_GAMMA_CONTROL 0x684030# define NI_GRPH_INPUT_GAMMA_MODE(x) (((x) & 0x3) << 0)31# define NI_INPUT_GAMMA_USE_LUT 032# define NI_INPUT_GAMMA_BYPASS 133# define NI_INPUT_GAMMA_SRGB_24 234# define NI_INPUT_GAMMA_XVYCC_222 335# define NI_OVL_INPUT_GAMMA_MODE(x) (((x) & 0x3) << 4)36 37#define NI_PRESCALE_GRPH_CONTROL 0x68b438# define NI_GRPH_PRESCALE_BYPASS (1 << 4)39 40#define NI_PRESCALE_OVL_CONTROL 0x68c441# define NI_OVL_PRESCALE_BYPASS (1 << 4)42 43#define NI_INPUT_CSC_CONTROL 0x68d444# define NI_INPUT_CSC_GRPH_MODE(x) (((x) & 0x3) << 0)45# define NI_INPUT_CSC_BYPASS 046# define NI_INPUT_CSC_PROG_COEFF 147# define NI_INPUT_CSC_PROG_SHARED_MATRIXA 248# define NI_INPUT_CSC_OVL_MODE(x) (((x) & 0x3) << 4)49 50#define NI_OUTPUT_CSC_CONTROL 0x68f051# define NI_OUTPUT_CSC_GRPH_MODE(x) (((x) & 0x7) << 0)52# define NI_OUTPUT_CSC_BYPASS 053# define NI_OUTPUT_CSC_TV_RGB 154# define NI_OUTPUT_CSC_YCBCR_601 255# define NI_OUTPUT_CSC_YCBCR_709 356# define NI_OUTPUT_CSC_PROG_COEFF 457# define NI_OUTPUT_CSC_PROG_SHARED_MATRIXB 558# define NI_OUTPUT_CSC_OVL_MODE(x) (((x) & 0x7) << 4)59 60#define NI_DEGAMMA_CONTROL 0x696061# define NI_GRPH_DEGAMMA_MODE(x) (((x) & 0x3) << 0)62# define NI_DEGAMMA_BYPASS 063# define NI_DEGAMMA_SRGB_24 164# define NI_DEGAMMA_XVYCC_222 265# define NI_OVL_DEGAMMA_MODE(x) (((x) & 0x3) << 4)66# define NI_ICON_DEGAMMA_MODE(x) (((x) & 0x3) << 8)67# define NI_CURSOR_DEGAMMA_MODE(x) (((x) & 0x3) << 12)68 69#define NI_GAMUT_REMAP_CONTROL 0x696470# define NI_GRPH_GAMUT_REMAP_MODE(x) (((x) & 0x3) << 0)71# define NI_GAMUT_REMAP_BYPASS 072# define NI_GAMUT_REMAP_PROG_COEFF 173# define NI_GAMUT_REMAP_PROG_SHARED_MATRIXA 274# define NI_GAMUT_REMAP_PROG_SHARED_MATRIXB 375# define NI_OVL_GAMUT_REMAP_MODE(x) (((x) & 0x3) << 4)76 77#define NI_REGAMMA_CONTROL 0x6a8078# define NI_GRPH_REGAMMA_MODE(x) (((x) & 0x7) << 0)79# define NI_REGAMMA_BYPASS 080# define NI_REGAMMA_SRGB_24 181# define NI_REGAMMA_XVYCC_222 282# define NI_REGAMMA_PROG_A 383# define NI_REGAMMA_PROG_B 484# define NI_OVL_REGAMMA_MODE(x) (((x) & 0x7) << 4)85 86#define NI_DP_MSE_LINK_TIMING 0x73a087# define NI_DP_MSE_LINK_FRAME (((x) & 0x3ff) << 0)88# define NI_DP_MSE_LINK_LINE (((x) & 0x3) << 16)89 90#define NI_DP_MSE_MISC_CNTL 0x736c91# define NI_DP_MSE_BLANK_CODE (((x) & 0x1) << 0)92# define NI_DP_MSE_TIMESTAMP_MODE (((x) & 0x1) << 4)93# define NI_DP_MSE_ZERO_ENCODER (((x) & 0x1) << 8)94 95#define NI_DP_MSE_RATE_CNTL 0x738496# define NI_DP_MSE_RATE_Y(x) (((x) & 0x3ffffff) << 0)97# define NI_DP_MSE_RATE_X(x) (((x) & 0x3f) << 26)98 99#define NI_DP_MSE_RATE_UPDATE 0x738c100 101#define NI_DP_MSE_SAT0 0x7390102# define NI_DP_MSE_SAT_SRC0(x) (((x) & 0x7) << 0)103# define NI_DP_MSE_SAT_SLOT_COUNT0(x) (((x) & 0x3f) << 8)104# define NI_DP_MSE_SAT_SRC1(x) (((x) & 0x7) << 16)105# define NI_DP_MSE_SAT_SLOT_COUNT1(x) (((x) & 0x3f) << 24)106 107#define NI_DP_MSE_SAT1 0x7394108 109#define NI_DP_MSE_SAT2 0x7398110 111#define NI_DP_MSE_SAT_UPDATE 0x739c112# define NI_DP_MSE_SAT_UPDATE_MASK 0x3113# define NI_DP_MSE_16_MTP_KEEPOUT 0x100114 115#define NI_DIG_BE_CNTL 0x7140116# define NI_DIG_FE_SOURCE_SELECT(x) (((x) & 0x7f) << 8)117# define NI_DIG_FE_DIG_MODE(x) (((x) & 0x7) << 16)118# define NI_DIG_MODE_DP_SST 0119# define NI_DIG_MODE_LVDS 1120# define NI_DIG_MODE_TMDS_DVI 2121# define NI_DIG_MODE_TMDS_HDMI 3122# define NI_DIG_MODE_DP_MST 5123# define NI_DIG_HPD_SELECT(x) (((x) & 0x7) << 28)124 125#define NI_DIG_FE_CNTL 0x7000126# define NI_DIG_SOURCE_SELECT(x) (((x) & 0x3) << 0)127# define NI_DIG_STEREOSYNC_SELECT(x) (((x) & 0x3) << 4)128# define NI_DIG_STEREOSYNC_GATE_EN(x) (((x) & 0x1) << 8)129# define NI_DIG_DUAL_LINK_ENABLE(x) (((x) & 0x1) << 16)130# define NI_DIG_SWAP(x) (((x) & 0x1) << 18)131# define NI_DIG_SYMCLK_FE_ON (0x1 << 24)132#endif133