101 lines · c
1/* SPDX-License-Identifier: MIT */2 3#include "radeon.h"4 5#define R100_TRACK_MAX_TEXTURE 36#define R200_TRACK_MAX_TEXTURE 67#define R300_TRACK_MAX_TEXTURE 168 9#define R100_MAX_CB 110#define R300_MAX_CB 411 12/*13 * CS functions14 */15struct r100_cs_track_cb {16 struct radeon_bo *robj;17 unsigned pitch;18 unsigned cpp;19 unsigned offset;20};21 22struct r100_cs_track_array {23 struct radeon_bo *robj;24 unsigned esize;25};26 27struct r100_cs_cube_info {28 struct radeon_bo *robj;29 unsigned offset;30 unsigned width;31 unsigned height;32};33 34#define R100_TRACK_COMP_NONE 035#define R100_TRACK_COMP_DXT1 136#define R100_TRACK_COMP_DXT35 237 38struct r100_cs_track_texture {39 struct radeon_bo *robj;40 struct r100_cs_cube_info cube_info[5]; /* info for 5 non-primary faces */41 unsigned pitch;42 unsigned width;43 unsigned height;44 unsigned num_levels;45 unsigned cpp;46 unsigned tex_coord_type;47 unsigned txdepth;48 unsigned width_11;49 unsigned height_11;50 bool use_pitch;51 bool enabled;52 bool lookup_disable;53 bool roundup_w;54 bool roundup_h;55 unsigned compress_format;56};57 58struct r100_cs_track {59 unsigned num_cb;60 unsigned num_texture;61 unsigned maxy;62 unsigned vtx_size;63 unsigned vap_vf_cntl;64 unsigned vap_alt_nverts;65 unsigned immd_dwords;66 unsigned num_arrays;67 unsigned max_indx;68 unsigned color_channel_mask;69 struct r100_cs_track_array arrays[16];70 struct r100_cs_track_cb cb[R300_MAX_CB];71 struct r100_cs_track_cb zb;72 struct r100_cs_track_cb aa;73 struct r100_cs_track_texture textures[R300_TRACK_MAX_TEXTURE];74 bool z_enabled;75 bool separate_cube;76 bool zb_cb_clear;77 bool blend_read_enable;78 bool cb_dirty;79 bool zb_dirty;80 bool tex_dirty;81 bool aa_dirty;82 bool aaresolve;83};84 85int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track);86void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track);87 88int r100_cs_packet_parse_vline(struct radeon_cs_parser *p);89 90int r200_packet0_check(struct radeon_cs_parser *p,91 struct radeon_cs_packet *pkt,92 unsigned idx, unsigned reg);93 94int r100_reloc_pitch_offset(struct radeon_cs_parser *p,95 struct radeon_cs_packet *pkt,96 unsigned idx,97 unsigned reg);98int r100_packet3_load_vbpntr(struct radeon_cs_parser *p,99 struct radeon_cs_packet *pkt,100 int idx);101