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1/*2 * Copyright 2008 Advanced Micro Devices, Inc.3 * Copyright 2008 Red Hat Inc.4 * Copyright 2009 Jerome Glisse.5 *6 * Permission is hereby granted, free of charge, to any person obtaining a7 * copy of this software and associated documentation files (the "Software"),8 * to deal in the Software without restriction, including without limitation9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,10 * and/or sell copies of the Software, and to permit persons to whom the11 * Software is furnished to do so, subject to the following conditions:12 *13 * The above copyright notice and this permission notice shall be included in14 * all copies or substantial portions of the Software.15 *16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR22 * OTHER DEALINGS IN THE SOFTWARE.23 *24 * Authors: Dave Airlie25 * Alex Deucher26 * Jerome Glisse27 */28#ifndef __R600_REG_H__29#define __R600_REG_H__30 31#define R600_PCIE_PORT_INDEX 0x003832#define R600_PCIE_PORT_DATA 0x003c33 34#define R600_RCU_INDEX 0x010035#define R600_RCU_DATA 0x010436 37#define R600_UVD_CTX_INDEX 0xf4a038#define R600_UVD_CTX_DATA 0xf4a439 40#define R600_MC_VM_FB_LOCATION 0x218041#define R600_MC_FB_BASE_MASK 0x0000FFFF42#define R600_MC_FB_BASE_SHIFT 043#define R600_MC_FB_TOP_MASK 0xFFFF000044#define R600_MC_FB_TOP_SHIFT 1645#define R600_MC_VM_AGP_TOP 0x218446#define R600_MC_AGP_TOP_MASK 0x0003FFFF47#define R600_MC_AGP_TOP_SHIFT 048#define R600_MC_VM_AGP_BOT 0x218849#define R600_MC_AGP_BOT_MASK 0x0003FFFF50#define R600_MC_AGP_BOT_SHIFT 051#define R600_MC_VM_AGP_BASE 0x218c52#define R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x219053#define R600_LOGICAL_PAGE_NUMBER_MASK 0x000FFFFF54#define R600_LOGICAL_PAGE_NUMBER_SHIFT 055#define R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x219456#define R600_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x219857 58#define R700_MC_VM_FB_LOCATION 0x202459#define R700_MC_FB_BASE_MASK 0x0000FFFF60#define R700_MC_FB_BASE_SHIFT 061#define R700_MC_FB_TOP_MASK 0xFFFF000062#define R700_MC_FB_TOP_SHIFT 1663#define R700_MC_VM_AGP_TOP 0x202864#define R700_MC_AGP_TOP_MASK 0x0003FFFF65#define R700_MC_AGP_TOP_SHIFT 066#define R700_MC_VM_AGP_BOT 0x202c67#define R700_MC_AGP_BOT_MASK 0x0003FFFF68#define R700_MC_AGP_BOT_SHIFT 069#define R700_MC_VM_AGP_BASE 0x203070#define R700_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x203471#define R700_LOGICAL_PAGE_NUMBER_MASK 0x000FFFFF72#define R700_LOGICAL_PAGE_NUMBER_SHIFT 073#define R700_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x203874#define R700_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x203c75 76#define R600_RAMCFG 0x240877# define R600_CHANSIZE (1 << 7)78# define R600_CHANSIZE_OVERRIDE (1 << 10)79 80 81#define R600_GENERAL_PWRMGT 0x61882# define R600_OPEN_DRAIN_PADS (1 << 11)83 84#define R600_LOWER_GPIO_ENABLE 0x71085#define R600_CTXSW_VID_LOWER_GPIO_CNTL 0x71886#define R600_HIGH_VID_LOWER_GPIO_CNTL 0x71c87#define R600_MEDIUM_VID_LOWER_GPIO_CNTL 0x72088#define R600_LOW_VID_LOWER_GPIO_CNTL 0x72489 90#define R600_D1GRPH_SWAP_CONTROL 0x610C91# define R600_D1GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0)92# define R600_D1GRPH_SWAP_ENDIAN_NONE 093# define R600_D1GRPH_SWAP_ENDIAN_16BIT 194# define R600_D1GRPH_SWAP_ENDIAN_32BIT 295# define R600_D1GRPH_SWAP_ENDIAN_64BIT 396# define R600_D1GRPH_RED_CROSSBAR(x) (((x) & 0x3) << 4)97# define R600_D1GRPH_RED_SEL_R 098# define R600_D1GRPH_RED_SEL_G 199# define R600_D1GRPH_RED_SEL_B 2100# define R600_D1GRPH_RED_SEL_A 3101# define R600_D1GRPH_GREEN_CROSSBAR(x) (((x) & 0x3) << 6)102# define R600_D1GRPH_GREEN_SEL_G 0103# define R600_D1GRPH_GREEN_SEL_B 1104# define R600_D1GRPH_GREEN_SEL_A 2105# define R600_D1GRPH_GREEN_SEL_R 3106# define R600_D1GRPH_BLUE_CROSSBAR(x) (((x) & 0x3) << 8)107# define R600_D1GRPH_BLUE_SEL_B 0108# define R600_D1GRPH_BLUE_SEL_A 1109# define R600_D1GRPH_BLUE_SEL_R 2110# define R600_D1GRPH_BLUE_SEL_G 3111# define R600_D1GRPH_ALPHA_CROSSBAR(x) (((x) & 0x3) << 10)112# define R600_D1GRPH_ALPHA_SEL_A 0113# define R600_D1GRPH_ALPHA_SEL_R 1114# define R600_D1GRPH_ALPHA_SEL_G 2115# define R600_D1GRPH_ALPHA_SEL_B 3116 117#define R600_HDP_NONSURFACE_BASE 0x2c04118 119#define R600_BUS_CNTL 0x5420120# define R600_BIOS_ROM_DIS (1 << 1)121#define R600_CONFIG_CNTL 0x5424122#define R600_CONFIG_MEMSIZE 0x5428123#define R600_CONFIG_F0_BASE 0x542C124#define R600_CONFIG_APER_SIZE 0x5430125 126#define R600_BIF_FB_EN 0x5490127#define R600_FB_READ_EN (1 << 0)128#define R600_FB_WRITE_EN (1 << 1)129 130#define R600_CITF_CNTL 0x200c131#define R600_BLACKOUT_MASK 0x00000003132 133#define R700_MC_CITF_CNTL 0x25c0134 135#define R600_ROM_CNTL 0x1600136# define R600_SCK_OVERWRITE (1 << 1)137# define R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT 28138# define R600_SCK_PRESCALE_CRYSTAL_CLK_MASK (0xf << 28)139 140#define R600_CG_SPLL_FUNC_CNTL 0x600141# define R600_SPLL_BYPASS_EN (1 << 3)142#define R600_CG_SPLL_STATUS 0x60c143# define R600_SPLL_CHG_STATUS (1 << 1)144 145#define R600_BIOS_0_SCRATCH 0x1724146#define R600_BIOS_1_SCRATCH 0x1728147#define R600_BIOS_2_SCRATCH 0x172c148#define R600_BIOS_3_SCRATCH 0x1730149#define R600_BIOS_4_SCRATCH 0x1734150#define R600_BIOS_5_SCRATCH 0x1738151#define R600_BIOS_6_SCRATCH 0x173c152#define R600_BIOS_7_SCRATCH 0x1740153 154/* Audio, these regs were reverse enginered,155 * so the chance is high that the naming is wrong156 * R6xx+ ??? */157 158/* Audio clocks */159#define R600_AUDIO_PLL1_MUL 0x0514160#define R600_AUDIO_PLL1_DIV 0x0518161#define R600_AUDIO_PLL2_MUL 0x0524162#define R600_AUDIO_PLL2_DIV 0x0528163#define R600_AUDIO_CLK_SRCSEL 0x0534164 165/* Audio general */166#define R600_AUDIO_ENABLE 0x7300167#define R600_AUDIO_TIMING 0x7344168 169/* Audio params */170#define R600_AUDIO_VENDOR_ID 0x7380171#define R600_AUDIO_REVISION_ID 0x7384172#define R600_AUDIO_ROOT_NODE_COUNT 0x7388173#define R600_AUDIO_NID1_NODE_COUNT 0x738c174#define R600_AUDIO_NID1_TYPE 0x7390175#define R600_AUDIO_SUPPORTED_SIZE_RATE 0x7394176#define R600_AUDIO_SUPPORTED_CODEC 0x7398177#define R600_AUDIO_SUPPORTED_POWER_STATES 0x739c178#define R600_AUDIO_NID2_CAPS 0x73a0179#define R600_AUDIO_NID3_CAPS 0x73a4180#define R600_AUDIO_NID3_PIN_CAPS 0x73a8181 182/* Audio conn list */183#define R600_AUDIO_CONN_LIST_LEN 0x73ac184#define R600_AUDIO_CONN_LIST 0x73b0185 186/* Audio verbs */187#define R600_AUDIO_RATE_BPS_CHANNEL 0x73c0188#define R600_AUDIO_PLAYING 0x73c4189#define R600_AUDIO_IMPLEMENTATION_ID 0x73c8190#define R600_AUDIO_CONFIG_DEFAULT 0x73cc191#define R600_AUDIO_PIN_SENSE 0x73d0192#define R600_AUDIO_PIN_WIDGET_CNTL 0x73d4193#define R600_AUDIO_STATUS_BITS 0x73d8194 195#define DCE2_HDMI_OFFSET0 (0x7400 - 0x7400)196#define DCE2_HDMI_OFFSET1 (0x7700 - 0x7400)197/* DCE3.2 second instance starts at 0x7800 */198#define DCE3_HDMI_OFFSET0 (0x7400 - 0x7400)199#define DCE3_HDMI_OFFSET1 (0x7800 - 0x7400)200 201#endif202