brintos

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1/*2 * Copyright 2014 Advanced Micro Devices, Inc.3 * All Rights Reserved.4 *5 * Permission is hereby granted, free of charge, to any person obtaining a6 * copy of this software and associated documentation files (the7 * "Software"), to deal in the Software without restriction, including8 * without limitation the rights to use, copy, modify, merge, publish,9 * distribute, sub license, and/or sell copies of the Software, and to10 * permit persons to whom the Software is furnished to do so, subject to11 * the following conditions:12 *13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE19 * USE OR OTHER DEALINGS IN THE SOFTWARE.20 *21 * The above copyright notice and this permission notice (including the22 * next paragraph) shall be included in all copies or substantial portions23 * of the Software.24 *25 */26/*27 * Authors:28 *    Christian König <christian.koenig@amd.com>29 */30 31#include <linux/firmware.h>32#include <linux/module.h>33#include <linux/mmu_notifier.h>34 35#include <drm/drm.h>36 37#include "radeon.h"38 39/**40 * radeon_mn_invalidate - callback to notify about mm change41 *42 * @mn: our notifier43 * @range: the VMA under invalidation44 * @cur_seq: Value to pass to mmu_interval_set_seq()45 *46 * We block for all BOs between start and end to be idle and47 * unmap them by move them into system domain again.48 */49static bool radeon_mn_invalidate(struct mmu_interval_notifier *mn,50				 const struct mmu_notifier_range *range,51				 unsigned long cur_seq)52{53	struct radeon_bo *bo = container_of(mn, struct radeon_bo, notifier);54	struct ttm_operation_ctx ctx = { false, false };55	long r;56 57	if (!bo->tbo.ttm || !radeon_ttm_tt_is_bound(bo->tbo.bdev, bo->tbo.ttm))58		return true;59 60	if (!mmu_notifier_range_blockable(range))61		return false;62 63	r = radeon_bo_reserve(bo, true);64	if (r) {65		DRM_ERROR("(%ld) failed to reserve user bo\n", r);66		return true;67	}68 69	r = dma_resv_wait_timeout(bo->tbo.base.resv, DMA_RESV_USAGE_BOOKKEEP,70				  false, MAX_SCHEDULE_TIMEOUT);71	if (r <= 0)72		DRM_ERROR("(%ld) failed to wait for user bo\n", r);73 74	radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_CPU);75	r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);76	if (r)77		DRM_ERROR("(%ld) failed to validate user bo\n", r);78 79	radeon_bo_unreserve(bo);80	return true;81}82 83static const struct mmu_interval_notifier_ops radeon_mn_ops = {84	.invalidate = radeon_mn_invalidate,85};86 87/**88 * radeon_mn_register - register a BO for notifier updates89 *90 * @bo: radeon buffer object91 * @addr: userptr addr we should monitor92 *93 * Registers an MMU notifier for the given BO at the specified address.94 * Returns 0 on success, -ERRNO if anything goes wrong.95 */96int radeon_mn_register(struct radeon_bo *bo, unsigned long addr)97{98	int ret;99 100	ret = mmu_interval_notifier_insert(&bo->notifier, current->mm, addr,101					   radeon_bo_size(bo), &radeon_mn_ops);102	if (ret)103		return ret;104 105	/*106	 * FIXME: radeon appears to allow get_user_pages to run during107	 * invalidate_range_start/end, which is not a safe way to read the108	 * PTEs. It should use the mmu_interval_read_begin() scheme around the109	 * get_user_pages to ensure that the PTEs are read properly110	 */111	mmu_interval_read_begin(&bo->notifier);112	return 0;113}114 115/**116 * radeon_mn_unregister - unregister a BO for notifier updates117 *118 * @bo: radeon buffer object119 *120 * Remove any registration of MMU notifier updates from the buffer object.121 */122void radeon_mn_unregister(struct radeon_bo *bo)123{124	if (!bo->notifier.mm)125		return;126	mmu_interval_notifier_remove(&bo->notifier);127	bo->notifier.mm = NULL;128}129