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1/*2 * Copyright 2008 Advanced Micro Devices, Inc.3 * Copyright 2008 Red Hat Inc.4 * Copyright 2009 Jerome Glisse.5 *6 * Permission is hereby granted, free of charge, to any person obtaining a7 * copy of this software and associated documentation files (the "Software"),8 * to deal in the Software without restriction, including without limitation9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,10 * and/or sell copies of the Software, and to permit persons to whom the11 * Software is furnished to do so, subject to the following conditions:12 *13 * The above copyright notice and this permission notice shall be included in14 * all copies or substantial portions of the Software.15 *16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR22 * OTHER DEALINGS IN THE SOFTWARE.23 *24 * Authors: Dave Airlie25 * Alex Deucher26 * Jerome Glisse27 */28#ifndef __RS690D_H__29#define __RS690D_H__30 31/* Registers */32#define R_00001E_K8_FB_LOCATION 0x00001E33#define R_00005F_MC_MISC_UMA_CNTL 0x00005F34#define G_00005F_K8_ADDR_EXT(x) (((x) >> 0) & 0xFF)35#define R_000078_MC_INDEX 0x00007836#define S_000078_MC_IND_ADDR(x) (((x) & 0x1FF) << 0)37#define G_000078_MC_IND_ADDR(x) (((x) >> 0) & 0x1FF)38#define C_000078_MC_IND_ADDR 0xFFFFFE0039#define S_000078_MC_IND_WR_EN(x) (((x) & 0x1) << 9)40#define G_000078_MC_IND_WR_EN(x) (((x) >> 9) & 0x1)41#define C_000078_MC_IND_WR_EN 0xFFFFFDFF42#define R_00007C_MC_DATA 0x00007C43#define S_00007C_MC_DATA(x) (((x) & 0xFFFFFFFF) << 0)44#define G_00007C_MC_DATA(x) (((x) >> 0) & 0xFFFFFFFF)45#define C_00007C_MC_DATA 0x0000000046#define R_0000F8_CONFIG_MEMSIZE 0x0000F847#define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0)48#define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF)49#define C_0000F8_CONFIG_MEMSIZE 0x0000000050#define R_000134_HDP_FB_LOCATION 0x00013451#define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0)52#define G_000134_HDP_FB_START(x) (((x) >> 0) & 0xFFFF)53#define C_000134_HDP_FB_START 0xFFFF000054#define R_0007C0_CP_STAT 0x0007C055#define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0)56#define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1)57#define C_0007C0_MRU_BUSY 0xFFFFFFFE58#define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1)59#define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1)60#define C_0007C0_MWU_BUSY 0xFFFFFFFD61#define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2)62#define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1)63#define C_0007C0_RSIU_BUSY 0xFFFFFFFB64#define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3)65#define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1)66#define C_0007C0_RCIU_BUSY 0xFFFFFFF767#define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9)68#define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1)69#define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF70#define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10)71#define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1)72#define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF73#define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11)74#define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1)75#define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF76#define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12)77#define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1)78#define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF79#define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13)80#define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1)81#define C_0007C0_CSI_BUSY 0xFFFFDFFF82#define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14)83#define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1)84#define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF85#define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15)86#define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1)87#define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF88#define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28)89#define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1)90#define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF91#define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29)92#define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1)93#define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF94#define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30)95#define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1)96#define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF97#define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31)98#define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1)99#define C_0007C0_CP_BUSY 0x7FFFFFFF100#define R_000E40_RBBM_STATUS 0x000E40101#define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0)102#define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F)103#define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80104#define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8)105#define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1)106#define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF107#define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9)108#define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1)109#define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF110#define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10)111#define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1)112#define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF113#define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11)114#define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1)115#define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF116#define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12)117#define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1)118#define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF119#define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13)120#define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1)121#define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF122#define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14)123#define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1)124#define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF125#define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15)126#define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1)127#define C_000E40_ENG_EV_BUSY 0xFFFF7FFF128#define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16)129#define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1)130#define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF131#define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17)132#define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1)133#define C_000E40_E2_BUSY 0xFFFDFFFF134#define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18)135#define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1)136#define C_000E40_RB2D_BUSY 0xFFFBFFFF137#define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19)138#define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1)139#define C_000E40_RB3D_BUSY 0xFFF7FFFF140#define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20)141#define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1)142#define C_000E40_VAP_BUSY 0xFFEFFFFF143#define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21)144#define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1)145#define C_000E40_RE_BUSY 0xFFDFFFFF146#define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22)147#define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1)148#define C_000E40_TAM_BUSY 0xFFBFFFFF149#define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23)150#define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1)151#define C_000E40_TDM_BUSY 0xFF7FFFFF152#define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24)153#define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1)154#define C_000E40_PB_BUSY 0xFEFFFFFF155#define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25)156#define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1)157#define C_000E40_TIM_BUSY 0xFDFFFFFF158#define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26)159#define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1)160#define C_000E40_GA_BUSY 0xFBFFFFFF161#define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27)162#define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1)163#define C_000E40_CBA2D_BUSY 0xF7FFFFFF164#define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31)165#define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1)166#define C_000E40_GUI_ACTIVE 0x7FFFFFFF167#define R_006520_DC_LB_MEMORY_SPLIT 0x006520168#define S_006520_DC_LB_MEMORY_SPLIT(x) (((x) & 0x3) << 0)169#define G_006520_DC_LB_MEMORY_SPLIT(x) (((x) >> 0) & 0x3)170#define C_006520_DC_LB_MEMORY_SPLIT 0xFFFFFFFC171#define S_006520_DC_LB_MEMORY_SPLIT_MODE(x) (((x) & 0x1) << 2)172#define G_006520_DC_LB_MEMORY_SPLIT_MODE(x) (((x) >> 2) & 0x1)173#define C_006520_DC_LB_MEMORY_SPLIT_MODE 0xFFFFFFFB174#define V_006520_DC_LB_MEMORY_SPLIT_D1HALF_D2HALF 0175#define V_006520_DC_LB_MEMORY_SPLIT_D1_3Q_D2_1Q 1176#define V_006520_DC_LB_MEMORY_SPLIT_D1_ONLY 2177#define V_006520_DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q 3178#define S_006520_DC_LB_DISP1_END_ADR(x) (((x) & 0x7FF) << 4)179#define G_006520_DC_LB_DISP1_END_ADR(x) (((x) >> 4) & 0x7FF)180#define C_006520_DC_LB_DISP1_END_ADR 0xFFFF800F181#define R_006548_D1MODE_PRIORITY_A_CNT 0x006548182#define S_006548_D1MODE_PRIORITY_MARK_A(x) (((x) & 0x7FFF) << 0)183#define G_006548_D1MODE_PRIORITY_MARK_A(x) (((x) >> 0) & 0x7FFF)184#define C_006548_D1MODE_PRIORITY_MARK_A 0xFFFF8000185#define S_006548_D1MODE_PRIORITY_A_OFF(x) (((x) & 0x1) << 16)186#define G_006548_D1MODE_PRIORITY_A_OFF(x) (((x) >> 16) & 0x1)187#define C_006548_D1MODE_PRIORITY_A_OFF 0xFFFEFFFF188#define S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(x) (((x) & 0x1) << 20)189#define G_006548_D1MODE_PRIORITY_A_ALWAYS_ON(x) (((x) >> 20) & 0x1)190#define C_006548_D1MODE_PRIORITY_A_ALWAYS_ON 0xFFEFFFFF191#define S_006548_D1MODE_PRIORITY_A_FORCE_MASK(x) (((x) & 0x1) << 24)192#define G_006548_D1MODE_PRIORITY_A_FORCE_MASK(x) (((x) >> 24) & 0x1)193#define C_006548_D1MODE_PRIORITY_A_FORCE_MASK 0xFEFFFFFF194#define R_00654C_D1MODE_PRIORITY_B_CNT 0x00654C195#define S_00654C_D1MODE_PRIORITY_MARK_B(x) (((x) & 0x7FFF) << 0)196#define G_00654C_D1MODE_PRIORITY_MARK_B(x) (((x) >> 0) & 0x7FFF)197#define C_00654C_D1MODE_PRIORITY_MARK_B 0xFFFF8000198#define S_00654C_D1MODE_PRIORITY_B_OFF(x) (((x) & 0x1) << 16)199#define G_00654C_D1MODE_PRIORITY_B_OFF(x) (((x) >> 16) & 0x1)200#define C_00654C_D1MODE_PRIORITY_B_OFF 0xFFFEFFFF201#define S_00654C_D1MODE_PRIORITY_B_ALWAYS_ON(x) (((x) & 0x1) << 20)202#define G_00654C_D1MODE_PRIORITY_B_ALWAYS_ON(x) (((x) >> 20) & 0x1)203#define C_00654C_D1MODE_PRIORITY_B_ALWAYS_ON 0xFFEFFFFF204#define S_00654C_D1MODE_PRIORITY_B_FORCE_MASK(x) (((x) & 0x1) << 24)205#define G_00654C_D1MODE_PRIORITY_B_FORCE_MASK(x) (((x) >> 24) & 0x1)206#define C_00654C_D1MODE_PRIORITY_B_FORCE_MASK 0xFEFFFFFF207#define R_006C9C_DCP_CONTROL 0x006C9C208#define R_006D48_D2MODE_PRIORITY_A_CNT 0x006D48209#define S_006D48_D2MODE_PRIORITY_MARK_A(x) (((x) & 0x7FFF) << 0)210#define G_006D48_D2MODE_PRIORITY_MARK_A(x) (((x) >> 0) & 0x7FFF)211#define C_006D48_D2MODE_PRIORITY_MARK_A 0xFFFF8000212#define S_006D48_D2MODE_PRIORITY_A_OFF(x) (((x) & 0x1) << 16)213#define G_006D48_D2MODE_PRIORITY_A_OFF(x) (((x) >> 16) & 0x1)214#define C_006D48_D2MODE_PRIORITY_A_OFF 0xFFFEFFFF215#define S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(x) (((x) & 0x1) << 20)216#define G_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(x) (((x) >> 20) & 0x1)217#define C_006D48_D2MODE_PRIORITY_A_ALWAYS_ON 0xFFEFFFFF218#define S_006D48_D2MODE_PRIORITY_A_FORCE_MASK(x) (((x) & 0x1) << 24)219#define G_006D48_D2MODE_PRIORITY_A_FORCE_MASK(x) (((x) >> 24) & 0x1)220#define C_006D48_D2MODE_PRIORITY_A_FORCE_MASK 0xFEFFFFFF221#define R_006D4C_D2MODE_PRIORITY_B_CNT 0x006D4C222#define S_006D4C_D2MODE_PRIORITY_MARK_B(x) (((x) & 0x7FFF) << 0)223#define G_006D4C_D2MODE_PRIORITY_MARK_B(x) (((x) >> 0) & 0x7FFF)224#define C_006D4C_D2MODE_PRIORITY_MARK_B 0xFFFF8000225#define S_006D4C_D2MODE_PRIORITY_B_OFF(x) (((x) & 0x1) << 16)226#define G_006D4C_D2MODE_PRIORITY_B_OFF(x) (((x) >> 16) & 0x1)227#define C_006D4C_D2MODE_PRIORITY_B_OFF 0xFFFEFFFF228#define S_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON(x) (((x) & 0x1) << 20)229#define G_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON(x) (((x) >> 20) & 0x1)230#define C_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON 0xFFEFFFFF231#define S_006D4C_D2MODE_PRIORITY_B_FORCE_MASK(x) (((x) & 0x1) << 24)232#define G_006D4C_D2MODE_PRIORITY_B_FORCE_MASK(x) (((x) >> 24) & 0x1)233#define C_006D4C_D2MODE_PRIORITY_B_FORCE_MASK 0xFEFFFFFF234#define R_006D58_LB_MAX_REQ_OUTSTANDING 0x006D58235#define S_006D58_LB_D1_MAX_REQ_OUTSTANDING(x) (((x) & 0xF) << 0)236#define G_006D58_LB_D1_MAX_REQ_OUTSTANDING(x) (((x) >> 0) & 0xF)237#define C_006D58_LB_D1_MAX_REQ_OUTSTANDING 0xFFFFFFF0238#define S_006D58_LB_D2_MAX_REQ_OUTSTANDING(x) (((x) & 0xF) << 16)239#define G_006D58_LB_D2_MAX_REQ_OUTSTANDING(x) (((x) >> 16) & 0xF)240#define C_006D58_LB_D2_MAX_REQ_OUTSTANDING 0xFFF0FFFF241 242 243#define R_000090_MC_SYSTEM_STATUS 0x000090244#define S_000090_MC_SYSTEM_IDLE(x) (((x) & 0x1) << 0)245#define G_000090_MC_SYSTEM_IDLE(x) (((x) >> 0) & 0x1)246#define C_000090_MC_SYSTEM_IDLE 0xFFFFFFFE247#define S_000090_MC_SEQUENCER_IDLE(x) (((x) & 0x1) << 1)248#define G_000090_MC_SEQUENCER_IDLE(x) (((x) >> 1) & 0x1)249#define C_000090_MC_SEQUENCER_IDLE 0xFFFFFFFD250#define S_000090_MC_ARBITER_IDLE(x) (((x) & 0x1) << 2)251#define G_000090_MC_ARBITER_IDLE(x) (((x) >> 2) & 0x1)252#define C_000090_MC_ARBITER_IDLE 0xFFFFFFFB253#define S_000090_MC_SELECT_PM(x) (((x) & 0x1) << 3)254#define G_000090_MC_SELECT_PM(x) (((x) >> 3) & 0x1)255#define C_000090_MC_SELECT_PM 0xFFFFFFF7256#define S_000090_RESERVED4(x) (((x) & 0xF) << 4)257#define G_000090_RESERVED4(x) (((x) >> 4) & 0xF)258#define C_000090_RESERVED4 0xFFFFFF0F259#define S_000090_RESERVED8(x) (((x) & 0xF) << 8)260#define G_000090_RESERVED8(x) (((x) >> 8) & 0xF)261#define C_000090_RESERVED8 0xFFFFF0FF262#define S_000090_RESERVED12(x) (((x) & 0xF) << 12)263#define G_000090_RESERVED12(x) (((x) >> 12) & 0xF)264#define C_000090_RESERVED12 0xFFFF0FFF265#define S_000090_MCA_INIT_EXECUTED(x) (((x) & 0x1) << 16)266#define G_000090_MCA_INIT_EXECUTED(x) (((x) >> 16) & 0x1)267#define C_000090_MCA_INIT_EXECUTED 0xFFFEFFFF268#define S_000090_MCA_IDLE(x) (((x) & 0x1) << 17)269#define G_000090_MCA_IDLE(x) (((x) >> 17) & 0x1)270#define C_000090_MCA_IDLE 0xFFFDFFFF271#define S_000090_MCA_SEQ_IDLE(x) (((x) & 0x1) << 18)272#define G_000090_MCA_SEQ_IDLE(x) (((x) >> 18) & 0x1)273#define C_000090_MCA_SEQ_IDLE 0xFFFBFFFF274#define S_000090_MCA_ARB_IDLE(x) (((x) & 0x1) << 19)275#define G_000090_MCA_ARB_IDLE(x) (((x) >> 19) & 0x1)276#define C_000090_MCA_ARB_IDLE 0xFFF7FFFF277#define S_000090_RESERVED20(x) (((x) & 0xFFF) << 20)278#define G_000090_RESERVED20(x) (((x) >> 20) & 0xFFF)279#define C_000090_RESERVED20 0x000FFFFF280#define R_000100_MCCFG_FB_LOCATION 0x000100281#define S_000100_MC_FB_START(x) (((x) & 0xFFFF) << 0)282#define G_000100_MC_FB_START(x) (((x) >> 0) & 0xFFFF)283#define C_000100_MC_FB_START 0xFFFF0000284#define S_000100_MC_FB_TOP(x) (((x) & 0xFFFF) << 16)285#define G_000100_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF)286#define C_000100_MC_FB_TOP 0x0000FFFF287#define R_000104_MC_INIT_MISC_LAT_TIMER 0x000104288#define S_000104_MC_CPR_INIT_LAT(x) (((x) & 0xF) << 0)289#define G_000104_MC_CPR_INIT_LAT(x) (((x) >> 0) & 0xF)290#define C_000104_MC_CPR_INIT_LAT 0xFFFFFFF0291#define S_000104_MC_VF_INIT_LAT(x) (((x) & 0xF) << 4)292#define G_000104_MC_VF_INIT_LAT(x) (((x) >> 4) & 0xF)293#define C_000104_MC_VF_INIT_LAT 0xFFFFFF0F294#define S_000104_MC_DISP0R_INIT_LAT(x) (((x) & 0xF) << 8)295#define G_000104_MC_DISP0R_INIT_LAT(x) (((x) >> 8) & 0xF)296#define C_000104_MC_DISP0R_INIT_LAT 0xFFFFF0FF297#define S_000104_MC_DISP1R_INIT_LAT(x) (((x) & 0xF) << 12)298#define G_000104_MC_DISP1R_INIT_LAT(x) (((x) >> 12) & 0xF)299#define C_000104_MC_DISP1R_INIT_LAT 0xFFFF0FFF300#define S_000104_MC_FIXED_INIT_LAT(x) (((x) & 0xF) << 16)301#define G_000104_MC_FIXED_INIT_LAT(x) (((x) >> 16) & 0xF)302#define C_000104_MC_FIXED_INIT_LAT 0xFFF0FFFF303#define S_000104_MC_E2R_INIT_LAT(x) (((x) & 0xF) << 20)304#define G_000104_MC_E2R_INIT_LAT(x) (((x) >> 20) & 0xF)305#define C_000104_MC_E2R_INIT_LAT 0xFF0FFFFF306#define S_000104_SAME_PAGE_PRIO(x) (((x) & 0xF) << 24)307#define G_000104_SAME_PAGE_PRIO(x) (((x) >> 24) & 0xF)308#define C_000104_SAME_PAGE_PRIO 0xF0FFFFFF309#define S_000104_MC_GLOBW_INIT_LAT(x) (((x) & 0xF) << 28)310#define G_000104_MC_GLOBW_INIT_LAT(x) (((x) >> 28) & 0xF)311#define C_000104_MC_GLOBW_INIT_LAT 0x0FFFFFFF312 313#endif314