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1/*2 * Copyright 2011 Advanced Micro Devices, Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 */23#ifndef __RS780_DPM_H__24#define __RS780_DPM_H__25 26enum rs780_vddc_level {27 RS780_VDDC_LEVEL_UNKNOWN = 0,28 RS780_VDDC_LEVEL_LOW = 1,29 RS780_VDDC_LEVEL_HIGH = 2,30};31 32struct igp_power_info {33 /* flags */34 bool invert_pwm_required;35 bool pwm_voltage_control;36 bool voltage_control;37 bool gfx_clock_gating;38 /* stored values */39 u32 system_config;40 u32 bootup_uma_clk;41 u16 max_voltage;42 u16 min_voltage;43 u16 boot_voltage;44 u16 inter_voltage_low;45 u16 inter_voltage_high;46 u16 num_of_cycles_in_period;47 /* variable */48 int crtc_id;49 int refresh_rate;50};51 52struct igp_ps {53 enum rs780_vddc_level min_voltage;54 enum rs780_vddc_level max_voltage;55 u32 sclk_low;56 u32 sclk_high;57 u32 flags;58};59 60#define RS780_CGFTV_DFLT 0x0303000f61#define RS780_FBDIVTIMERVAL_DFLT 0x271062 63#define RS780_FVTHROTUTC0_DFLT 0x0401004064#define RS780_FVTHROTUTC1_DFLT 0x0401004065#define RS780_FVTHROTUTC2_DFLT 0x0401004066#define RS780_FVTHROTUTC3_DFLT 0x0401004067#define RS780_FVTHROTUTC4_DFLT 0x0401004068 69#define RS780_FVTHROTDTC0_DFLT 0x0401004070#define RS780_FVTHROTDTC1_DFLT 0x0401004071#define RS780_FVTHROTDTC2_DFLT 0x0401004072#define RS780_FVTHROTDTC3_DFLT 0x0401004073#define RS780_FVTHROTDTC4_DFLT 0x0401004074 75#define RS780_FVTHROTFBUSREG0_DFLT 0x0000100176#define RS780_FVTHROTFBUSREG1_DFLT 0x0000200277#define RS780_FVTHROTFBDSREG0_DFLT 0x0000400178#define RS780_FVTHROTFBDSREG1_DFLT 0x0002001079 80#define RS780_FVTHROTPWMUSREG0_DFLT 0x0000200181#define RS780_FVTHROTPWMUSREG1_DFLT 0x0000400382#define RS780_FVTHROTPWMDSREG0_DFLT 0x0000200183#define RS780_FVTHROTPWMDSREG1_DFLT 0x0000400384 85#define RS780_FVTHROTPWMFBDIVRANGEREG0_DFLT 0x3786#define RS780_FVTHROTPWMFBDIVRANGEREG1_DFLT 0x4b87#define RS780_FVTHROTPWMFBDIVRANGEREG2_DFLT 0x8b88 89#define RS780D_FVTHROTPWMFBDIVRANGEREG0_DFLT 0x8b90#define RS780D_FVTHROTPWMFBDIVRANGEREG1_DFLT 0x8c91#define RS780D_FVTHROTPWMFBDIVRANGEREG2_DFLT 0xb592 93#define RS880D_FVTHROTPWMFBDIVRANGEREG0_DFLT 0x8d94#define RS880D_FVTHROTPWMFBDIVRANGEREG1_DFLT 0x8e95#define RS880D_FVTHROTPWMFBDIVRANGEREG2_DFLT 0xBa96 97#define RS780_FVTHROTPWMRANGE0_GPIO_DFLT 0x1a98#define RS780_FVTHROTPWMRANGE1_GPIO_DFLT 0x1a99#define RS780_FVTHROTPWMRANGE2_GPIO_DFLT 0x0100#define RS780_FVTHROTPWMRANGE3_GPIO_DFLT 0x0101 102#define RS780_SLOWCLKFEEDBACKDIV_DFLT 110103 104#define RS780_CGCLKGATING_DFLT 0x0000E204105 106#define RS780_DEFAULT_VCLK_FREQ 53300 /* 10 khz */107#define RS780_DEFAULT_DCLK_FREQ 40000 /* 10 khz */108 109#endif110