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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd4 * Author:Mark Yao <mark.yao@rock-chips.com>5 *6 * based on exynos_drm_drv.h7 */8 9#ifndef _ROCKCHIP_DRM_DRV_H10#define _ROCKCHIP_DRM_DRV_H11 12#include <drm/drm_atomic_helper.h>13#include <drm/drm_gem.h>14 15#include <linux/bits.h>16#include <linux/component.h>17#include <linux/i2c.h>18#include <linux/module.h>19 20#define ROCKCHIP_MAX_FB_BUFFER 321#define ROCKCHIP_MAX_CONNECTOR 222#define ROCKCHIP_MAX_CRTC 423 24/*25 * display output interface supported by rockchip lcdc26 */27#define ROCKCHIP_OUT_MODE_P888 028#define ROCKCHIP_OUT_MODE_BT1120 029#define ROCKCHIP_OUT_MODE_P666 130#define ROCKCHIP_OUT_MODE_P565 231#define ROCKCHIP_OUT_MODE_BT656 532#define ROCKCHIP_OUT_MODE_S888 833#define ROCKCHIP_OUT_MODE_S888_DUMMY 1234#define ROCKCHIP_OUT_MODE_YUV420 1435/* for use special outface */36#define ROCKCHIP_OUT_MODE_AAAA 1537 38/* output flags */39#define ROCKCHIP_OUTPUT_DSI_DUAL BIT(0)40 41struct drm_device;42struct drm_connector;43struct iommu_domain;44 45struct rockchip_crtc_state {46 struct drm_crtc_state base;47 int output_type;48 int output_mode;49 int output_bpc;50 int output_flags;51 bool enable_afbc;52 bool yuv_overlay;53 u32 bus_format;54 u32 bus_flags;55 int color_space;56};57#define to_rockchip_crtc_state(s) \58 container_of(s, struct rockchip_crtc_state, base)59 60/*61 * Rockchip drm private structure.62 *63 * @crtc: array of enabled CRTCs, used to map from "pipe" to drm_crtc.64 * @num_pipe: number of pipes for this device.65 * @mm_lock: protect drm_mm on multi-threads.66 */67struct rockchip_drm_private {68 struct iommu_domain *domain;69 struct device *iommu_dev;70 struct mutex mm_lock;71 struct drm_mm mm;72};73 74struct rockchip_encoder {75 int crtc_endpoint_id;76 struct drm_encoder encoder;77};78 79int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,80 struct device *dev);81void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,82 struct device *dev);83void rockchip_drm_dma_init_device(struct drm_device *drm_dev,84 struct device *dev);85int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout);86int rockchip_drm_encoder_set_crtc_endpoint_id(struct rockchip_encoder *rencoder,87 struct device_node *np, int port, int reg);88int rockchip_drm_endpoint_is_subdriver(struct device_node *ep);89extern struct platform_driver cdn_dp_driver;90extern struct platform_driver dw_hdmi_rockchip_pltfm_driver;91extern struct platform_driver dw_mipi_dsi_rockchip_driver;92extern struct platform_driver inno_hdmi_driver;93extern struct platform_driver rockchip_dp_driver;94extern struct platform_driver rockchip_lvds_driver;95extern struct platform_driver vop_platform_driver;96extern struct platform_driver rk3066_hdmi_driver;97extern struct platform_driver vop2_platform_driver;98 99static inline struct rockchip_encoder *to_rockchip_encoder(struct drm_encoder *encoder)100{101 return container_of(encoder, struct rockchip_encoder, encoder);102}103 104#endif /* _ROCKCHIP_DRM_DRV_H_ */105