59 lines · plain
11. stiH display hardware IP2---------------------------3The STMicroelectronics stiH SoCs use a common chain of HW display IP blocks:4- The High Quality Video Display Processor (HQVDP) gets video frames from a5 video decoder and does high quality video processing, including scaling.6 7- The Compositor is a multiplane, dual-mixer (Main & Aux) digital processor. It8 has several inputs:9 - The graphics planes are internally processed by the Generic Display10 Pipeline (GDP).11 - The video plug (VID) connects to the HQVDP output.12 - The cursor handles ... a cursor.13- The TV OUT pre-formats (convert, clip, round) the compositor output data14- The HDMI / DVO / HD Analog / SD analog IP builds the video signals15 - DVO (Digital Video Output) handles a 24bits parallel signal16 - The HD analog signal is typically driven by a YCbCr cable, supporting up to17 1080i mode.18 - The SD analog signal is typically used for legacy TV19- The VTG (Video Timing Generators) build Vsync signals used by the other HW IP20Note that some stiH drivers support only a subset of thee HW IP.21 22 .-------------. .-----------. .-----------.23GPU >-------------+GDP Main | | +---+ HDMI +--> HDMI24GPU >-------------+GDP mixer+---+ | :===========:25GPU >-------------+Cursor | | +---+ DVO +--> 24b//26 ------- | COMPOSITOR | | TV OUT | :===========:27 | | | | | +---+ HD analog +--> YCbCr28Vid >--+ HQVDP +--+VID Aux +---+ | :===========:29dec | | | mixer| | +---+ SD analog +--> CVBS30 '-------' '-------------' '-----------' '-----------'31 .-----------.32 | main+--> Vsync33 | VTG |34 | aux+--> Vsync35 '-----------'36 372. DRM / HW mapping38-------------------39These IP are mapped to the DRM objects as following:40- The CRTCs are mapped to the Compositor Main and Aux Mixers41- The Framebuffers and planes are mapped to the Compositor GDP (non video42 buffers) and to HQVDP+VID (video buffers)43- The Cursor is mapped to the Compositor Cursor44- The Encoders are mapped to the TVOut45- The Bridges/Connectors are mapped to the HDMI / DVO / HD Analog / SD analog46 47FB & planes Cursor CRTC Encoders Bridges/Connectors48 | | | | |49 | | | | |50 | .-------------. | .-----------. .-----------. |51 +------------> |GDP | Main | | | +-> | | HDMI | <-+52 +------------> |GDP v mixer|<+ | | | :===========: |53 | |Cursor | | | +-> | | DVO | <-+54 | ------- | COMPOSITOR | | |TV OUT | | :===========: |55 | | | | | | | +-> | | HD analog | <-+56 +-> | HQVDP | |VID Aux |<+ | | | :===========: |57 | | | mixer| | +-> | | SD analog | <-+58 '-------' '-------------' '-----------' '-----------'59