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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 * Copyright (C) 2015 Free Electrons4 * Copyright (C) 2015 NextThing Co5 *6 * Maxime Ripard <maxime.ripard@free-electrons.com>7 */8 9#ifndef _SUN4I_BACKEND_H_10#define _SUN4I_BACKEND_H_11 12#include <linux/clk.h>13#include <linux/list.h>14#include <linux/of.h>15#include <linux/regmap.h>16#include <linux/reset.h>17 18#include "sunxi_engine.h"19 20#define SUN4I_BACKEND_MODCTL_REG 0x80021#define SUN4I_BACKEND_MODCTL_LINE_SEL BIT(29)22#define SUN4I_BACKEND_MODCTL_ITLMOD_EN BIT(28)23#define SUN4I_BACKEND_MODCTL_OUT_SEL GENMASK(22, 20)24#define SUN4I_BACKEND_MODCTL_OUT_LCD0 (0 << 20)25#define SUN4I_BACKEND_MODCTL_OUT_LCD1 (1 << 20)26#define SUN4I_BACKEND_MODCTL_OUT_FE0 (6 << 20)27#define SUN4I_BACKEND_MODCTL_OUT_FE1 (7 << 20)28#define SUN4I_BACKEND_MODCTL_HWC_EN BIT(16)29#define SUN4I_BACKEND_MODCTL_LAY_EN(l) BIT(8 + l)30#define SUN4I_BACKEND_MODCTL_OCSC_EN BIT(5)31#define SUN4I_BACKEND_MODCTL_DFLK_EN BIT(4)32#define SUN4I_BACKEND_MODCTL_DLP_START_CTL BIT(2)33#define SUN4I_BACKEND_MODCTL_START_CTL BIT(1)34#define SUN4I_BACKEND_MODCTL_DEBE_EN BIT(0)35 36#define SUN4I_BACKEND_BACKCOLOR_REG 0x80437#define SUN4I_BACKEND_BACKCOLOR(r, g, b) (((r) << 16) | ((g) << 8) | (b))38 39#define SUN4I_BACKEND_DISSIZE_REG 0x80840#define SUN4I_BACKEND_DISSIZE(w, h) (((((h) - 1) & 0xffff) << 16) | \41 (((w) - 1) & 0xffff))42 43#define SUN4I_BACKEND_LAYSIZE_REG(l) (0x810 + (0x4 * (l)))44#define SUN4I_BACKEND_LAYSIZE(w, h) (((((h) - 1) & 0x1fff) << 16) | \45 (((w) - 1) & 0x1fff))46 47#define SUN4I_BACKEND_LAYCOOR_REG(l) (0x820 + (0x4 * (l)))48#define SUN4I_BACKEND_LAYCOOR(x, y) ((((u32)(y) & 0xffff) << 16) | \49 ((u32)(x) & 0xffff))50 51#define SUN4I_BACKEND_LAYLINEWIDTH_REG(l) (0x840 + (0x4 * (l)))52 53#define SUN4I_BACKEND_LAYFB_L32ADD_REG(l) (0x850 + (0x4 * (l)))54 55#define SUN4I_BACKEND_LAYFB_H4ADD_REG 0x86056#define SUN4I_BACKEND_LAYFB_H4ADD_MSK(l) GENMASK(3 + ((l) * 8), (l) * 8)57#define SUN4I_BACKEND_LAYFB_H4ADD(l, val) ((val) << ((l) * 8))58 59#define SUN4I_BACKEND_REGBUFFCTL_REG 0x87060#define SUN4I_BACKEND_REGBUFFCTL_AUTOLOAD_DIS BIT(1)61#define SUN4I_BACKEND_REGBUFFCTL_LOADCTL BIT(0)62 63#define SUN4I_BACKEND_CKMAX_REG 0x88064#define SUN4I_BACKEND_CKMIN_REG 0x88465#define SUN4I_BACKEND_CKCFG_REG 0x88866#define SUN4I_BACKEND_ATTCTL_REG0(l) (0x890 + (0x4 * (l)))67#define SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA_MASK GENMASK(31, 24)68#define SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA(x) ((x) << 24)69#define SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL_MASK BIT(15)70#define SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL(x) ((x) << 15)71#define SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL_MASK GENMASK(11, 10)72#define SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL(x) ((x) << 10)73#define SUN4I_BACKEND_ATTCTL_REG0_LAY_YUVEN BIT(2)74#define SUN4I_BACKEND_ATTCTL_REG0_LAY_VDOEN BIT(1)75#define SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA_EN BIT(0)76 77#define SUN4I_BACKEND_ATTCTL_REG1(l) (0x8a0 + (0x4 * (l)))78#define SUN4I_BACKEND_ATTCTL_REG1_LAY_HSCAFCT GENMASK(15, 14)79#define SUN4I_BACKEND_ATTCTL_REG1_LAY_WSCAFCT GENMASK(13, 12)80#define SUN4I_BACKEND_ATTCTL_REG1_LAY_FBFMT GENMASK(11, 8)81#define SUN4I_BACKEND_LAY_FBFMT_1BPP (0 << 8)82#define SUN4I_BACKEND_LAY_FBFMT_2BPP (1 << 8)83#define SUN4I_BACKEND_LAY_FBFMT_4BPP (2 << 8)84#define SUN4I_BACKEND_LAY_FBFMT_8BPP (3 << 8)85#define SUN4I_BACKEND_LAY_FBFMT_RGB655 (4 << 8)86#define SUN4I_BACKEND_LAY_FBFMT_RGB565 (5 << 8)87#define SUN4I_BACKEND_LAY_FBFMT_RGB556 (6 << 8)88#define SUN4I_BACKEND_LAY_FBFMT_ARGB1555 (7 << 8)89#define SUN4I_BACKEND_LAY_FBFMT_RGBA5551 (8 << 8)90#define SUN4I_BACKEND_LAY_FBFMT_XRGB8888 (9 << 8)91#define SUN4I_BACKEND_LAY_FBFMT_ARGB8888 (10 << 8)92#define SUN4I_BACKEND_LAY_FBFMT_RGB888 (11 << 8)93#define SUN4I_BACKEND_LAY_FBFMT_ARGB4444 (12 << 8)94#define SUN4I_BACKEND_LAY_FBFMT_RGBA4444 (13 << 8)95 96#define SUN4I_BACKEND_DLCDPCTL_REG 0x8b097#define SUN4I_BACKEND_DLCDPFRMBUF_ADDRCTL_REG 0x8b498#define SUN4I_BACKEND_DLCDPCOOR_REG0 0x8b899#define SUN4I_BACKEND_DLCDPCOOR_REG1 0x8bc100 101#define SUN4I_BACKEND_INT_EN_REG 0x8c0102#define SUN4I_BACKEND_INT_FLAG_REG 0x8c4103#define SUN4I_BACKEND_REG_LOAD_FINISHED BIT(1)104 105#define SUN4I_BACKEND_HWCCTL_REG 0x8d8106#define SUN4I_BACKEND_HWCFBCTL_REG 0x8e0107#define SUN4I_BACKEND_WBCTL_REG 0x8f0108#define SUN4I_BACKEND_WBADD_REG 0x8f4109#define SUN4I_BACKEND_WBLINEWIDTH_REG 0x8f8110#define SUN4I_BACKEND_SPREN_REG 0x900111#define SUN4I_BACKEND_SPRFMTCTL_REG 0x908112#define SUN4I_BACKEND_SPRALPHACTL_REG 0x90c113 114#define SUN4I_BACKEND_IYUVCTL_REG 0x920115#define SUN4I_BACKEND_IYUVCTL_FBFMT_MASK GENMASK(14, 12)116#define SUN4I_BACKEND_IYUVCTL_FBFMT_PACKED_YUV444 (4 << 12)117#define SUN4I_BACKEND_IYUVCTL_FBFMT_PACKED_YUV422 (3 << 12)118#define SUN4I_BACKEND_IYUVCTL_FBFMT_PLANAR_YUV444 (2 << 12)119#define SUN4I_BACKEND_IYUVCTL_FBFMT_PLANAR_YUV222 (1 << 12)120#define SUN4I_BACKEND_IYUVCTL_FBFMT_PLANAR_YUV111 (0 << 12)121#define SUN4I_BACKEND_IYUVCTL_FBPS_MASK GENMASK(9, 8)122#define SUN4I_BACKEND_IYUVCTL_FBPS_YVYU (3 << 8)123#define SUN4I_BACKEND_IYUVCTL_FBPS_VYUY (2 << 8)124#define SUN4I_BACKEND_IYUVCTL_FBPS_YUYV (1 << 8)125#define SUN4I_BACKEND_IYUVCTL_FBPS_UYVY (0 << 8)126#define SUN4I_BACKEND_IYUVCTL_FBPS_VUYA (1 << 8)127#define SUN4I_BACKEND_IYUVCTL_FBPS_AYUV (0 << 8)128#define SUN4I_BACKEND_IYUVCTL_EN BIT(0)129 130#define SUN4I_BACKEND_IYUVADD_REG(c) (0x930 + (0x4 * (c)))131 132#define SUN4I_BACKEND_IYUVLINEWIDTH_REG(c) (0x940 + (0x4 * (c)))133 134#define SUN4I_BACKEND_YGCOEF_REG(c) (0x950 + (0x4 * (c)))135#define SUN4I_BACKEND_YGCONS_REG 0x95c136#define SUN4I_BACKEND_URCOEF_REG(c) (0x960 + (0x4 * (c)))137#define SUN4I_BACKEND_URCONS_REG 0x96c138#define SUN4I_BACKEND_VBCOEF_REG(c) (0x970 + (0x4 * (c)))139#define SUN4I_BACKEND_VBCONS_REG 0x97c140#define SUN4I_BACKEND_KSCTL_REG 0x980141#define SUN4I_BACKEND_KSBKCOLOR_REG 0x984142#define SUN4I_BACKEND_KSFSTLINEWIDTH_REG 0x988143#define SUN4I_BACKEND_KSVSCAFCT_REG 0x98c144#define SUN4I_BACKEND_KSHSCACOEF_REG(x) (0x9a0 + (0x4 * (x)))145#define SUN4I_BACKEND_OCCTL_REG 0x9c0146#define SUN4I_BACKEND_OCCTL_ENABLE BIT(0)147 148#define SUN4I_BACKEND_OCRCOEF_REG(x) (0x9d0 + (0x4 * (x)))149#define SUN4I_BACKEND_OCRCONS_REG 0x9dc150#define SUN4I_BACKEND_OCGCOEF_REG(x) (0x9e0 + (0x4 * (x)))151#define SUN4I_BACKEND_OCGCONS_REG 0x9ec152#define SUN4I_BACKEND_OCBCOEF_REG(x) (0x9f0 + (0x4 * (x)))153#define SUN4I_BACKEND_OCBCONS_REG 0x9fc154#define SUN4I_BACKEND_SPRCOORCTL_REG(s) (0xa00 + (0x4 * (s)))155#define SUN4I_BACKEND_SPRATTCTL_REG(s) (0xb00 + (0x4 * (s)))156#define SUN4I_BACKEND_SPRADD_REG(s) (0xc00 + (0x4 * (s)))157#define SUN4I_BACKEND_SPRLINEWIDTH_REG(s) (0xd00 + (0x4 * (s)))158 159#define SUN4I_BACKEND_SPRPALTAB_OFF 0x4000160#define SUN4I_BACKEND_GAMMATAB_OFF 0x4400161#define SUN4I_BACKEND_HWCPATTERN_OFF 0x4800162#define SUN4I_BACKEND_HWCCOLORTAB_OFF 0x4c00163#define SUN4I_BACKEND_PIPE_OFF(p) (0x5000 + (0x400 * (p)))164 165#define SUN4I_BACKEND_NUM_LAYERS 4166#define SUN4I_BACKEND_NUM_FRONTEND_LAYERS 1167#define SUN4I_BACKEND_NUM_YUV_PLANES 1168 169struct sun4i_backend {170 struct sunxi_engine engine;171 struct sun4i_frontend *frontend;172 173 struct reset_control *reset;174 175 struct clk *bus_clk;176 struct clk *mod_clk;177 struct clk *ram_clk;178 179 struct clk *sat_clk;180 struct reset_control *sat_reset;181 182 /* Protects against races in the frontend teardown */183 spinlock_t frontend_lock;184 bool frontend_teardown;185 186 const struct sun4i_backend_quirks *quirks;187};188 189static inline struct sun4i_backend *190engine_to_sun4i_backend(struct sunxi_engine *engine)191{192 return container_of(engine, struct sun4i_backend, engine);193}194 195void sun4i_backend_layer_enable(struct sun4i_backend *backend,196 int layer, bool enable);197bool sun4i_backend_format_is_supported(uint32_t fmt, uint64_t modifier);198int sun4i_backend_update_layer_coord(struct sun4i_backend *backend,199 int layer, struct drm_plane *plane);200int sun4i_backend_update_layer_formats(struct sun4i_backend *backend,201 int layer, struct drm_plane *plane);202int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend,203 int layer, struct drm_plane *plane);204int sun4i_backend_update_layer_frontend(struct sun4i_backend *backend,205 int layer, uint32_t in_fmt);206int sun4i_backend_update_layer_zpos(struct sun4i_backend *backend,207 int layer, struct drm_plane *plane);208void sun4i_backend_cleanup_layer(struct sun4i_backend *backend,209 int layer);210 211#endif /* _SUN4I_BACKEND_H_ */212