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1/* SPDX-License-Identifier: GPL-2.0 OR MIT */2/**************************************************************************3 *4 * Copyright (c) 2009-2024 Broadcom. All Rights Reserved. The term5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.6 *7 * Permission is hereby granted, free of charge, to any person obtaining a8 * copy of this software and associated documentation files (the9 * "Software"), to deal in the Software without restriction, including10 * without limitation the rights to use, copy, modify, merge, publish,11 * distribute, sub license, and/or sell copies of the Software, and to12 * permit persons to whom the Software is furnished to do so, subject to13 * the following conditions:14 *15 * The above copyright notice and this permission notice (including the16 * next paragraph) shall be included in all copies or substantial portions17 * of the Software.18 *19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,21 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL22 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,23 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR24 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE25 * USE OR OTHER DEALINGS IN THE SOFTWARE.26 *27 **************************************************************************/28 29#ifndef _VMWGFX_DRV_H_30#define _VMWGFX_DRV_H_31 32#include <linux/suspend.h>33#include <linux/sync_file.h>34#include <linux/hashtable.h>35 36#include <drm/drm_auth.h>37#include <drm/drm_device.h>38#include <drm/drm_file.h>39#include <drm/drm_rect.h>40 41#include <drm/ttm/ttm_execbuf_util.h>42#include <drm/ttm/ttm_tt.h>43#include <drm/ttm/ttm_placement.h>44#include <drm/ttm/ttm_bo.h>45 46#include "ttm_object.h"47 48#include "vmwgfx_fence.h"49#include "vmwgfx_reg.h"50#include "vmwgfx_validation.h"51 52/*53 * FIXME: vmwgfx_drm.h needs to be last due to dependencies.54 * uapi headers should not depend on header files outside uapi/.55 */56#include <drm/vmwgfx_drm.h>57 58 59#define VMWGFX_DRIVER_NAME "vmwgfx"60#define VMWGFX_DRIVER_DATE "20211206"61#define VMWGFX_DRIVER_MAJOR 262#define VMWGFX_DRIVER_MINOR 2063#define VMWGFX_DRIVER_PATCHLEVEL 064#define VMWGFX_FIFO_STATIC_SIZE (1024*1024)65#define VMWGFX_NUM_DISPLAY_UNITS 866#define VMWGFX_CMD_BOUNCE_INIT_SIZE 3276867 68#define VMWGFX_MIN_INITIAL_WIDTH 128069#define VMWGFX_MIN_INITIAL_HEIGHT 80070 71#define VMWGFX_PCI_ID_SVGA2 0x040572#define VMWGFX_PCI_ID_SVGA3 0x040673 74/*75 * This has to match get_count_order(SVGA_IRQFLAG_MAX)76 */77#define VMWGFX_MAX_NUM_IRQS 678 79/*80 * Perhaps we should have sysfs entries for these.81 */82#define VMWGFX_NUM_GB_CONTEXT 25683#define VMWGFX_NUM_GB_SHADER 2000084#define VMWGFX_NUM_GB_SURFACE 3276885#define VMWGFX_NUM_GB_SCREEN_TARGET VMWGFX_NUM_DISPLAY_UNITS86#define VMWGFX_NUM_DXCONTEXT 25687#define VMWGFX_NUM_DXQUERY 51288#define VMWGFX_NUM_MOB (VMWGFX_NUM_GB_CONTEXT +\89 VMWGFX_NUM_GB_SHADER +\90 VMWGFX_NUM_GB_SURFACE +\91 VMWGFX_NUM_GB_SCREEN_TARGET)92 93#define VMW_PL_GMR (TTM_PL_PRIV + 0)94#define VMW_PL_MOB (TTM_PL_PRIV + 1)95#define VMW_PL_SYSTEM (TTM_PL_PRIV + 2)96 97#define VMW_RES_CONTEXT ttm_driver_type098#define VMW_RES_SURFACE ttm_driver_type199#define VMW_RES_STREAM ttm_driver_type2100#define VMW_RES_FENCE ttm_driver_type3101#define VMW_RES_SHADER ttm_driver_type4102#define VMW_RES_HT_ORDER 12103 104#define VMW_CURSOR_SNOOP_FORMAT SVGA3D_A8R8G8B8105#define VMW_CURSOR_SNOOP_WIDTH 64106#define VMW_CURSOR_SNOOP_HEIGHT 64107 108#define MKSSTAT_CAPACITY_LOG2 5U109#define MKSSTAT_CAPACITY (1U << MKSSTAT_CAPACITY_LOG2)110 111struct vmw_fpriv {112 struct ttm_object_file *tfile;113 bool gb_aware; /* user-space is guest-backed aware */114};115 116struct vmwgfx_hash_item {117 struct hlist_node head;118 unsigned long key;119};120 121struct vmw_res_func;122 123/**124 * struct vmw-resource - base class for hardware resources125 *126 * @kref: For refcounting.127 * @dev_priv: Pointer to the device private for this resource. Immutable.128 * @id: Device id. Protected by @dev_priv::resource_lock.129 * @guest_memory_size: Guest memory buffer size. Immutable.130 * @res_dirty: Resource contains data not yet in the guest memory buffer.131 * Protected by resource reserved.132 * @guest_memory_dirty: Guest memory buffer contains data not yet in the HW133 * resource. Protected by resource reserved.134 * @coherent: Emulate coherency by tracking vm accesses.135 * @guest_memory_bo: The guest memory buffer if any. Protected by resource136 * reserved.137 * @guest_memory_offset: Offset into the guest memory buffer if any. Protected138 * by resource reserved. Note that only a few resource types can have a139 * @guest_memory_offset different from zero.140 * @pin_count: The pin count for this resource. A pinned resource has a141 * pin-count greater than zero. It is not on the resource LRU lists and its142 * guest memory buffer is pinned. Hence it can't be evicted.143 * @func: Method vtable for this resource. Immutable.144 * @mob_node; Node for the MOB guest memory rbtree. Protected by145 * @guest_memory_bo reserved.146 * @lru_head: List head for the LRU list. Protected by @dev_priv::resource_lock.147 * @binding_head: List head for the context binding list. Protected by148 * the @dev_priv::binding_mutex149 * @res_free: The resource destructor.150 * @hw_destroy: Callback to destroy the resource on the device, as part of151 * resource destruction.152 */153struct vmw_bo;154struct vmw_bo;155struct vmw_resource_dirty;156struct vmw_resource {157 struct kref kref;158 struct vmw_private *dev_priv;159 int id;160 u32 used_prio;161 unsigned long guest_memory_size;162 u32 res_dirty : 1;163 u32 guest_memory_dirty : 1;164 u32 coherent : 1;165 struct vmw_bo *guest_memory_bo;166 unsigned long guest_memory_offset;167 unsigned long pin_count;168 const struct vmw_res_func *func;169 struct rb_node mob_node;170 struct list_head lru_head;171 struct list_head binding_head;172 struct vmw_resource_dirty *dirty;173 void (*res_free) (struct vmw_resource *res);174 void (*hw_destroy) (struct vmw_resource *res);175};176 177 178/*179 * Resources that are managed using ioctls.180 */181enum vmw_res_type {182 vmw_res_context,183 vmw_res_surface,184 vmw_res_stream,185 vmw_res_shader,186 vmw_res_dx_context,187 vmw_res_cotable,188 vmw_res_view,189 vmw_res_streamoutput,190 vmw_res_max191};192 193/*194 * Resources that are managed using command streams.195 */196enum vmw_cmdbuf_res_type {197 vmw_cmdbuf_res_shader,198 vmw_cmdbuf_res_view,199 vmw_cmdbuf_res_streamoutput200};201 202struct vmw_cmdbuf_res_manager;203 204struct vmw_cursor_snooper {205 size_t age;206 uint32_t *image;207};208 209struct vmw_framebuffer;210struct vmw_surface_offset;211 212/**213 * struct vmw_surface_metadata - Metadata describing a surface.214 *215 * @flags: Device flags.216 * @format: Surface SVGA3D_x format.217 * @mip_levels: Mip level for each face. For GB first index is used only.218 * @multisample_count: Sample count.219 * @multisample_pattern: Sample patterns.220 * @quality_level: Quality level.221 * @autogen_filter: Filter for automatically generated mipmaps.222 * @array_size: Number of array elements for a 1D/2D texture. For cubemap223 texture number of faces * array_size. This should be 0 for pre224 SM4 device.225 * @buffer_byte_stride: Buffer byte stride.226 * @num_sizes: Size of @sizes. For GB surface this should always be 1.227 * @base_size: Surface dimension.228 * @sizes: Array representing mip sizes. Legacy only.229 * @scanout: Whether this surface will be used for scanout.230 *231 * This tracks metadata for both legacy and guest backed surface.232 */233struct vmw_surface_metadata {234 u64 flags;235 u32 format;236 u32 mip_levels[DRM_VMW_MAX_SURFACE_FACES];237 u32 multisample_count;238 u32 multisample_pattern;239 u32 quality_level;240 u32 autogen_filter;241 u32 array_size;242 u32 num_sizes;243 u32 buffer_byte_stride;244 struct drm_vmw_size base_size;245 struct drm_vmw_size *sizes;246 bool scanout;247};248 249/**250 * struct vmw_surface: Resource structure for a surface.251 *252 * @res: The base resource for this surface.253 * @metadata: Metadata for this surface resource.254 * @snooper: Cursor data. Legacy surface only.255 * @offsets: Legacy surface only.256 * @view_list: List of views bound to this surface.257 */258struct vmw_surface {259 struct vmw_resource res;260 struct vmw_surface_metadata metadata;261 struct vmw_cursor_snooper snooper;262 struct vmw_surface_offset *offsets;263 struct list_head view_list;264};265 266struct vmw_fifo_state {267 unsigned long reserved_size;268 u32 *dynamic_buffer;269 u32 *static_buffer;270 unsigned long static_buffer_size;271 bool using_bounce_buffer;272 uint32_t capabilities;273 struct mutex fifo_mutex;274 struct rw_semaphore rwsem;275};276 277/**278 * struct vmw_res_cache_entry - resource information cache entry279 * @handle: User-space handle of a resource.280 * @res: Non-ref-counted pointer to the resource.281 * @valid_handle: Whether the @handle member is valid.282 * @valid: Whether the entry is valid, which also implies that the execbuf283 * code holds a reference to the resource, and it's placed on the284 * validation list.285 *286 * Used to avoid frequent repeated user-space handle lookups of the287 * same resource.288 */289struct vmw_res_cache_entry {290 uint32_t handle;291 struct vmw_resource *res;292 void *private;293 unsigned short valid_handle;294 unsigned short valid;295};296 297/**298 * enum vmw_dma_map_mode - indicate how to perform TTM page dma mappings.299 */300enum vmw_dma_map_mode {301 vmw_dma_alloc_coherent, /* Use TTM coherent pages */302 vmw_dma_map_populate, /* Unmap from DMA just after unpopulate */303 vmw_dma_map_bind, /* Unmap from DMA just before unbind */304 vmw_dma_map_max305};306 307/**308 * struct vmw_sg_table - Scatter/gather table for binding, with additional309 * device-specific information.310 *311 * @sgt: Pointer to a struct sg_table with binding information312 * @num_regions: Number of regions with device-address contiguous pages313 */314struct vmw_sg_table {315 enum vmw_dma_map_mode mode;316 struct page **pages;317 const dma_addr_t *addrs;318 struct sg_table *sgt;319 unsigned long num_pages;320};321 322/**323 * struct vmw_piter - Page iterator that iterates over a list of pages324 * and DMA addresses that could be either a scatter-gather list or325 * arrays326 *327 * @pages: Array of page pointers to the pages.328 * @addrs: DMA addresses to the pages if coherent pages are used.329 * @iter: Scatter-gather page iterator. Current position in SG list.330 * @i: Current position in arrays.331 * @num_pages: Number of pages total.332 * @next: Function to advance the iterator. Returns false if past the list333 * of pages, true otherwise.334 * @dma_address: Function to return the DMA address of the current page.335 */336struct vmw_piter {337 struct page **pages;338 const dma_addr_t *addrs;339 struct sg_dma_page_iter iter;340 unsigned long i;341 unsigned long num_pages;342 bool (*next)(struct vmw_piter *);343 dma_addr_t (*dma_address)(struct vmw_piter *);344};345 346 347struct vmw_ttm_tt {348 struct ttm_tt dma_ttm;349 struct vmw_private *dev_priv;350 int gmr_id;351 struct vmw_mob *mob;352 int mem_type;353 struct sg_table sgt;354 struct vmw_sg_table vsgt;355 bool mapped;356 bool bound;357};358 359/*360 * enum vmw_display_unit_type - Describes the display unit361 */362enum vmw_display_unit_type {363 vmw_du_invalid = 0,364 vmw_du_legacy,365 vmw_du_screen_object,366 vmw_du_screen_target,367 vmw_du_max368};369 370struct vmw_validation_context;371struct vmw_ctx_validation_info;372 373/**374 * struct vmw_sw_context - Command submission context375 * @res_ht: Pointer hash table used to find validation duplicates376 * @kernel: Whether the command buffer originates from kernel code rather377 * than from user-space378 * @fp: If @kernel is false, points to the file of the client. Otherwise379 * NULL380 * @cmd_bounce: Command bounce buffer used for command validation before381 * copying to fifo space382 * @cmd_bounce_size: Current command bounce buffer size383 * @cur_query_bo: Current buffer object used as query result buffer384 * @bo_relocations: List of buffer object relocations385 * @res_relocations: List of resource relocations386 * @buf_start: Pointer to start of memory where command validation takes387 * place388 * @res_cache: Cache of recently looked up resources389 * @last_query_ctx: Last context that submitted a query390 * @needs_post_query_barrier: Whether a query barrier is needed after391 * command submission392 * @staged_bindings: Cached per-context binding tracker393 * @staged_bindings_inuse: Whether the cached per-context binding tracker394 * is in use395 * @staged_cmd_res: List of staged command buffer managed resources in this396 * command buffer397 * @ctx_list: List of context resources referenced in this command buffer398 * @dx_ctx_node: Validation metadata of the current DX context399 * @dx_query_mob: The MOB used for DX queries400 * @dx_query_ctx: The DX context used for the last DX query401 * @man: Pointer to the command buffer managed resource manager402 * @ctx: The validation context403 */404struct vmw_sw_context{405 DECLARE_HASHTABLE(res_ht, VMW_RES_HT_ORDER);406 bool kernel;407 struct vmw_fpriv *fp;408 struct drm_file *filp;409 uint32_t *cmd_bounce;410 uint32_t cmd_bounce_size;411 struct vmw_bo *cur_query_bo;412 struct list_head bo_relocations;413 struct list_head res_relocations;414 uint32_t *buf_start;415 struct vmw_res_cache_entry res_cache[vmw_res_max];416 struct vmw_resource *last_query_ctx;417 bool needs_post_query_barrier;418 struct vmw_ctx_binding_state *staged_bindings;419 bool staged_bindings_inuse;420 struct list_head staged_cmd_res;421 struct list_head ctx_list;422 struct vmw_ctx_validation_info *dx_ctx_node;423 struct vmw_bo *dx_query_mob;424 struct vmw_resource *dx_query_ctx;425 struct vmw_cmdbuf_res_manager *man;426 struct vmw_validation_context *ctx;427};428 429struct vmw_legacy_display;430struct vmw_overlay;431 432/*433 * struct vmw_otable - Guest Memory OBject table metadata434 *435 * @size: Size of the table (page-aligned).436 * @page_table: Pointer to a struct vmw_mob holding the page table.437 */438struct vmw_otable {439 unsigned long size;440 struct vmw_mob *page_table;441 bool enabled;442};443 444struct vmw_otable_batch {445 unsigned num_otables;446 struct vmw_otable *otables;447 struct vmw_resource *context;448 struct vmw_bo *otable_bo;449};450 451enum {452 VMW_IRQTHREAD_FENCE,453 VMW_IRQTHREAD_CMDBUF,454 VMW_IRQTHREAD_MAX455};456 457/**458 * enum vmw_sm_type - Graphics context capability supported by device.459 * @VMW_SM_LEGACY: Pre DX context.460 * @VMW_SM_4: Context support upto SM4.461 * @VMW_SM_4_1: Context support upto SM4_1.462 * @VMW_SM_5: Context support up to SM5.463 * @VMW_SM_5_1X: Adds support for sm5_1 and gl43 extensions.464 * @VMW_SM_MAX: Should be the last.465 */466enum vmw_sm_type {467 VMW_SM_LEGACY = 0,468 VMW_SM_4,469 VMW_SM_4_1,470 VMW_SM_5,471 VMW_SM_5_1X,472 VMW_SM_MAX473};474 475struct vmw_private {476 struct drm_device drm;477 struct ttm_device bdev;478 479 u32 pci_id;480 resource_size_t io_start;481 resource_size_t vram_start;482 resource_size_t vram_size;483 resource_size_t max_primary_mem;484 u32 __iomem *rmmio;485 u32 *fifo_mem;486 resource_size_t fifo_mem_size;487 uint32_t fb_max_width;488 uint32_t fb_max_height;489 uint32_t texture_max_width;490 uint32_t texture_max_height;491 uint32_t stdu_max_width;492 uint32_t stdu_max_height;493 uint32_t initial_width;494 uint32_t initial_height;495 uint32_t capabilities;496 uint32_t capabilities2;497 uint32_t max_gmr_ids;498 uint32_t max_gmr_pages;499 uint32_t max_mob_pages;500 uint32_t max_mob_size;501 uint32_t memory_size;502 bool has_gmr;503 bool has_mob;504 spinlock_t hw_lock;505 bool assume_16bpp;506 u32 irqs[VMWGFX_MAX_NUM_IRQS];507 u32 num_irq_vectors;508 509 enum vmw_sm_type sm_type;510 511 /*512 * Framebuffer info.513 */514 515 enum vmw_display_unit_type active_display_unit;516 struct vmw_legacy_display *ldu_priv;517 struct vmw_overlay *overlay_priv;518 struct drm_property *hotplug_mode_update_property;519 struct drm_property *implicit_placement_property;520 spinlock_t cursor_lock;521 struct drm_atomic_state *suspend_state;522 523 /*524 * Context and surface management.525 */526 527 spinlock_t resource_lock;528 struct idr res_idr[vmw_res_max];529 530 /*531 * A resource manager for kernel-only surfaces and532 * contexts.533 */534 535 struct ttm_object_device *tdev;536 537 /*538 * Fencing and IRQs.539 */540 541 atomic_t marker_seq;542 wait_queue_head_t fence_queue;543 wait_queue_head_t fifo_queue;544 spinlock_t waiter_lock;545 int fence_queue_waiters; /* Protected by waiter_lock */546 int goal_queue_waiters; /* Protected by waiter_lock */547 int cmdbuf_waiters; /* Protected by waiter_lock */548 int error_waiters; /* Protected by waiter_lock */549 int fifo_queue_waiters; /* Protected by waiter_lock */550 uint32_t last_read_seqno;551 struct vmw_fence_manager *fman;552 uint32_t irq_mask; /* Updates protected by waiter_lock */553 554 /*555 * Device state556 */557 558 uint32_t traces_state;559 uint32_t enable_state;560 uint32_t config_done_state;561 562 /**563 * Execbuf564 */565 /**566 * Protected by the cmdbuf mutex.567 */568 569 struct vmw_sw_context ctx;570 struct mutex cmdbuf_mutex;571 struct mutex binding_mutex;572 573 /**574 * PM management.575 */576 struct notifier_block pm_nb;577 bool refuse_hibernation;578 bool suspend_locked;579 580 atomic_t num_fifo_resources;581 582 /*583 * Query processing. These members584 * are protected by the cmdbuf mutex.585 */586 587 struct vmw_bo *dummy_query_bo;588 struct vmw_bo *pinned_bo;589 uint32_t query_cid;590 uint32_t query_cid_valid;591 bool dummy_query_bo_pinned;592 593 /*594 * Surface swapping. The "surface_lru" list is protected by the595 * resource lock in order to be able to destroy a surface and take596 * it off the lru atomically. "used_memory_size" is currently597 * protected by the cmdbuf mutex for simplicity.598 */599 600 struct list_head res_lru[vmw_res_max];601 uint32_t used_memory_size;602 603 /*604 * DMA mapping stuff.605 */606 enum vmw_dma_map_mode map_mode;607 608 /*609 * Guest Backed stuff610 */611 struct vmw_otable_batch otable_batch;612 613 struct vmw_fifo_state *fifo;614 struct vmw_cmdbuf_man *cman;615 DECLARE_BITMAP(irqthread_pending, VMW_IRQTHREAD_MAX);616 617 uint32 *devcaps;618 619 bool vkms_enabled;620 struct workqueue_struct *crc_workq;621 622 /*623 * mksGuestStat instance-descriptor and pid arrays624 */625 struct page *mksstat_user_pages[MKSSTAT_CAPACITY];626 atomic_t mksstat_user_pids[MKSSTAT_CAPACITY];627 628#if IS_ENABLED(CONFIG_DRM_VMWGFX_MKSSTATS)629 struct page *mksstat_kern_pages[MKSSTAT_CAPACITY];630 u8 mksstat_kern_top_timer[MKSSTAT_CAPACITY];631 atomic_t mksstat_kern_pids[MKSSTAT_CAPACITY];632#endif633};634 635static inline struct vmw_surface *vmw_res_to_srf(struct vmw_resource *res)636{637 return container_of(res, struct vmw_surface, res);638}639 640static inline struct vmw_private *vmw_priv(struct drm_device *dev)641{642 return (struct vmw_private *)dev->dev_private;643}644 645static inline struct vmw_private *vmw_priv_from_ttm(struct ttm_device *bdev)646{647 return container_of(bdev, struct vmw_private, bdev);648}649 650static inline struct vmw_fpriv *vmw_fpriv(struct drm_file *file_priv)651{652 return (struct vmw_fpriv *)file_priv->driver_priv;653}654 655/*656 * SVGA v3 has mmio register access and lacks fifo cmds657 */658static inline bool vmw_is_svga_v3(const struct vmw_private *dev)659{660 return dev->pci_id == VMWGFX_PCI_ID_SVGA3;661}662 663/*664 * The locking here is fine-grained, so that it is performed once665 * for every read- and write operation. This is of course costly, but we666 * don't perform much register access in the timing critical paths anyway.667 * Instead we have the extra benefit of being sure that we don't forget668 * the hw lock around register accesses.669 */670static inline void vmw_write(struct vmw_private *dev_priv,671 unsigned int offset, uint32_t value)672{673 if (vmw_is_svga_v3(dev_priv)) {674 iowrite32(value, dev_priv->rmmio + offset);675 } else {676 spin_lock(&dev_priv->hw_lock);677 outl(offset, dev_priv->io_start + SVGA_INDEX_PORT);678 outl(value, dev_priv->io_start + SVGA_VALUE_PORT);679 spin_unlock(&dev_priv->hw_lock);680 }681}682 683static inline uint32_t vmw_read(struct vmw_private *dev_priv,684 unsigned int offset)685{686 u32 val;687 688 if (vmw_is_svga_v3(dev_priv)) {689 val = ioread32(dev_priv->rmmio + offset);690 } else {691 spin_lock(&dev_priv->hw_lock);692 outl(offset, dev_priv->io_start + SVGA_INDEX_PORT);693 val = inl(dev_priv->io_start + SVGA_VALUE_PORT);694 spin_unlock(&dev_priv->hw_lock);695 }696 697 return val;698}699 700/**701 * has_sm4_context - Does the device support SM4 context.702 * @dev_priv: Device private.703 *704 * Return: Bool value if device support SM4 context or not.705 */706static inline bool has_sm4_context(const struct vmw_private *dev_priv)707{708 return (dev_priv->sm_type >= VMW_SM_4);709}710 711/**712 * has_sm4_1_context - Does the device support SM4_1 context.713 * @dev_priv: Device private.714 *715 * Return: Bool value if device support SM4_1 context or not.716 */717static inline bool has_sm4_1_context(const struct vmw_private *dev_priv)718{719 return (dev_priv->sm_type >= VMW_SM_4_1);720}721 722/**723 * has_sm5_context - Does the device support SM5 context.724 * @dev_priv: Device private.725 *726 * Return: Bool value if device support SM5 context or not.727 */728static inline bool has_sm5_context(const struct vmw_private *dev_priv)729{730 return (dev_priv->sm_type >= VMW_SM_5);731}732 733/**734 * has_gl43_context - Does the device support GL43 context.735 * @dev_priv: Device private.736 *737 * Return: Bool value if device support SM5 context or not.738 */739static inline bool has_gl43_context(const struct vmw_private *dev_priv)740{741 return (dev_priv->sm_type >= VMW_SM_5_1X);742}743 744 745static inline u32 vmw_max_num_uavs(struct vmw_private *dev_priv)746{747 return (has_gl43_context(dev_priv) ?748 SVGA3D_DX11_1_MAX_UAVIEWS : SVGA3D_MAX_UAVIEWS);749}750 751extern void vmw_svga_enable(struct vmw_private *dev_priv);752extern void vmw_svga_disable(struct vmw_private *dev_priv);753bool vmwgfx_supported(struct vmw_private *vmw);754 755 756/**757 * GMR utilities - vmwgfx_gmr.c758 */759 760extern int vmw_gmr_bind(struct vmw_private *dev_priv,761 const struct vmw_sg_table *vsgt,762 unsigned long num_pages,763 int gmr_id);764extern void vmw_gmr_unbind(struct vmw_private *dev_priv, int gmr_id);765 766/**767 * User handles768 */769struct vmw_user_object {770 struct vmw_surface *surface;771 struct vmw_bo *buffer;772};773 774int vmw_user_object_lookup(struct vmw_private *dev_priv, struct drm_file *filp,775 u32 handle, struct vmw_user_object *uo);776struct vmw_user_object *vmw_user_object_ref(struct vmw_user_object *uo);777void vmw_user_object_unref(struct vmw_user_object *uo);778bool vmw_user_object_is_null(struct vmw_user_object *uo);779struct vmw_surface *vmw_user_object_surface(struct vmw_user_object *uo);780struct vmw_bo *vmw_user_object_buffer(struct vmw_user_object *uo);781void *vmw_user_object_map(struct vmw_user_object *uo);782void *vmw_user_object_map_size(struct vmw_user_object *uo, size_t size);783void vmw_user_object_unmap(struct vmw_user_object *uo);784bool vmw_user_object_is_mapped(struct vmw_user_object *uo);785 786/**787 * Resource utilities - vmwgfx_resource.c788 */789struct vmw_user_resource_conv;790 791extern void vmw_resource_unreference(struct vmw_resource **p_res);792extern struct vmw_resource *vmw_resource_reference(struct vmw_resource *res);793extern struct vmw_resource *794vmw_resource_reference_unless_doomed(struct vmw_resource *res);795extern int vmw_resource_validate(struct vmw_resource *res, bool intr,796 bool dirtying);797extern int vmw_resource_reserve(struct vmw_resource *res, bool interruptible,798 bool no_backup);799extern bool vmw_resource_needs_backup(const struct vmw_resource *res);800extern int vmw_user_resource_lookup_handle(801 struct vmw_private *dev_priv,802 struct ttm_object_file *tfile,803 uint32_t handle,804 const struct vmw_user_resource_conv *converter,805 struct vmw_resource **p_res);806 807extern int vmw_stream_claim_ioctl(struct drm_device *dev, void *data,808 struct drm_file *file_priv);809extern int vmw_stream_unref_ioctl(struct drm_device *dev, void *data,810 struct drm_file *file_priv);811extern int vmw_user_stream_lookup(struct vmw_private *dev_priv,812 struct ttm_object_file *tfile,813 uint32_t *inout_id,814 struct vmw_resource **out);815extern void vmw_resource_unreserve(struct vmw_resource *res,816 bool dirty_set,817 bool dirty,818 bool switch_guest_memory,819 struct vmw_bo *new_guest_memory,820 unsigned long new_guest_memory_offset);821extern void vmw_query_move_notify(struct ttm_buffer_object *bo,822 struct ttm_resource *old_mem,823 struct ttm_resource *new_mem);824int vmw_query_readback_all(struct vmw_bo *dx_query_mob);825void vmw_resource_evict_all(struct vmw_private *dev_priv);826void vmw_resource_unbind_list(struct vmw_bo *vbo);827void vmw_resource_mob_attach(struct vmw_resource *res);828void vmw_resource_mob_detach(struct vmw_resource *res);829void vmw_resource_dirty_update(struct vmw_resource *res, pgoff_t start,830 pgoff_t end);831int vmw_resource_clean(struct vmw_resource *res);832int vmw_resources_clean(struct vmw_bo *vbo, pgoff_t start,833 pgoff_t end, pgoff_t *num_prefault);834 835/**836 * vmw_resource_mob_attached - Whether a resource currently has a mob attached837 * @res: The resource838 *839 * Return: true if the resource has a mob attached, false otherwise.840 */841static inline bool vmw_resource_mob_attached(const struct vmw_resource *res)842{843 return !RB_EMPTY_NODE(&res->mob_node);844}845 846/**847 * GEM related functionality - vmwgfx_gem.c848 */849struct vmw_bo_params;850int vmw_gem_object_create(struct vmw_private *vmw,851 struct vmw_bo_params *params,852 struct vmw_bo **p_vbo);853extern int vmw_gem_object_create_with_handle(struct vmw_private *dev_priv,854 struct drm_file *filp,855 uint32_t size,856 uint32_t *handle,857 struct vmw_bo **p_vbo);858extern int vmw_gem_object_create_ioctl(struct drm_device *dev, void *data,859 struct drm_file *filp);860extern void vmw_debugfs_gem_init(struct vmw_private *vdev);861 862/**863 * Misc Ioctl functionality - vmwgfx_ioctl.c864 */865 866extern int vmw_getparam_ioctl(struct drm_device *dev, void *data,867 struct drm_file *file_priv);868extern int vmw_get_cap_3d_ioctl(struct drm_device *dev, void *data,869 struct drm_file *file_priv);870extern int vmw_present_ioctl(struct drm_device *dev, void *data,871 struct drm_file *file_priv);872extern int vmw_present_readback_ioctl(struct drm_device *dev, void *data,873 struct drm_file *file_priv);874 875/**876 * Fifo utilities - vmwgfx_fifo.c877 */878 879extern struct vmw_fifo_state *vmw_fifo_create(struct vmw_private *dev_priv);880extern void vmw_fifo_destroy(struct vmw_private *dev_priv);881extern bool vmw_cmd_supported(struct vmw_private *vmw);882extern void *883vmw_cmd_ctx_reserve(struct vmw_private *dev_priv, uint32_t bytes, int ctx_id);884extern void vmw_cmd_commit(struct vmw_private *dev_priv, uint32_t bytes);885extern void vmw_cmd_commit_flush(struct vmw_private *dev_priv, uint32_t bytes);886extern int vmw_cmd_send_fence(struct vmw_private *dev_priv, uint32_t *seqno);887extern bool vmw_supports_3d(struct vmw_private *dev_priv);888extern void vmw_fifo_ping_host(struct vmw_private *dev_priv, uint32_t reason);889extern bool vmw_fifo_have_pitchlock(struct vmw_private *dev_priv);890extern int vmw_cmd_emit_dummy_query(struct vmw_private *dev_priv,891 uint32_t cid);892extern int vmw_cmd_flush(struct vmw_private *dev_priv,893 bool interruptible);894 895#define VMW_CMD_CTX_RESERVE(__priv, __bytes, __ctx_id) \896({ \897 vmw_cmd_ctx_reserve(__priv, __bytes, __ctx_id) ? : ({ \898 DRM_ERROR("FIFO reserve failed at %s for %u bytes\n", \899 __func__, (unsigned int) __bytes); \900 NULL; \901 }); \902})903 904#define VMW_CMD_RESERVE(__priv, __bytes) \905 VMW_CMD_CTX_RESERVE(__priv, __bytes, SVGA3D_INVALID_ID)906 907 908/**909 * vmw_fifo_caps - Returns the capabilities of the FIFO command910 * queue or 0 if fifo memory isn't present.911 * @dev_priv: The device private context912 */913static inline uint32_t vmw_fifo_caps(const struct vmw_private *dev_priv)914{915 if (!dev_priv->fifo_mem || !dev_priv->fifo)916 return 0;917 return dev_priv->fifo->capabilities;918}919 920 921/**922 * vmw_is_cursor_bypass3_enabled - Returns TRUE iff Cursor Bypass 3923 * is enabled in the FIFO.924 * @dev_priv: The device private context925 */926static inline bool927vmw_is_cursor_bypass3_enabled(const struct vmw_private *dev_priv)928{929 return (vmw_fifo_caps(dev_priv) & SVGA_FIFO_CAP_CURSOR_BYPASS_3) != 0;930}931 932/**933 * TTM buffer object driver - vmwgfx_ttm_buffer.c934 */935 936extern const size_t vmw_tt_size;937extern struct ttm_placement vmw_vram_placement;938extern struct ttm_placement vmw_sys_placement;939extern struct ttm_device_funcs vmw_bo_driver;940extern const struct vmw_sg_table *941vmw_bo_sg_table(struct ttm_buffer_object *bo);942int vmw_bo_create_and_populate(struct vmw_private *dev_priv,943 size_t bo_size,944 u32 domain,945 struct vmw_bo **bo_p);946 947extern void vmw_piter_start(struct vmw_piter *viter,948 const struct vmw_sg_table *vsgt,949 unsigned long p_offs);950 951/**952 * vmw_piter_next - Advance the iterator one page.953 *954 * @viter: Pointer to the iterator to advance.955 *956 * Returns false if past the list of pages, true otherwise.957 */958static inline bool vmw_piter_next(struct vmw_piter *viter)959{960 return viter->next(viter);961}962 963/**964 * vmw_piter_dma_addr - Return the DMA address of the current page.965 *966 * @viter: Pointer to the iterator967 *968 * Returns the DMA address of the page pointed to by @viter.969 */970static inline dma_addr_t vmw_piter_dma_addr(struct vmw_piter *viter)971{972 return viter->dma_address(viter);973}974 975/**976 * vmw_piter_page - Return a pointer to the current page.977 *978 * @viter: Pointer to the iterator979 *980 * Returns the DMA address of the page pointed to by @viter.981 */982static inline struct page *vmw_piter_page(struct vmw_piter *viter)983{984 return viter->pages[viter->i];985}986 987/**988 * Command submission - vmwgfx_execbuf.c989 */990 991extern int vmw_execbuf_ioctl(struct drm_device *dev, void *data,992 struct drm_file *file_priv);993extern int vmw_execbuf_process(struct drm_file *file_priv,994 struct vmw_private *dev_priv,995 void __user *user_commands,996 void *kernel_commands,997 uint32_t command_size,998 uint64_t throttle_us,999 uint32_t dx_context_handle,1000 struct drm_vmw_fence_rep __user1001 *user_fence_rep,1002 struct vmw_fence_obj **out_fence,1003 uint32_t flags);1004extern void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv,1005 struct vmw_fence_obj *fence);1006extern void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv);1007 1008extern int vmw_execbuf_fence_commands(struct drm_file *file_priv,1009 struct vmw_private *dev_priv,1010 struct vmw_fence_obj **p_fence,1011 uint32_t *p_handle);1012extern int vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,1013 struct vmw_fpriv *vmw_fp,1014 int ret,1015 struct drm_vmw_fence_rep __user1016 *user_fence_rep,1017 struct vmw_fence_obj *fence,1018 uint32_t fence_handle,1019 int32_t out_fence_fd);1020bool vmw_cmd_describe(const void *buf, u32 *size, char const **cmd);1021 1022/**1023 * IRQs and wating - vmwgfx_irq.c1024 */1025 1026extern int vmw_irq_install(struct vmw_private *dev_priv);1027extern void vmw_irq_uninstall(struct drm_device *dev);1028extern bool vmw_seqno_passed(struct vmw_private *dev_priv,1029 uint32_t seqno);1030extern int vmw_fallback_wait(struct vmw_private *dev_priv,1031 bool lazy,1032 bool fifo_idle,1033 uint32_t seqno,1034 bool interruptible,1035 unsigned long timeout);1036extern void vmw_update_seqno(struct vmw_private *dev_priv);1037extern void vmw_seqno_waiter_add(struct vmw_private *dev_priv);1038extern void vmw_seqno_waiter_remove(struct vmw_private *dev_priv);1039extern void vmw_goal_waiter_add(struct vmw_private *dev_priv);1040extern void vmw_goal_waiter_remove(struct vmw_private *dev_priv);1041extern void vmw_generic_waiter_add(struct vmw_private *dev_priv, u32 flag,1042 int *waiter_count);1043extern void vmw_generic_waiter_remove(struct vmw_private *dev_priv,1044 u32 flag, int *waiter_count);1045 1046/**1047 * Kernel modesetting - vmwgfx_kms.c1048 */1049 1050int vmw_kms_init(struct vmw_private *dev_priv);1051int vmw_kms_close(struct vmw_private *dev_priv);1052int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,1053 struct drm_file *file_priv);1054void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv);1055void vmw_kms_cursor_snoop(struct vmw_surface *srf,1056 struct ttm_object_file *tfile,1057 struct ttm_buffer_object *bo,1058 SVGA3dCmdHeader *header);1059int vmw_kms_write_svga(struct vmw_private *vmw_priv,1060 unsigned width, unsigned height, unsigned pitch,1061 unsigned bpp, unsigned depth);1062int vmw_kms_present(struct vmw_private *dev_priv,1063 struct drm_file *file_priv,1064 struct vmw_framebuffer *vfb,1065 struct vmw_surface *surface,1066 uint32_t sid, int32_t destX, int32_t destY,1067 struct drm_vmw_rect *clips,1068 uint32_t num_clips);1069int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,1070 struct drm_file *file_priv);1071void vmw_kms_legacy_hotspot_clear(struct vmw_private *dev_priv);1072int vmw_kms_suspend(struct drm_device *dev);1073int vmw_kms_resume(struct drm_device *dev);1074void vmw_kms_lost_device(struct drm_device *dev);1075 1076extern int vmw_resource_pin(struct vmw_resource *res, bool interruptible);1077extern void vmw_resource_unpin(struct vmw_resource *res);1078extern enum vmw_res_type vmw_res_type(const struct vmw_resource *res);1079 1080/**1081 * Overlay control - vmwgfx_overlay.c1082 */1083 1084int vmw_overlay_init(struct vmw_private *dev_priv);1085int vmw_overlay_close(struct vmw_private *dev_priv);1086int vmw_overlay_ioctl(struct drm_device *dev, void *data,1087 struct drm_file *file_priv);1088int vmw_overlay_resume_all(struct vmw_private *dev_priv);1089int vmw_overlay_pause_all(struct vmw_private *dev_priv);1090int vmw_overlay_claim(struct vmw_private *dev_priv, uint32_t *out);1091int vmw_overlay_unref(struct vmw_private *dev_priv, uint32_t stream_id);1092int vmw_overlay_num_overlays(struct vmw_private *dev_priv);1093int vmw_overlay_num_free_overlays(struct vmw_private *dev_priv);1094 1095/**1096 * GMR Id manager1097 */1098 1099int vmw_gmrid_man_init(struct vmw_private *dev_priv, int type);1100void vmw_gmrid_man_fini(struct vmw_private *dev_priv, int type);1101 1102/**1103 * System memory manager1104 */1105int vmw_sys_man_init(struct vmw_private *dev_priv);1106void vmw_sys_man_fini(struct vmw_private *dev_priv);1107 1108/**1109 * Prime - vmwgfx_prime.c1110 */1111 1112extern const struct dma_buf_ops vmw_prime_dmabuf_ops;1113extern int vmw_prime_fd_to_handle(struct drm_device *dev,1114 struct drm_file *file_priv,1115 int fd, u32 *handle);1116extern int vmw_prime_handle_to_fd(struct drm_device *dev,1117 struct drm_file *file_priv,1118 uint32_t handle, uint32_t flags,1119 int *prime_fd);1120struct drm_gem_object *vmw_prime_import_sg_table(struct drm_device *dev,1121 struct dma_buf_attachment *attach,1122 struct sg_table *table);1123 1124/*1125 * MemoryOBject management - vmwgfx_mob.c1126 */1127struct vmw_mob;1128extern int vmw_mob_bind(struct vmw_private *dev_priv, struct vmw_mob *mob,1129 const struct vmw_sg_table *vsgt,1130 unsigned long num_data_pages, int32_t mob_id);1131extern void vmw_mob_unbind(struct vmw_private *dev_priv,1132 struct vmw_mob *mob);1133extern void vmw_mob_destroy(struct vmw_mob *mob);1134extern struct vmw_mob *vmw_mob_create(unsigned long data_pages);1135extern int vmw_otables_setup(struct vmw_private *dev_priv);1136extern void vmw_otables_takedown(struct vmw_private *dev_priv);1137 1138/*1139 * Context management - vmwgfx_context.c1140 */1141 1142extern const struct vmw_user_resource_conv *user_context_converter;1143 1144extern int vmw_context_define_ioctl(struct drm_device *dev, void *data,1145 struct drm_file *file_priv);1146extern int vmw_extended_context_define_ioctl(struct drm_device *dev, void *data,1147 struct drm_file *file_priv);1148extern int vmw_context_destroy_ioctl(struct drm_device *dev, void *data,1149 struct drm_file *file_priv);1150extern struct list_head *vmw_context_binding_list(struct vmw_resource *ctx);1151extern struct vmw_cmdbuf_res_manager *1152vmw_context_res_man(struct vmw_resource *ctx);1153extern struct vmw_resource *vmw_context_cotable(struct vmw_resource *ctx,1154 SVGACOTableType cotable_type);1155struct vmw_ctx_binding_state;1156extern struct vmw_ctx_binding_state *1157vmw_context_binding_state(struct vmw_resource *ctx);1158extern void vmw_dx_context_scrub_cotables(struct vmw_resource *ctx,1159 bool readback);1160extern int vmw_context_bind_dx_query(struct vmw_resource *ctx_res,1161 struct vmw_bo *mob);1162extern struct vmw_bo *1163vmw_context_get_dx_query_mob(struct vmw_resource *ctx_res);1164 1165 1166/*1167 * Surface management - vmwgfx_surface.c1168 */1169 1170extern const struct vmw_user_resource_conv *user_surface_converter;1171 1172extern int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data,1173 struct drm_file *file_priv);1174extern int vmw_surface_define_ioctl(struct drm_device *dev, void *data,1175 struct drm_file *file_priv);1176extern int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,1177 struct drm_file *file_priv);1178extern int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data,1179 struct drm_file *file_priv);1180extern int vmw_gb_surface_reference_ioctl(struct drm_device *dev, void *data,1181 struct drm_file *file_priv);1182extern int vmw_gb_surface_define_ext_ioctl(struct drm_device *dev,1183 void *data,1184 struct drm_file *file_priv);1185extern int vmw_gb_surface_reference_ext_ioctl(struct drm_device *dev,1186 void *data,1187 struct drm_file *file_priv);1188 1189int vmw_gb_surface_define(struct vmw_private *dev_priv,1190 const struct vmw_surface_metadata *req,1191 struct vmw_surface **srf_out);1192struct vmw_surface *vmw_lookup_surface_for_buffer(struct vmw_private *vmw,1193 struct vmw_bo *bo,1194 u32 handle);1195u32 vmw_lookup_surface_handle_for_buffer(struct vmw_private *vmw,1196 struct vmw_bo *bo,1197 u32 handle);1198int vmw_dumb_create(struct drm_file *file_priv,1199 struct drm_device *dev,1200 struct drm_mode_create_dumb *args);1201 1202/*1203 * Shader management - vmwgfx_shader.c1204 */1205 1206extern const struct vmw_user_resource_conv *user_shader_converter;1207 1208extern int vmw_shader_define_ioctl(struct drm_device *dev, void *data,1209 struct drm_file *file_priv);1210extern int vmw_shader_destroy_ioctl(struct drm_device *dev, void *data,1211 struct drm_file *file_priv);1212extern int vmw_compat_shader_add(struct vmw_private *dev_priv,1213 struct vmw_cmdbuf_res_manager *man,1214 u32 user_key, const void *bytecode,1215 SVGA3dShaderType shader_type,1216 size_t size,1217 struct list_head *list);1218extern int vmw_shader_remove(struct vmw_cmdbuf_res_manager *man,1219 u32 user_key, SVGA3dShaderType shader_type,1220 struct list_head *list);1221extern int vmw_dx_shader_add(struct vmw_cmdbuf_res_manager *man,1222 struct vmw_resource *ctx,1223 u32 user_key,1224 SVGA3dShaderType shader_type,1225 struct list_head *list);1226extern void vmw_dx_shader_cotable_list_scrub(struct vmw_private *dev_priv,1227 struct list_head *list,1228 bool readback);1229 1230extern struct vmw_resource *1231vmw_shader_lookup(struct vmw_cmdbuf_res_manager *man,1232 u32 user_key, SVGA3dShaderType shader_type);1233 1234/*1235 * Streamoutput management1236 */1237struct vmw_resource *1238vmw_dx_streamoutput_lookup(struct vmw_cmdbuf_res_manager *man,1239 u32 user_key);1240int vmw_dx_streamoutput_add(struct vmw_cmdbuf_res_manager *man,1241 struct vmw_resource *ctx,1242 SVGA3dStreamOutputId user_key,1243 struct list_head *list);1244void vmw_dx_streamoutput_set_size(struct vmw_resource *res, u32 size);1245int vmw_dx_streamoutput_remove(struct vmw_cmdbuf_res_manager *man,1246 SVGA3dStreamOutputId user_key,1247 struct list_head *list);1248void vmw_dx_streamoutput_cotable_list_scrub(struct vmw_private *dev_priv,1249 struct list_head *list,1250 bool readback);1251 1252/*1253 * Command buffer managed resources - vmwgfx_cmdbuf_res.c1254 */1255 1256extern struct vmw_cmdbuf_res_manager *1257vmw_cmdbuf_res_man_create(struct vmw_private *dev_priv);1258extern void vmw_cmdbuf_res_man_destroy(struct vmw_cmdbuf_res_manager *man);1259extern struct vmw_resource *1260vmw_cmdbuf_res_lookup(struct vmw_cmdbuf_res_manager *man,1261 enum vmw_cmdbuf_res_type res_type,1262 u32 user_key);1263extern void vmw_cmdbuf_res_revert(struct list_head *list);1264extern void vmw_cmdbuf_res_commit(struct list_head *list);1265extern int vmw_cmdbuf_res_add(struct vmw_cmdbuf_res_manager *man,1266 enum vmw_cmdbuf_res_type res_type,1267 u32 user_key,1268 struct vmw_resource *res,1269 struct list_head *list);1270extern int vmw_cmdbuf_res_remove(struct vmw_cmdbuf_res_manager *man,1271 enum vmw_cmdbuf_res_type res_type,1272 u32 user_key,1273 struct list_head *list,1274 struct vmw_resource **res);1275 1276/*1277 * COTable management - vmwgfx_cotable.c1278 */1279extern const SVGACOTableType vmw_cotable_scrub_order[];1280extern struct vmw_resource *vmw_cotable_alloc(struct vmw_private *dev_priv,1281 struct vmw_resource *ctx,1282 u32 type);1283extern int vmw_cotable_notify(struct vmw_resource *res, int id);1284extern int vmw_cotable_scrub(struct vmw_resource *res, bool readback);1285extern void vmw_cotable_add_resource(struct vmw_resource *ctx,1286 struct list_head *head);1287 1288/*1289 * Command buffer managerment vmwgfx_cmdbuf.c1290 */1291struct vmw_cmdbuf_man;1292struct vmw_cmdbuf_header;1293 1294extern struct vmw_cmdbuf_man *1295vmw_cmdbuf_man_create(struct vmw_private *dev_priv);1296extern int vmw_cmdbuf_set_pool_size(struct vmw_cmdbuf_man *man, size_t size);1297extern void vmw_cmdbuf_remove_pool(struct vmw_cmdbuf_man *man);1298extern void vmw_cmdbuf_man_destroy(struct vmw_cmdbuf_man *man);1299extern int vmw_cmdbuf_idle(struct vmw_cmdbuf_man *man, bool interruptible,1300 unsigned long timeout);1301extern void *vmw_cmdbuf_reserve(struct vmw_cmdbuf_man *man, size_t size,1302 int ctx_id, bool interruptible,1303 struct vmw_cmdbuf_header *header);1304extern void vmw_cmdbuf_commit(struct vmw_cmdbuf_man *man, size_t size,1305 struct vmw_cmdbuf_header *header,1306 bool flush);1307extern void *vmw_cmdbuf_alloc(struct vmw_cmdbuf_man *man,1308 size_t size, bool interruptible,1309 struct vmw_cmdbuf_header **p_header);1310extern void vmw_cmdbuf_header_free(struct vmw_cmdbuf_header *header);1311extern int vmw_cmdbuf_cur_flush(struct vmw_cmdbuf_man *man,1312 bool interruptible);1313extern void vmw_cmdbuf_irqthread(struct vmw_cmdbuf_man *man);1314 1315/* CPU blit utilities - vmwgfx_blit.c */1316 1317/**1318 * struct vmw_diff_cpy - CPU blit information structure1319 *1320 * @rect: The output bounding box rectangle.1321 * @line: The current line of the blit.1322 * @line_offset: Offset of the current line segment.1323 * @cpp: Bytes per pixel (granularity information).1324 * @memcpy: Which memcpy function to use.1325 */1326struct vmw_diff_cpy {1327 struct drm_rect rect;1328 size_t line;1329 size_t line_offset;1330 int cpp;1331 void (*do_cpy)(struct vmw_diff_cpy *diff, u8 *dest, const u8 *src,1332 size_t n);1333};1334 1335#define VMW_CPU_BLIT_INITIALIZER { \1336 .do_cpy = vmw_memcpy, \1337}1338 1339#define VMW_CPU_BLIT_DIFF_INITIALIZER(_cpp) { \1340 .line = 0, \1341 .line_offset = 0, \1342 .rect = { .x1 = INT_MAX/2, \1343 .y1 = INT_MAX/2, \1344 .x2 = INT_MIN/2, \1345 .y2 = INT_MIN/2 \1346 }, \1347 .cpp = _cpp, \1348 .do_cpy = vmw_diff_memcpy, \1349}1350 1351void vmw_diff_memcpy(struct vmw_diff_cpy *diff, u8 *dest, const u8 *src,1352 size_t n);1353 1354void vmw_memcpy(struct vmw_diff_cpy *diff, u8 *dest, const u8 *src, size_t n);1355 1356int vmw_bo_cpu_blit(struct vmw_bo *dst,1357 u32 dst_offset, u32 dst_stride,1358 struct vmw_bo *src,1359 u32 src_offset, u32 src_stride,1360 u32 w, u32 h,1361 struct vmw_diff_cpy *diff);1362 1363/* Host messaging -vmwgfx_msg.c: */1364void vmw_disable_backdoor(void);1365int vmw_host_get_guestinfo(const char *guest_info_param,1366 char *buffer, size_t *length);1367__printf(1, 2) int vmw_host_printf(const char *fmt, ...);1368int vmw_msg_ioctl(struct drm_device *dev, void *data,1369 struct drm_file *file_priv);1370 1371/* Host mksGuestStats -vmwgfx_msg.c: */1372int vmw_mksstat_get_kern_slot(pid_t pid, struct vmw_private *dev_priv);1373 1374int vmw_mksstat_reset_ioctl(struct drm_device *dev, void *data,1375 struct drm_file *file_priv);1376int vmw_mksstat_add_ioctl(struct drm_device *dev, void *data,1377 struct drm_file *file_priv);1378int vmw_mksstat_remove_ioctl(struct drm_device *dev, void *data,1379 struct drm_file *file_priv);1380int vmw_mksstat_remove_all(struct vmw_private *dev_priv);1381 1382/* VMW logging */1383 1384/**1385 * VMW_DEBUG_USER - Debug output for user-space debugging.1386 *1387 * @fmt: printf() like format string.1388 *1389 * This macro is for logging user-space error and debugging messages for e.g.1390 * command buffer execution errors due to malformed commands, invalid context,1391 * etc.1392 */1393#define VMW_DEBUG_USER(fmt, ...) \1394 DRM_DEBUG_DRIVER(fmt, ##__VA_ARGS__)1395 1396/* Resource dirtying - vmwgfx_page_dirty.c */1397void vmw_bo_dirty_scan(struct vmw_bo *vbo);1398int vmw_bo_dirty_add(struct vmw_bo *vbo);1399void vmw_bo_dirty_transfer_to_res(struct vmw_resource *res);1400void vmw_bo_dirty_clear_res(struct vmw_resource *res);1401void vmw_bo_dirty_release(struct vmw_bo *vbo);1402void vmw_bo_dirty_unmap(struct vmw_bo *vbo,1403 pgoff_t start, pgoff_t end);1404vm_fault_t vmw_bo_vm_fault(struct vm_fault *vmf);1405vm_fault_t vmw_bo_vm_mkwrite(struct vm_fault *vmf);1406 1407 1408/**1409 * VMW_DEBUG_KMS - Debug output for kernel mode-setting1410 *1411 * This macro is for debugging vmwgfx mode-setting code.1412 */1413#define VMW_DEBUG_KMS(fmt, ...) \1414 DRM_DEBUG_DRIVER(fmt, ##__VA_ARGS__)1415 1416/**1417 * Inline helper functions1418 */1419 1420static inline void vmw_surface_unreference(struct vmw_surface **srf)1421{1422 struct vmw_surface *tmp_srf = *srf;1423 struct vmw_resource *res = &tmp_srf->res;1424 *srf = NULL;1425 1426 vmw_resource_unreference(&res);1427}1428 1429static inline struct vmw_surface *vmw_surface_reference(struct vmw_surface *srf)1430{1431 (void) vmw_resource_reference(&srf->res);1432 return srf;1433}1434 1435static inline void vmw_fifo_resource_inc(struct vmw_private *dev_priv)1436{1437 atomic_inc(&dev_priv->num_fifo_resources);1438}1439 1440static inline void vmw_fifo_resource_dec(struct vmw_private *dev_priv)1441{1442 atomic_dec(&dev_priv->num_fifo_resources);1443}1444 1445/**1446 * vmw_fifo_mem_read - Perform a MMIO read from the fifo memory1447 *1448 * @fifo_reg: The fifo register to read from1449 *1450 * This function is intended to be equivalent to ioread32() on1451 * memremap'd memory, but without byteswapping.1452 */1453static inline u32 vmw_fifo_mem_read(struct vmw_private *vmw, uint32 fifo_reg)1454{1455 BUG_ON(vmw_is_svga_v3(vmw));1456 return READ_ONCE(*(vmw->fifo_mem + fifo_reg));1457}1458 1459/**1460 * vmw_fifo_mem_write - Perform a MMIO write to volatile memory1461 *1462 * @addr: The fifo register to write to1463 *1464 * This function is intended to be equivalent to iowrite32 on1465 * memremap'd memory, but without byteswapping.1466 */1467static inline void vmw_fifo_mem_write(struct vmw_private *vmw, u32 fifo_reg,1468 u32 value)1469{1470 BUG_ON(vmw_is_svga_v3(vmw));1471 WRITE_ONCE(*(vmw->fifo_mem + fifo_reg), value);1472}1473 1474static inline u32 vmw_fence_read(struct vmw_private *dev_priv)1475{1476 u32 fence;1477 if (vmw_is_svga_v3(dev_priv))1478 fence = vmw_read(dev_priv, SVGA_REG_FENCE);1479 else1480 fence = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_FENCE);1481 return fence;1482}1483 1484static inline void vmw_fence_write(struct vmw_private *dev_priv,1485 u32 fence)1486{1487 BUG_ON(vmw_is_svga_v3(dev_priv));1488 vmw_fifo_mem_write(dev_priv, SVGA_FIFO_FENCE, fence);1489}1490 1491static inline u32 vmw_irq_status_read(struct vmw_private *vmw)1492{1493 u32 status;1494 if (vmw_is_svga_v3(vmw))1495 status = vmw_read(vmw, SVGA_REG_IRQ_STATUS);1496 else1497 status = inl(vmw->io_start + SVGA_IRQSTATUS_PORT);1498 return status;1499}1500 1501static inline void vmw_irq_status_write(struct vmw_private *vmw,1502 uint32 status)1503{1504 if (vmw_is_svga_v3(vmw))1505 vmw_write(vmw, SVGA_REG_IRQ_STATUS, status);1506 else1507 outl(status, vmw->io_start + SVGA_IRQSTATUS_PORT);1508}1509 1510static inline bool vmw_has_fences(struct vmw_private *vmw)1511{1512 if ((vmw->capabilities & (SVGA_CAP_COMMAND_BUFFERS |1513 SVGA_CAP_CMD_BUFFERS_2)) != 0)1514 return true;1515 return (vmw_fifo_caps(vmw) & SVGA_FIFO_CAP_FENCE) != 0;1516}1517 1518static inline bool vmw_shadertype_is_valid(enum vmw_sm_type shader_model,1519 u32 shader_type)1520{1521 SVGA3dShaderType max_allowed = SVGA3D_SHADERTYPE_PREDX_MAX;1522 1523 if (shader_model >= VMW_SM_5)1524 max_allowed = SVGA3D_SHADERTYPE_MAX;1525 else if (shader_model >= VMW_SM_4)1526 max_allowed = SVGA3D_SHADERTYPE_DX10_MAX;1527 return shader_type >= SVGA3D_SHADERTYPE_MIN && shader_type < max_allowed;1528}1529 1530#endif1531