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1/* SPDX-License-Identifier: MIT */2/*3 * Copyright © 2023 Intel Corporation4 */5#ifndef _XE_I915_DRV_H_6#define _XE_I915_DRV_H_7 8/*9 * "Adaptation header" to allow i915 display to also build for xe driver.10 * TODO: refactor i915 and xe so this can cease to exist11 */12 13#include <drm/drm_drv.h>14 15#include "i915_utils.h"16#include "intel_runtime_pm.h"17#include "xe_device_types.h"18 19static inline struct drm_i915_private *to_i915(const struct drm_device *dev)20{21 return container_of(dev, struct drm_i915_private, drm);22}23 24#define IS_PLATFORM(xe, x) ((xe)->info.platform == x)25#define INTEL_INFO(dev_priv) (&((dev_priv)->info))26#define IS_I830(dev_priv) (dev_priv && 0)27#define IS_I845G(dev_priv) (dev_priv && 0)28#define IS_I85X(dev_priv) (dev_priv && 0)29#define IS_I865G(dev_priv) (dev_priv && 0)30#define IS_I915G(dev_priv) (dev_priv && 0)31#define IS_I915GM(dev_priv) (dev_priv && 0)32#define IS_I945G(dev_priv) (dev_priv && 0)33#define IS_I945GM(dev_priv) (dev_priv && 0)34#define IS_I965G(dev_priv) (dev_priv && 0)35#define IS_I965GM(dev_priv) (dev_priv && 0)36#define IS_G45(dev_priv) (dev_priv && 0)37#define IS_GM45(dev_priv) (dev_priv && 0)38#define IS_G4X(dev_priv) (dev_priv && 0)39#define IS_PINEVIEW(dev_priv) (dev_priv && 0)40#define IS_G33(dev_priv) (dev_priv && 0)41#define IS_IRONLAKE(dev_priv) (dev_priv && 0)42#define IS_IRONLAKE_M(dev_priv) (dev_priv && 0)43#define IS_SANDYBRIDGE(dev_priv) (dev_priv && 0)44#define IS_IVYBRIDGE(dev_priv) (dev_priv && 0)45#define IS_IVB_GT1(dev_priv) (dev_priv && 0)46#define IS_VALLEYVIEW(dev_priv) (dev_priv && 0)47#define IS_CHERRYVIEW(dev_priv) (dev_priv && 0)48#define IS_HASWELL(dev_priv) (dev_priv && 0)49#define IS_BROADWELL(dev_priv) (dev_priv && 0)50#define IS_SKYLAKE(dev_priv) (dev_priv && 0)51#define IS_BROXTON(dev_priv) (dev_priv && 0)52#define IS_KABYLAKE(dev_priv) (dev_priv && 0)53#define IS_GEMINILAKE(dev_priv) (dev_priv && 0)54#define IS_COFFEELAKE(dev_priv) (dev_priv && 0)55#define IS_COMETLAKE(dev_priv) (dev_priv && 0)56#define IS_ICELAKE(dev_priv) (dev_priv && 0)57#define IS_JASPERLAKE(dev_priv) (dev_priv && 0)58#define IS_ELKHARTLAKE(dev_priv) (dev_priv && 0)59#define IS_TIGERLAKE(dev_priv) IS_PLATFORM(dev_priv, XE_TIGERLAKE)60#define IS_ROCKETLAKE(dev_priv) IS_PLATFORM(dev_priv, XE_ROCKETLAKE)61#define IS_DG1(dev_priv) IS_PLATFORM(dev_priv, XE_DG1)62#define IS_ALDERLAKE_S(dev_priv) IS_PLATFORM(dev_priv, XE_ALDERLAKE_S)63#define IS_ALDERLAKE_P(dev_priv) (IS_PLATFORM(dev_priv, XE_ALDERLAKE_P) || \64 IS_PLATFORM(dev_priv, XE_ALDERLAKE_N))65#define IS_DG2(dev_priv) IS_PLATFORM(dev_priv, XE_DG2)66#define IS_METEORLAKE(dev_priv) IS_PLATFORM(dev_priv, XE_METEORLAKE)67#define IS_LUNARLAKE(dev_priv) IS_PLATFORM(dev_priv, XE_LUNARLAKE)68#define IS_BATTLEMAGE(dev_priv) IS_PLATFORM(dev_priv, XE_BATTLEMAGE)69 70#define IS_HASWELL_ULT(dev_priv) (dev_priv && 0)71#define IS_BROADWELL_ULT(dev_priv) (dev_priv && 0)72#define IS_BROADWELL_ULX(dev_priv) (dev_priv && 0)73 74#define IP_VER(ver, rel) ((ver) << 8 | (rel))75 76#define IS_MOBILE(xe) (xe && 0)77 78#define IS_LP(xe) ((xe) && 0)79#define IS_GEN9_LP(xe) ((xe) && 0)80#define IS_GEN9_BC(xe) ((xe) && 0)81 82#define IS_TIGERLAKE_UY(xe) (xe && 0)83#define IS_COMETLAKE_ULX(xe) (xe && 0)84#define IS_COFFEELAKE_ULX(xe) (xe && 0)85#define IS_KABYLAKE_ULX(xe) (xe && 0)86#define IS_SKYLAKE_ULX(xe) (xe && 0)87#define IS_HASWELL_ULX(xe) (xe && 0)88#define IS_COMETLAKE_ULT(xe) (xe && 0)89#define IS_COFFEELAKE_ULT(xe) (xe && 0)90#define IS_KABYLAKE_ULT(xe) (xe && 0)91#define IS_SKYLAKE_ULT(xe) (xe && 0)92 93#define IS_DG2_G10(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_G10)94#define IS_DG2_G11(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_G11)95#define IS_DG2_G12(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_G12)96#define IS_RAPTORLAKE_U(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_ALDERLAKE_P_RPLU)97#define IS_ICL_WITH_PORT_F(xe) (xe && 0)98#define HAS_FLAT_CCS(xe) (xe_device_has_flat_ccs(xe))99 100#define HAS_128_BYTE_Y_TILING(xe) (xe || 1)101 102#define I915_PRIORITY_DISPLAY 0103struct i915_sched_attr {104 int priority;105};106#define i915_gem_fence_wait_priority(fence, attr) do { (void) attr; } while (0)107 108#define FORCEWAKE_ALL XE_FORCEWAKE_ALL109 110#ifdef CONFIG_ARM64111/*112 * arm64 indirectly includes linux/rtc.h,113 * which defines a irq_lock, so include it114 * here before #define-ing it115 */116#include <linux/rtc.h>117#endif118 119#define irq_lock irq.lock120 121#endif122