35 lines · c
1/* SPDX-License-Identifier: MIT */2/*3 * Copyright © 2023 Intel Corporation4 */5 6#ifndef _XE_LRC_LAYOUT_H_7#define _XE_LRC_LAYOUT_H_8 9#define CTX_CONTEXT_CONTROL (0x02 + 1)10#define CTX_RING_HEAD (0x04 + 1)11#define CTX_RING_TAIL (0x06 + 1)12#define CTX_RING_START (0x08 + 1)13#define CTX_RING_CTL (0x0a + 1)14#define CTX_TIMESTAMP (0x22 + 1)15#define CTX_INDIRECT_RING_STATE (0x26 + 1)16#define CTX_PDP0_UDW (0x30 + 1)17#define CTX_PDP0_LDW (0x32 + 1)18 19#define CTX_LRM_INT_MASK_ENABLE 0x5020#define CTX_INT_MASK_ENABLE_REG (CTX_LRM_INT_MASK_ENABLE + 1)21#define CTX_INT_MASK_ENABLE_PTR (CTX_LRM_INT_MASK_ENABLE + 2)22#define CTX_LRI_INT_REPORT_PTR 0x5523#define CTX_INT_STATUS_REPORT_REG (CTX_LRI_INT_REPORT_PTR + 1)24#define CTX_INT_STATUS_REPORT_PTR (CTX_LRI_INT_REPORT_PTR + 2)25#define CTX_INT_SRC_REPORT_REG (CTX_LRI_INT_REPORT_PTR + 3)26#define CTX_INT_SRC_REPORT_PTR (CTX_LRI_INT_REPORT_PTR + 4)27 28#define INDIRECT_CTX_RING_HEAD (0x02 + 1)29#define INDIRECT_CTX_RING_TAIL (0x04 + 1)30#define INDIRECT_CTX_RING_START (0x06 + 1)31#define INDIRECT_CTX_RING_START_UDW (0x08 + 1)32#define INDIRECT_CTX_RING_CTL (0x0a + 1)33 34#endif35