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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Most ISHTP provider device and ISHTP logic declarations4 *5 * Copyright (c) 2003-2016, Intel Corporation.6 */7 8#ifndef _ISHTP_DEV_H_9#define _ISHTP_DEV_H_10 11#include <linux/types.h>12#include <linux/spinlock.h>13#include <linux/intel-ish-client-if.h>14#include "bus.h"15#include "hbm.h"16 17#define IPC_PAYLOAD_SIZE 12818#define ISHTP_RD_MSG_BUF_SIZE IPC_PAYLOAD_SIZE19#define IPC_FULL_MSG_SIZE 13220 21/* Number of messages to be held in ISR->BH FIFO */22#define RD_INT_FIFO_SIZE 6423 24/*25 * Number of IPC messages to be held in Tx FIFO, to be sent by ISR -26 * Tx complete interrupt or RX_COMPLETE handler27 */28#define IPC_TX_FIFO_SIZE 51229 30/*31 * Number of Maximum ISHTP Clients32 */33#define ISHTP_CLIENTS_MAX 25634 35/*36 * Number of File descriptors/handles37 * that can be opened to the driver.38 *39 * Limit to 255: 256 Total Clients40 * minus internal client for ISHTP Bus Messages41 */42#define ISHTP_MAX_OPEN_HANDLE_COUNT (ISHTP_CLIENTS_MAX - 1)43 44/* Internal Clients Number */45#define ISHTP_HOST_CLIENT_ID_ANY (-1)46#define ISHTP_HBM_HOST_CLIENT_ID 047 48#define MAX_DMA_DELAY 2049 50/* ISHTP device states */51enum ishtp_dev_state {52 ISHTP_DEV_INITIALIZING = 0,53 ISHTP_DEV_INIT_CLIENTS,54 ISHTP_DEV_ENABLED,55 ISHTP_DEV_RESETTING,56 ISHTP_DEV_DISABLED,57 ISHTP_DEV_POWER_DOWN,58 ISHTP_DEV_POWER_UP59};60const char *ishtp_dev_state_str(int state);61 62struct ishtp_cl;63 64/**65 * struct ishtp_fw_client - representation of fw client66 *67 * @props - client properties68 * @client_id - fw client id69 */70struct ishtp_fw_client {71 struct ishtp_client_properties props;72 uint8_t client_id;73};74 75/*76 * Control info for IPC messages ISHTP/IPC sending FIFO -77 * list with inline data buffer78 * This structure will be filled with parameters submitted79 * by the caller glue layer80 * 'buf' may be pointing to the external buffer or to 'inline_data'81 * 'offset' will be initialized to 0 by submitting82 *83 * 'ipc_send_compl' is intended for use by clients that send fragmented84 * messages. When a fragment is sent down to IPC msg regs,85 * it will be called.86 * If it has more fragments to send, it will do it. With last fragment87 * it will send appropriate ISHTP "message-complete" flag.88 * It will remove the outstanding message89 * (mark outstanding buffer as available).90 * If counting flow control is in work and there are more flow control91 * credits, it can put the next client message queued in cl.92 * structure for IPC processing.93 *94 */95struct wr_msg_ctl_info {96 /* Will be called with 'ipc_send_compl_prm' as parameter */97 void (*ipc_send_compl)(void *);98 99 void *ipc_send_compl_prm;100 size_t length;101 struct list_head link;102 unsigned char inline_data[IPC_FULL_MSG_SIZE];103};104 105/*106 * The ISHTP layer talks to hardware IPC message using the following107 * callbacks108 */109struct ishtp_hw_ops {110 int (*hw_reset)(struct ishtp_device *dev);111 int (*ipc_reset)(struct ishtp_device *dev);112 uint32_t (*ipc_get_header)(struct ishtp_device *dev, int length,113 int busy);114 int (*write)(struct ishtp_device *dev,115 void (*ipc_send_compl)(void *), void *ipc_send_compl_prm,116 unsigned char *msg, int length);117 uint32_t (*ishtp_read_hdr)(const struct ishtp_device *dev);118 int (*ishtp_read)(struct ishtp_device *dev, unsigned char *buffer,119 unsigned long buffer_length);120 uint32_t (*get_fw_status)(struct ishtp_device *dev);121 void (*sync_fw_clock)(struct ishtp_device *dev);122 bool (*dma_no_cache_snooping)(struct ishtp_device *dev);123};124 125/**126 * struct ishtp_driver_data - Driver-specific data for ISHTP devices127 *128 * This structure holds driver-specific data that can be associated with each129 * ISHTP device instance. It allows for the storage of data that is unique to130 * a particular driver or hardware variant.131 *132 * @fw_generation: The generation name associated with a specific hardware133 * variant of the Intel Integrated Sensor Hub (ISH). This allows134 * the driver to load the correct firmware based on the device's135 * hardware variant. For example, "lnlm" for the Lunar Lake-M136 * platform. The generation name must not exceed 8 characters137 * in length.138 */139struct ishtp_driver_data {140 char *fw_generation;141};142 143/**144 * struct ishtp_device - ISHTP private device struct145 */146struct ishtp_device {147 struct device *devc; /* pointer to lowest device */148 struct pci_dev *pdev; /* PCI device to get device ids */149 struct ishtp_driver_data *driver_data; /* pointer to driver-specific data */150 151 /* waitq for waiting for suspend response */152 wait_queue_head_t suspend_wait;153 bool suspend_flag; /* Suspend is active */154 155 /* waitq for waiting for resume response */156 wait_queue_head_t resume_wait;157 bool resume_flag; /*Resume is active */158 159 /*160 * lock for the device, for everything that doesn't have161 * a dedicated spinlock162 */163 spinlock_t device_lock;164 165 bool recvd_hw_ready;166 struct hbm_version version;167 int transfer_path; /* Choice of transfer path: IPC or DMA */168 169 /* work structure for scheduling firmware loading tasks */170 struct work_struct work_fw_loader;171 /* waitq for waiting for command response from the firmware loader */172 wait_queue_head_t wait_loader_recvd_msg;173 /* indicating whether a message from the firmware loader has been received */174 bool fw_loader_received;175 /* pointer to a buffer for receiving messages from the firmware loader */176 void *fw_loader_rx_buf;177 /* size of the buffer pointed to by fw_loader_rx_buf */178 int fw_loader_rx_size;179 180 /* ishtp device states */181 enum ishtp_dev_state dev_state;182 enum ishtp_hbm_state hbm_state;183 184 /* driver read queue */185 struct ishtp_cl_rb read_list;186 spinlock_t read_list_spinlock;187 188 /* list of ishtp_cl's */189 struct list_head cl_list;190 spinlock_t cl_list_lock;191 long open_handle_count;192 193 /* List of bus devices */194 struct list_head device_list;195 spinlock_t device_list_lock;196 197 /* waiting queues for receive message from FW */198 wait_queue_head_t wait_hw_ready;199 wait_queue_head_t wait_hbm_recvd_msg;200 201 /* FIFO for input messages for BH processing */202 unsigned char rd_msg_fifo[RD_INT_FIFO_SIZE * IPC_PAYLOAD_SIZE];203 unsigned int rd_msg_fifo_head, rd_msg_fifo_tail;204 spinlock_t rd_msg_spinlock;205 struct work_struct bh_hbm_work;206 207 /* IPC write queue */208 struct list_head wr_processing_list, wr_free_list;209 /* For both processing list and free list */210 spinlock_t wr_processing_spinlock;211 212 struct ishtp_fw_client *fw_clients; /*Note:memory has to be allocated*/213 DECLARE_BITMAP(fw_clients_map, ISHTP_CLIENTS_MAX);214 DECLARE_BITMAP(host_clients_map, ISHTP_CLIENTS_MAX);215 uint8_t fw_clients_num;216 uint8_t fw_client_presentation_num;217 uint8_t fw_client_index;218 spinlock_t fw_clients_lock;219 220 /* TX DMA buffers and slots */221 int ishtp_host_dma_enabled;222 void *ishtp_host_dma_tx_buf;223 unsigned int ishtp_host_dma_tx_buf_size;224 uint64_t ishtp_host_dma_tx_buf_phys;225 int ishtp_dma_num_slots;226 227 /* map of 4k blocks in Tx dma buf: 0-free, 1-used */228 uint8_t *ishtp_dma_tx_map;229 spinlock_t ishtp_dma_tx_lock;230 231 /* RX DMA buffers and slots */232 void *ishtp_host_dma_rx_buf;233 unsigned int ishtp_host_dma_rx_buf_size;234 uint64_t ishtp_host_dma_rx_buf_phys;235 236 /* Dump to trace buffers if enabled*/237 ishtp_print_log print_log;238 239 /* Debug stats */240 unsigned int ipc_rx_cnt;241 unsigned long long ipc_rx_bytes_cnt;242 unsigned int ipc_tx_cnt;243 unsigned long long ipc_tx_bytes_cnt;244 245 const struct ishtp_hw_ops *ops;246 size_t mtu;247 uint32_t ishtp_msg_hdr;248 char hw[] __aligned(sizeof(void *));249};250 251static inline unsigned long ishtp_secs_to_jiffies(unsigned long sec)252{253 return msecs_to_jiffies(sec * MSEC_PER_SEC);254}255 256/*257 * Register Access Function258 */259static inline int ish_ipc_reset(struct ishtp_device *dev)260{261 return dev->ops->ipc_reset(dev);262}263 264/* Exported function */265void ishtp_device_init(struct ishtp_device *dev);266int ishtp_start(struct ishtp_device *dev);267 268#endif /*_ISHTP_DEV_H_*/269