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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * INA3221 Triple Current/Voltage Monitor4 *5 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/6 * Andrew F. Davis <afd@ti.com>7 */8 9#include <linux/debugfs.h>10#include <linux/hwmon.h>11#include <linux/hwmon-sysfs.h>12#include <linux/i2c.h>13#include <linux/module.h>14#include <linux/mutex.h>15#include <linux/of.h>16#include <linux/pm_runtime.h>17#include <linux/regmap.h>18#include <linux/util_macros.h>19 20#define INA3221_DRIVER_NAME "ina3221"21 22#define INA3221_CONFIG 0x0023#define INA3221_SHUNT1 0x0124#define INA3221_BUS1 0x0225#define INA3221_SHUNT2 0x0326#define INA3221_BUS2 0x0427#define INA3221_SHUNT3 0x0528#define INA3221_BUS3 0x0629#define INA3221_CRIT1 0x0730#define INA3221_WARN1 0x0831#define INA3221_CRIT2 0x0932#define INA3221_WARN2 0x0a33#define INA3221_CRIT3 0x0b34#define INA3221_WARN3 0x0c35#define INA3221_SHUNT_SUM 0x0d36#define INA3221_CRIT_SUM 0x0e37#define INA3221_MASK_ENABLE 0x0f38 39#define INA3221_CONFIG_MODE_MASK GENMASK(2, 0)40#define INA3221_CONFIG_MODE_POWERDOWN 041#define INA3221_CONFIG_MODE_SHUNT BIT(0)42#define INA3221_CONFIG_MODE_BUS BIT(1)43#define INA3221_CONFIG_MODE_CONTINUOUS BIT(2)44#define INA3221_CONFIG_VSH_CT_SHIFT 345#define INA3221_CONFIG_VSH_CT_MASK GENMASK(5, 3)46#define INA3221_CONFIG_VSH_CT(x) (((x) & GENMASK(5, 3)) >> 3)47#define INA3221_CONFIG_VBUS_CT_SHIFT 648#define INA3221_CONFIG_VBUS_CT_MASK GENMASK(8, 6)49#define INA3221_CONFIG_VBUS_CT(x) (((x) & GENMASK(8, 6)) >> 6)50#define INA3221_CONFIG_AVG_SHIFT 951#define INA3221_CONFIG_AVG_MASK GENMASK(11, 9)52#define INA3221_CONFIG_AVG(x) (((x) & GENMASK(11, 9)) >> 9)53#define INA3221_CONFIG_CHs_EN_MASK GENMASK(14, 12)54#define INA3221_CONFIG_CHx_EN(x) BIT(14 - (x))55 56#define INA3221_MASK_ENABLE_SCC_MASK GENMASK(14, 12)57 58#define INA3221_CONFIG_DEFAULT 0x712759#define INA3221_RSHUNT_DEFAULT 1000060 61enum ina3221_fields {62 /* Configuration */63 F_RST,64 65 /* Status Flags */66 F_CVRF,67 68 /* Warning Flags */69 F_WF3, F_WF2, F_WF1,70 71 /* Alert Flags: SF is the summation-alert flag */72 F_SF, F_CF3, F_CF2, F_CF1,73 74 /* sentinel */75 F_MAX_FIELDS76};77 78static const struct reg_field ina3221_reg_fields[] = {79 [F_RST] = REG_FIELD(INA3221_CONFIG, 15, 15),80 81 [F_CVRF] = REG_FIELD(INA3221_MASK_ENABLE, 0, 0),82 [F_WF3] = REG_FIELD(INA3221_MASK_ENABLE, 3, 3),83 [F_WF2] = REG_FIELD(INA3221_MASK_ENABLE, 4, 4),84 [F_WF1] = REG_FIELD(INA3221_MASK_ENABLE, 5, 5),85 [F_SF] = REG_FIELD(INA3221_MASK_ENABLE, 6, 6),86 [F_CF3] = REG_FIELD(INA3221_MASK_ENABLE, 7, 7),87 [F_CF2] = REG_FIELD(INA3221_MASK_ENABLE, 8, 8),88 [F_CF1] = REG_FIELD(INA3221_MASK_ENABLE, 9, 9),89};90 91enum ina3221_channels {92 INA3221_CHANNEL1,93 INA3221_CHANNEL2,94 INA3221_CHANNEL3,95 INA3221_NUM_CHANNELS96};97 98/**99 * struct ina3221_input - channel input source specific information100 * @label: label of channel input source101 * @shunt_resistor: shunt resistor value of channel input source102 * @disconnected: connection status of channel input source103 * @summation_disable: channel summation status of input source104 */105struct ina3221_input {106 const char *label;107 int shunt_resistor;108 bool disconnected;109 bool summation_disable;110};111 112/**113 * struct ina3221_data - device specific information114 * @pm_dev: Device pointer for pm runtime115 * @regmap: Register map of the device116 * @fields: Register fields of the device117 * @inputs: Array of channel input source specific structures118 * @lock: mutex lock to serialize sysfs attribute accesses119 * @debugfs: Pointer to debugfs entry for device120 * @reg_config: Register value of INA3221_CONFIG121 * @summation_shunt_resistor: equivalent shunt resistor value for summation122 * @summation_channel_control: Value written to SCC field in INA3221_MASK_ENABLE123 * @single_shot: running in single-shot operating mode124 */125struct ina3221_data {126 struct device *pm_dev;127 struct regmap *regmap;128 struct regmap_field *fields[F_MAX_FIELDS];129 struct ina3221_input inputs[INA3221_NUM_CHANNELS];130 struct mutex lock;131 struct dentry *debugfs;132 u32 reg_config;133 int summation_shunt_resistor;134 u32 summation_channel_control;135 136 bool single_shot;137};138 139static inline bool ina3221_is_enabled(struct ina3221_data *ina, int channel)140{141 /* Summation channel checks shunt resistor values */142 if (channel > INA3221_CHANNEL3)143 return ina->summation_shunt_resistor != 0;144 145 return pm_runtime_active(ina->pm_dev) &&146 (ina->reg_config & INA3221_CONFIG_CHx_EN(channel));147}148 149/*150 * Helper function to return the resistor value for current summation.151 *152 * There is a condition to calculate current summation -- all the shunt153 * resistor values should be the same, so as to simply fit the formula:154 * current summation = shunt voltage summation / shunt resistor155 *156 * Returns the equivalent shunt resistor value on success or 0 on failure157 */158static inline int ina3221_summation_shunt_resistor(struct ina3221_data *ina)159{160 struct ina3221_input *input = ina->inputs;161 int i, shunt_resistor = 0;162 163 for (i = 0; i < INA3221_NUM_CHANNELS; i++) {164 if (input[i].disconnected || !input[i].shunt_resistor ||165 input[i].summation_disable)166 continue;167 if (!shunt_resistor) {168 /* Found the reference shunt resistor value */169 shunt_resistor = input[i].shunt_resistor;170 } else {171 /* No summation if resistor values are different */172 if (shunt_resistor != input[i].shunt_resistor)173 return 0;174 }175 }176 177 return shunt_resistor;178}179 180/* Lookup table for Bus and Shunt conversion times in usec */181static const u16 ina3221_conv_time[] = {182 140, 204, 332, 588, 1100, 2116, 4156, 8244,183};184 185/* Lookup table for number of samples using in averaging mode */186static const int ina3221_avg_samples[] = {187 1, 4, 16, 64, 128, 256, 512, 1024,188};189 190/* Converting update_interval in msec to conversion time in usec */191static inline u32 ina3221_interval_ms_to_conv_time(u16 config, int interval)192{193 u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);194 u32 samples_idx = INA3221_CONFIG_AVG(config);195 u32 samples = ina3221_avg_samples[samples_idx];196 197 /* Bisect the result to Bus and Shunt conversion times */198 return DIV_ROUND_CLOSEST(interval * 1000 / 2, channels * samples);199}200 201/* Converting CONFIG register value to update_interval in usec */202static inline u32 ina3221_reg_to_interval_us(u16 config)203{204 u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);205 u32 vbus_ct_idx = INA3221_CONFIG_VBUS_CT(config);206 u32 vsh_ct_idx = INA3221_CONFIG_VSH_CT(config);207 u32 vbus_ct = ina3221_conv_time[vbus_ct_idx];208 u32 vsh_ct = ina3221_conv_time[vsh_ct_idx];209 210 /* Calculate total conversion time */211 return channels * (vbus_ct + vsh_ct);212}213 214static inline int ina3221_wait_for_data(struct ina3221_data *ina)215{216 u32 wait, cvrf;217 218 wait = ina3221_reg_to_interval_us(ina->reg_config);219 220 /* Polling the CVRF bit to make sure read data is ready */221 return regmap_field_read_poll_timeout(ina->fields[F_CVRF],222 cvrf, cvrf, wait, wait * 2);223}224 225static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg,226 int *val)227{228 unsigned int regval;229 int ret;230 231 ret = regmap_read(ina->regmap, reg, ®val);232 if (ret)233 return ret;234 235 /*236 * Shunt Voltage Sum register has 14-bit value with 1-bit shift237 * Other Shunt Voltage registers have 12 bits with 3-bit shift238 */239 if (reg == INA3221_SHUNT_SUM || reg == INA3221_CRIT_SUM)240 *val = sign_extend32(regval >> 1, 14);241 else242 *val = sign_extend32(regval >> 3, 12);243 244 return 0;245}246 247static const u8 ina3221_in_reg[] = {248 INA3221_BUS1,249 INA3221_BUS2,250 INA3221_BUS3,251 INA3221_SHUNT1,252 INA3221_SHUNT2,253 INA3221_SHUNT3,254 INA3221_SHUNT_SUM,255};256 257static int ina3221_read_chip(struct device *dev, u32 attr, long *val)258{259 struct ina3221_data *ina = dev_get_drvdata(dev);260 int regval;261 262 switch (attr) {263 case hwmon_chip_samples:264 regval = INA3221_CONFIG_AVG(ina->reg_config);265 *val = ina3221_avg_samples[regval];266 return 0;267 case hwmon_chip_update_interval:268 /* Return in msec */269 *val = ina3221_reg_to_interval_us(ina->reg_config);270 *val = DIV_ROUND_CLOSEST(*val, 1000);271 return 0;272 default:273 return -EOPNOTSUPP;274 }275}276 277static int ina3221_read_in(struct device *dev, u32 attr, int channel, long *val)278{279 const bool is_shunt = channel > INA3221_CHANNEL3;280 struct ina3221_data *ina = dev_get_drvdata(dev);281 u8 reg = ina3221_in_reg[channel];282 int regval, ret;283 284 /*285 * Translate shunt channel index to sensor channel index except286 * the 7th channel (6 since being 0-aligned) is for summation.287 */288 if (channel != 6)289 channel %= INA3221_NUM_CHANNELS;290 291 switch (attr) {292 case hwmon_in_input:293 if (!ina3221_is_enabled(ina, channel))294 return -ENODATA;295 296 /* Write CONFIG register to trigger a single-shot measurement */297 if (ina->single_shot) {298 regmap_write(ina->regmap, INA3221_CONFIG,299 ina->reg_config);300 301 ret = ina3221_wait_for_data(ina);302 if (ret)303 return ret;304 }305 306 ret = ina3221_read_value(ina, reg, ®val);307 if (ret)308 return ret;309 310 /*311 * Scale of shunt voltage (uV): LSB is 40uV312 * Scale of bus voltage (mV): LSB is 8mV313 */314 *val = regval * (is_shunt ? 40 : 8);315 return 0;316 case hwmon_in_enable:317 *val = ina3221_is_enabled(ina, channel);318 return 0;319 default:320 return -EOPNOTSUPP;321 }322}323 324static const u8 ina3221_curr_reg[][INA3221_NUM_CHANNELS + 1] = {325 [hwmon_curr_input] = { INA3221_SHUNT1, INA3221_SHUNT2,326 INA3221_SHUNT3, INA3221_SHUNT_SUM },327 [hwmon_curr_max] = { INA3221_WARN1, INA3221_WARN2, INA3221_WARN3, 0 },328 [hwmon_curr_crit] = { INA3221_CRIT1, INA3221_CRIT2,329 INA3221_CRIT3, INA3221_CRIT_SUM },330 [hwmon_curr_max_alarm] = { F_WF1, F_WF2, F_WF3, 0 },331 [hwmon_curr_crit_alarm] = { F_CF1, F_CF2, F_CF3, F_SF },332};333 334static int ina3221_read_curr(struct device *dev, u32 attr,335 int channel, long *val)336{337 struct ina3221_data *ina = dev_get_drvdata(dev);338 struct ina3221_input *input = ina->inputs;339 u8 reg = ina3221_curr_reg[attr][channel];340 int resistance_uo, voltage_nv;341 int regval, ret;342 343 if (channel > INA3221_CHANNEL3)344 resistance_uo = ina->summation_shunt_resistor;345 else346 resistance_uo = input[channel].shunt_resistor;347 348 switch (attr) {349 case hwmon_curr_input:350 if (!ina3221_is_enabled(ina, channel))351 return -ENODATA;352 353 /* Write CONFIG register to trigger a single-shot measurement */354 if (ina->single_shot) {355 regmap_write(ina->regmap, INA3221_CONFIG,356 ina->reg_config);357 358 ret = ina3221_wait_for_data(ina);359 if (ret)360 return ret;361 }362 363 fallthrough;364 case hwmon_curr_crit:365 case hwmon_curr_max:366 if (!resistance_uo)367 return -ENODATA;368 369 ret = ina3221_read_value(ina, reg, ®val);370 if (ret)371 return ret;372 373 /* Scale of shunt voltage: LSB is 40uV (40000nV) */374 voltage_nv = regval * 40000;375 /* Return current in mA */376 *val = DIV_ROUND_CLOSEST(voltage_nv, resistance_uo);377 return 0;378 case hwmon_curr_crit_alarm:379 case hwmon_curr_max_alarm:380 /* No actual register read if channel is disabled */381 if (!ina3221_is_enabled(ina, channel)) {382 /* Return 0 for alert flags */383 *val = 0;384 return 0;385 }386 ret = regmap_field_read(ina->fields[reg], ®val);387 if (ret)388 return ret;389 *val = regval;390 return 0;391 default:392 return -EOPNOTSUPP;393 }394}395 396static int ina3221_write_chip(struct device *dev, u32 attr, long val)397{398 struct ina3221_data *ina = dev_get_drvdata(dev);399 int ret, idx;400 u32 tmp;401 402 switch (attr) {403 case hwmon_chip_samples:404 idx = find_closest(val, ina3221_avg_samples,405 ARRAY_SIZE(ina3221_avg_samples));406 407 tmp = (ina->reg_config & ~INA3221_CONFIG_AVG_MASK) |408 (idx << INA3221_CONFIG_AVG_SHIFT);409 ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);410 if (ret)411 return ret;412 413 /* Update reg_config accordingly */414 ina->reg_config = tmp;415 return 0;416 case hwmon_chip_update_interval:417 tmp = ina3221_interval_ms_to_conv_time(ina->reg_config, val);418 idx = find_closest(tmp, ina3221_conv_time,419 ARRAY_SIZE(ina3221_conv_time));420 421 /* Update Bus and Shunt voltage conversion times */422 tmp = INA3221_CONFIG_VBUS_CT_MASK | INA3221_CONFIG_VSH_CT_MASK;423 tmp = (ina->reg_config & ~tmp) |424 (idx << INA3221_CONFIG_VBUS_CT_SHIFT) |425 (idx << INA3221_CONFIG_VSH_CT_SHIFT);426 ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);427 if (ret)428 return ret;429 430 /* Update reg_config accordingly */431 ina->reg_config = tmp;432 return 0;433 default:434 return -EOPNOTSUPP;435 }436}437 438static int ina3221_write_curr(struct device *dev, u32 attr,439 int channel, long val)440{441 struct ina3221_data *ina = dev_get_drvdata(dev);442 struct ina3221_input *input = ina->inputs;443 u8 reg = ina3221_curr_reg[attr][channel];444 int resistance_uo, current_ma, voltage_uv;445 int regval;446 447 if (channel > INA3221_CHANNEL3)448 resistance_uo = ina->summation_shunt_resistor;449 else450 resistance_uo = input[channel].shunt_resistor;451 452 if (!resistance_uo)453 return -EOPNOTSUPP;454 455 /* clamp current */456 current_ma = clamp_val(val,457 INT_MIN / resistance_uo,458 INT_MAX / resistance_uo);459 460 voltage_uv = DIV_ROUND_CLOSEST(current_ma * resistance_uo, 1000);461 462 /* clamp voltage */463 voltage_uv = clamp_val(voltage_uv, -163800, 163800);464 465 /*466 * Formula to convert voltage_uv to register value:467 * regval = (voltage_uv / scale) << shift468 * Note:469 * The scale is 40uV for all shunt voltage registers470 * Shunt Voltage Sum register left-shifts 1 bit471 * All other Shunt Voltage registers shift 3 bits472 * Results:473 * SHUNT_SUM: (1 / 40uV) << 1 = 1 / 20uV474 * SHUNT[1-3]: (1 / 40uV) << 3 = 1 / 5uV475 */476 if (reg == INA3221_SHUNT_SUM || reg == INA3221_CRIT_SUM)477 regval = DIV_ROUND_CLOSEST(voltage_uv, 20) & 0xfffe;478 else479 regval = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8;480 481 return regmap_write(ina->regmap, reg, regval);482}483 484static int ina3221_write_enable(struct device *dev, int channel, bool enable)485{486 struct ina3221_data *ina = dev_get_drvdata(dev);487 u16 config, mask = INA3221_CONFIG_CHx_EN(channel);488 u16 config_old = ina->reg_config & mask;489 u32 tmp;490 int ret;491 492 config = enable ? mask : 0;493 494 /* Bypass if enable status is not being changed */495 if (config_old == config)496 return 0;497 498 /* For enabling routine, increase refcount and resume() at first */499 if (enable) {500 ret = pm_runtime_resume_and_get(ina->pm_dev);501 if (ret < 0) {502 dev_err(dev, "Failed to get PM runtime\n");503 return ret;504 }505 }506 507 /* Enable or disable the channel */508 tmp = (ina->reg_config & ~mask) | (config & mask);509 ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);510 if (ret)511 goto fail;512 513 /* Cache the latest config register value */514 ina->reg_config = tmp;515 516 /* For disabling routine, decrease refcount or suspend() at last */517 if (!enable)518 pm_runtime_put_sync(ina->pm_dev);519 520 return 0;521 522fail:523 if (enable) {524 dev_err(dev, "Failed to enable channel %d: error %d\n",525 channel, ret);526 pm_runtime_put_sync(ina->pm_dev);527 }528 529 return ret;530}531 532static int ina3221_read(struct device *dev, enum hwmon_sensor_types type,533 u32 attr, int channel, long *val)534{535 struct ina3221_data *ina = dev_get_drvdata(dev);536 int ret;537 538 mutex_lock(&ina->lock);539 540 switch (type) {541 case hwmon_chip:542 ret = ina3221_read_chip(dev, attr, val);543 break;544 case hwmon_in:545 /* 0-align channel ID */546 ret = ina3221_read_in(dev, attr, channel - 1, val);547 break;548 case hwmon_curr:549 ret = ina3221_read_curr(dev, attr, channel, val);550 break;551 default:552 ret = -EOPNOTSUPP;553 break;554 }555 556 mutex_unlock(&ina->lock);557 558 return ret;559}560 561static int ina3221_write(struct device *dev, enum hwmon_sensor_types type,562 u32 attr, int channel, long val)563{564 struct ina3221_data *ina = dev_get_drvdata(dev);565 int ret;566 567 mutex_lock(&ina->lock);568 569 switch (type) {570 case hwmon_chip:571 ret = ina3221_write_chip(dev, attr, val);572 break;573 case hwmon_in:574 /* 0-align channel ID */575 ret = ina3221_write_enable(dev, channel - 1, val);576 break;577 case hwmon_curr:578 ret = ina3221_write_curr(dev, attr, channel, val);579 break;580 default:581 ret = -EOPNOTSUPP;582 break;583 }584 585 mutex_unlock(&ina->lock);586 587 return ret;588}589 590static int ina3221_read_string(struct device *dev, enum hwmon_sensor_types type,591 u32 attr, int channel, const char **str)592{593 struct ina3221_data *ina = dev_get_drvdata(dev);594 int index = channel - 1;595 596 if (channel == 7)597 *str = "sum of shunt voltages";598 else599 *str = ina->inputs[index].label;600 601 return 0;602}603 604static umode_t ina3221_is_visible(const void *drvdata,605 enum hwmon_sensor_types type,606 u32 attr, int channel)607{608 const struct ina3221_data *ina = drvdata;609 const struct ina3221_input *input = NULL;610 611 switch (type) {612 case hwmon_chip:613 switch (attr) {614 case hwmon_chip_samples:615 case hwmon_chip_update_interval:616 return 0644;617 default:618 return 0;619 }620 case hwmon_in:621 /* Ignore in0_ */622 if (channel == 0)623 return 0;624 625 switch (attr) {626 case hwmon_in_label:627 if (channel - 1 <= INA3221_CHANNEL3)628 input = &ina->inputs[channel - 1];629 else if (channel == 7)630 return 0444;631 /* Hide label node if label is not provided */632 return (input && input->label) ? 0444 : 0;633 case hwmon_in_input:634 return 0444;635 case hwmon_in_enable:636 return 0644;637 default:638 return 0;639 }640 case hwmon_curr:641 switch (attr) {642 case hwmon_curr_input:643 case hwmon_curr_crit_alarm:644 case hwmon_curr_max_alarm:645 return 0444;646 case hwmon_curr_crit:647 case hwmon_curr_max:648 return 0644;649 default:650 return 0;651 }652 default:653 return 0;654 }655}656 657#define INA3221_HWMON_CURR_CONFIG (HWMON_C_INPUT | \658 HWMON_C_CRIT | HWMON_C_CRIT_ALARM | \659 HWMON_C_MAX | HWMON_C_MAX_ALARM)660 661static const struct hwmon_channel_info * const ina3221_info[] = {662 HWMON_CHANNEL_INFO(chip,663 HWMON_C_SAMPLES,664 HWMON_C_UPDATE_INTERVAL),665 HWMON_CHANNEL_INFO(in,666 /* 0: dummy, skipped in is_visible */667 HWMON_I_INPUT,668 /* 1-3: input voltage Channels */669 HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,670 HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,671 HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,672 /* 4-6: shunt voltage Channels */673 HWMON_I_INPUT,674 HWMON_I_INPUT,675 HWMON_I_INPUT,676 /* 7: summation of shunt voltage channels */677 HWMON_I_INPUT | HWMON_I_LABEL),678 HWMON_CHANNEL_INFO(curr,679 /* 1-3: current channels*/680 INA3221_HWMON_CURR_CONFIG,681 INA3221_HWMON_CURR_CONFIG,682 INA3221_HWMON_CURR_CONFIG,683 /* 4: summation of current channels */684 HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM),685 NULL686};687 688static const struct hwmon_ops ina3221_hwmon_ops = {689 .is_visible = ina3221_is_visible,690 .read_string = ina3221_read_string,691 .read = ina3221_read,692 .write = ina3221_write,693};694 695static const struct hwmon_chip_info ina3221_chip_info = {696 .ops = &ina3221_hwmon_ops,697 .info = ina3221_info,698};699 700/* Extra attribute groups */701static ssize_t ina3221_shunt_show(struct device *dev,702 struct device_attribute *attr, char *buf)703{704 struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);705 struct ina3221_data *ina = dev_get_drvdata(dev);706 unsigned int channel = sd_attr->index;707 struct ina3221_input *input = &ina->inputs[channel];708 709 return sysfs_emit(buf, "%d\n", input->shunt_resistor);710}711 712static ssize_t ina3221_shunt_store(struct device *dev,713 struct device_attribute *attr,714 const char *buf, size_t count)715{716 struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);717 struct ina3221_data *ina = dev_get_drvdata(dev);718 unsigned int channel = sd_attr->index;719 struct ina3221_input *input = &ina->inputs[channel];720 int val;721 int ret;722 723 ret = kstrtoint(buf, 0, &val);724 if (ret)725 return ret;726 727 val = clamp_val(val, 1, INT_MAX);728 729 input->shunt_resistor = val;730 731 /* Update summation_shunt_resistor for summation channel */732 ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);733 734 return count;735}736 737/* shunt resistance */738static SENSOR_DEVICE_ATTR_RW(shunt1_resistor, ina3221_shunt, INA3221_CHANNEL1);739static SENSOR_DEVICE_ATTR_RW(shunt2_resistor, ina3221_shunt, INA3221_CHANNEL2);740static SENSOR_DEVICE_ATTR_RW(shunt3_resistor, ina3221_shunt, INA3221_CHANNEL3);741 742static struct attribute *ina3221_attrs[] = {743 &sensor_dev_attr_shunt1_resistor.dev_attr.attr,744 &sensor_dev_attr_shunt2_resistor.dev_attr.attr,745 &sensor_dev_attr_shunt3_resistor.dev_attr.attr,746 NULL,747};748ATTRIBUTE_GROUPS(ina3221);749 750static const struct regmap_range ina3221_yes_ranges[] = {751 regmap_reg_range(INA3221_CONFIG, INA3221_BUS3),752 regmap_reg_range(INA3221_SHUNT_SUM, INA3221_SHUNT_SUM),753 regmap_reg_range(INA3221_MASK_ENABLE, INA3221_MASK_ENABLE),754};755 756static const struct regmap_access_table ina3221_volatile_table = {757 .yes_ranges = ina3221_yes_ranges,758 .n_yes_ranges = ARRAY_SIZE(ina3221_yes_ranges),759};760 761static const struct regmap_config ina3221_regmap_config = {762 .reg_bits = 8,763 .val_bits = 16,764 765 .cache_type = REGCACHE_MAPLE,766 .volatile_table = &ina3221_volatile_table,767};768 769static int ina3221_probe_child_from_dt(struct device *dev,770 struct device_node *child,771 struct ina3221_data *ina)772{773 struct ina3221_input *input;774 u32 val;775 int ret;776 777 ret = of_property_read_u32(child, "reg", &val);778 if (ret) {779 dev_err(dev, "missing reg property of %pOFn\n", child);780 return ret;781 } else if (val > INA3221_CHANNEL3) {782 dev_err(dev, "invalid reg %d of %pOFn\n", val, child);783 return -EINVAL;784 }785 786 input = &ina->inputs[val];787 788 /* Log the disconnected channel input */789 if (!of_device_is_available(child)) {790 input->disconnected = true;791 return 0;792 }793 794 /* Save the connected input label if available */795 of_property_read_string(child, "label", &input->label);796 797 /* summation channel control */798 input->summation_disable = of_property_read_bool(child, "ti,summation-disable");799 800 /* Overwrite default shunt resistor value optionally */801 if (!of_property_read_u32(child, "shunt-resistor-micro-ohms", &val)) {802 if (val < 1 || val > INT_MAX) {803 dev_err(dev, "invalid shunt resistor value %u of %pOFn\n",804 val, child);805 return -EINVAL;806 }807 input->shunt_resistor = val;808 }809 810 return 0;811}812 813static int ina3221_probe_from_dt(struct device *dev, struct ina3221_data *ina)814{815 const struct device_node *np = dev->of_node;816 int ret;817 818 /* Compatible with non-DT platforms */819 if (!np)820 return 0;821 822 ina->single_shot = of_property_read_bool(np, "ti,single-shot");823 824 for_each_child_of_node_scoped(np, child) {825 ret = ina3221_probe_child_from_dt(dev, child, ina);826 if (ret)827 return ret;828 }829 830 return 0;831}832 833static int ina3221_probe(struct i2c_client *client)834{835 struct device *dev = &client->dev;836 struct ina3221_data *ina;837 struct device *hwmon_dev;838 char name[32];839 int i, ret;840 841 ina = devm_kzalloc(dev, sizeof(*ina), GFP_KERNEL);842 if (!ina)843 return -ENOMEM;844 845 ina->regmap = devm_regmap_init_i2c(client, &ina3221_regmap_config);846 if (IS_ERR(ina->regmap)) {847 dev_err(dev, "Unable to allocate register map\n");848 return PTR_ERR(ina->regmap);849 }850 851 for (i = 0; i < F_MAX_FIELDS; i++) {852 ina->fields[i] = devm_regmap_field_alloc(dev,853 ina->regmap,854 ina3221_reg_fields[i]);855 if (IS_ERR(ina->fields[i])) {856 dev_err(dev, "Unable to allocate regmap fields\n");857 return PTR_ERR(ina->fields[i]);858 }859 }860 861 for (i = 0; i < INA3221_NUM_CHANNELS; i++)862 ina->inputs[i].shunt_resistor = INA3221_RSHUNT_DEFAULT;863 864 ret = ina3221_probe_from_dt(dev, ina);865 if (ret) {866 dev_err(dev, "Unable to probe from device tree\n");867 return ret;868 }869 870 /* The driver will be reset, so use reset value */871 ina->reg_config = INA3221_CONFIG_DEFAULT;872 873 /* Clear continuous bit to use single-shot mode */874 if (ina->single_shot)875 ina->reg_config &= ~INA3221_CONFIG_MODE_CONTINUOUS;876 877 /* Disable channels if their inputs are disconnected */878 for (i = 0; i < INA3221_NUM_CHANNELS; i++) {879 if (ina->inputs[i].disconnected)880 ina->reg_config &= ~INA3221_CONFIG_CHx_EN(i);881 }882 883 /* Initialize summation_shunt_resistor for summation channel control */884 ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);885 for (i = 0; i < INA3221_NUM_CHANNELS; i++) {886 if (!ina->inputs[i].summation_disable)887 ina->summation_channel_control |= BIT(14 - i);888 }889 890 ina->pm_dev = dev;891 mutex_init(&ina->lock);892 dev_set_drvdata(dev, ina);893 894 /* Enable PM runtime -- status is suspended by default */895 pm_runtime_enable(ina->pm_dev);896 897 /* Initialize (resume) the device */898 for (i = 0; i < INA3221_NUM_CHANNELS; i++) {899 if (ina->inputs[i].disconnected)900 continue;901 /* Match the refcount with number of enabled channels */902 ret = pm_runtime_get_sync(ina->pm_dev);903 if (ret < 0)904 goto fail;905 }906 907 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, ina,908 &ina3221_chip_info,909 ina3221_groups);910 if (IS_ERR(hwmon_dev)) {911 dev_err(dev, "Unable to register hwmon device\n");912 ret = PTR_ERR(hwmon_dev);913 goto fail;914 }915 916 scnprintf(name, sizeof(name), "%s-%s", INA3221_DRIVER_NAME, dev_name(dev));917 ina->debugfs = debugfs_create_dir(name, NULL);918 919 for (i = 0; i < INA3221_NUM_CHANNELS; i++) {920 scnprintf(name, sizeof(name), "in%d_summation_disable", i);921 debugfs_create_bool(name, 0400, ina->debugfs,922 &ina->inputs[i].summation_disable);923 }924 925 return 0;926 927fail:928 pm_runtime_disable(ina->pm_dev);929 pm_runtime_set_suspended(ina->pm_dev);930 /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */931 for (i = 0; i < INA3221_NUM_CHANNELS; i++)932 pm_runtime_put_noidle(ina->pm_dev);933 mutex_destroy(&ina->lock);934 935 return ret;936}937 938static void ina3221_remove(struct i2c_client *client)939{940 struct ina3221_data *ina = dev_get_drvdata(&client->dev);941 int i;942 943 debugfs_remove_recursive(ina->debugfs);944 945 pm_runtime_disable(ina->pm_dev);946 pm_runtime_set_suspended(ina->pm_dev);947 948 /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */949 for (i = 0; i < INA3221_NUM_CHANNELS; i++)950 pm_runtime_put_noidle(ina->pm_dev);951 952 mutex_destroy(&ina->lock);953}954 955static int ina3221_suspend(struct device *dev)956{957 struct ina3221_data *ina = dev_get_drvdata(dev);958 int ret;959 960 /* Save config register value and enable cache-only */961 ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config);962 if (ret)963 return ret;964 965 /* Set to power-down mode for power saving */966 ret = regmap_update_bits(ina->regmap, INA3221_CONFIG,967 INA3221_CONFIG_MODE_MASK,968 INA3221_CONFIG_MODE_POWERDOWN);969 if (ret)970 return ret;971 972 regcache_cache_only(ina->regmap, true);973 regcache_mark_dirty(ina->regmap);974 975 return 0;976}977 978static int ina3221_resume(struct device *dev)979{980 struct ina3221_data *ina = dev_get_drvdata(dev);981 int ret;982 983 regcache_cache_only(ina->regmap, false);984 985 /* Software reset the chip */986 ret = regmap_field_write(ina->fields[F_RST], true);987 if (ret) {988 dev_err(dev, "Unable to reset device\n");989 return ret;990 }991 992 /* Restore cached register values to hardware */993 ret = regcache_sync(ina->regmap);994 if (ret)995 return ret;996 997 /* Restore config register value to hardware */998 ret = regmap_write(ina->regmap, INA3221_CONFIG, ina->reg_config);999 if (ret)1000 return ret;1001 1002 /* Initialize summation channel control */1003 if (ina->summation_shunt_resistor) {1004 /*1005 * Sum only channels that are not disabled for summation.1006 * Shunt measurements of disconnected channels should1007 * be 0, so it does not matter for summation.1008 */1009 ret = regmap_update_bits(ina->regmap, INA3221_MASK_ENABLE,1010 INA3221_MASK_ENABLE_SCC_MASK,1011 ina->summation_channel_control);1012 if (ret) {1013 dev_err(dev, "Unable to control summation channel\n");1014 return ret;1015 }1016 }1017 1018 return 0;1019}1020 1021static DEFINE_RUNTIME_DEV_PM_OPS(ina3221_pm, ina3221_suspend, ina3221_resume,1022 NULL);1023 1024static const struct of_device_id ina3221_of_match_table[] = {1025 { .compatible = "ti,ina3221", },1026 { /* sentinel */ }1027};1028MODULE_DEVICE_TABLE(of, ina3221_of_match_table);1029 1030static const struct i2c_device_id ina3221_ids[] = {1031 { "ina3221" },1032 { /* sentinel */ }1033};1034MODULE_DEVICE_TABLE(i2c, ina3221_ids);1035 1036static struct i2c_driver ina3221_i2c_driver = {1037 .probe = ina3221_probe,1038 .remove = ina3221_remove,1039 .driver = {1040 .name = INA3221_DRIVER_NAME,1041 .of_match_table = ina3221_of_match_table,1042 .pm = pm_ptr(&ina3221_pm),1043 },1044 .id_table = ina3221_ids,1045};1046module_i2c_driver(ina3221_i2c_driver);1047 1048MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");1049MODULE_DESCRIPTION("Texas Instruments INA3221 HWMon Driver");1050MODULE_LICENSE("GPL v2");1051