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1// SPDX-License-Identifier: GPL-2.0-or-later2/*3 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware4 * monitoring5 * Copyright (C) 2003-2010 Jean Delvare <jdelvare@suse.de>6 *7 * Based on the lm83 driver. The LM90 is a sensor chip made by National8 * Semiconductor. It reports up to two temperatures (its own plus up to9 * one external one) with a 0.125 deg resolution (1 deg for local10 * temperature) and a 3-4 deg accuracy.11 *12 * This driver also supports the LM89 and LM99, two other sensor chips13 * made by National Semiconductor. Both have an increased remote14 * temperature measurement accuracy (1 degree), and the LM9915 * additionally shifts remote temperatures (measured and limits) by 1616 * degrees, which allows for higher temperatures measurement.17 * Note that there is no way to differentiate between both chips.18 * When device is auto-detected, the driver will assume an LM99.19 *20 * This driver also supports the LM86, another sensor chip made by21 * National Semiconductor. It is exactly similar to the LM90 except it22 * has a higher accuracy.23 *24 * This driver also supports the ADM1032, a sensor chip made by Analog25 * Devices. That chip is similar to the LM90, with a few differences26 * that are not handled by this driver. Among others, it has a higher27 * accuracy than the LM90, much like the LM86 does.28 *29 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor30 * chips made by Maxim. These chips are similar to the LM86.31 * Note that there is no easy way to differentiate between the three32 * variants. We use the device address to detect MAX6659, which will result33 * in a detection as max6657 if it is on address 0x4c. The extra address34 * and features of the MAX6659 are only supported if the chip is configured35 * explicitly as max6659, or if its address is not 0x4c.36 * These chips lack the remote temperature offset feature.37 *38 * This driver also supports the MAX6654 chip made by Maxim. This chip can be39 * at 9 different addresses, similar to MAX6680/MAX6681. The MAX6654 is similar40 * to MAX6657/MAX6658/MAX6659, but does not support critical temperature41 * limits. Extended range is available by setting the configuration register42 * accordingly, and is done during initialization. Extended precision is only43 * available at conversion rates of 1 Hz and slower. Note that extended44 * precision is not enabled by default, as this driver initializes all chips45 * to 2 Hz by design. The driver also supports MAX6690, which is practically46 * identical to MAX6654.47 *48 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and49 * MAX6692 chips made by Maxim. These are again similar to the LM86,50 * but they use unsigned temperature values and can report temperatures51 * from 0 to 145 degrees.52 *53 * This driver also supports the MAX6680 and MAX6681, two other sensor54 * chips made by Maxim. These are quite similar to the other Maxim55 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can56 * be treated identically.57 *58 * This driver also supports the MAX6695 and MAX6696, two other sensor59 * chips made by Maxim. These are also quite similar to other Maxim60 * chips, but support three temperature sensors instead of two. MAX669561 * and MAX6696 only differ in the pinout so they can be treated identically.62 *63 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as64 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility65 * and extended mode. They are mostly compatible with LM90 except for a data66 * format difference for the temperature value registers.67 *68 * This driver also supports ADT7481, ADT7482, and ADT7483 from Analog Devices69 * / ON Semiconductor. The chips are similar to ADT7461 but support two external70 * temperature sensors.71 *72 * This driver also supports NCT72, NCT214, and NCT218 from ON Semiconductor.73 * The chips are similar to ADT7461/ADT7461A but have full PEC support74 * (undocumented).75 *76 * This driver also supports the SA56004 from Philips. This device is77 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.78 *79 * This driver also supports the G781 from GMT. This device is compatible80 * with the ADM1032.81 *82 * This driver also supports TMP451 and TMP461 from Texas Instruments.83 * Those devices are supported in both compatibility and extended mode.84 * They are mostly compatible with ADT7461 except for local temperature85 * low byte register and max conversion rate.86 *87 * This driver also supports MAX1617 and various clones such as G76788 * and NE1617. Such clones will be detected as MAX1617.89 *90 * This driver also supports NE1618 from Philips. It is similar to NE161791 * but supports 11 bit external temperature values.92 *93 * Since the LM90 was the first chipset supported by this driver, most94 * comments will refer to this chipset, but are actually general and95 * concern all supported chipsets, unless mentioned otherwise.96 */97 98#include <linux/bits.h>99#include <linux/device.h>100#include <linux/err.h>101#include <linux/i2c.h>102#include <linux/init.h>103#include <linux/interrupt.h>104#include <linux/jiffies.h>105#include <linux/hwmon.h>106#include <linux/kstrtox.h>107#include <linux/module.h>108#include <linux/mutex.h>109#include <linux/of.h>110#include <linux/regulator/consumer.h>111#include <linux/slab.h>112#include <linux/workqueue.h>113 114/* The maximum number of channels currently supported */115#define MAX_CHANNELS 3116 117/*118 * Addresses to scan119 * Address is fully defined internally and cannot be changed except for120 * MAX6659, MAX6680 and MAX6681.121 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,122 * MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.123 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D124 * have address 0x4d.125 * MAX6647 has address 0x4e.126 * MAX6659 can have address 0x4c, 0x4d or 0x4e.127 * MAX6654, MAX6680, and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29,128 * 0x2a, 0x2b, 0x4c, 0x4d or 0x4e.129 * SA56004 can have address 0x48 through 0x4F.130 */131 132static const unsigned short normal_i2c[] = {133 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,134 0x4d, 0x4e, 0x4f, I2C_CLIENT_END };135 136enum chips { adm1023, adm1032, adt7461, adt7461a, adt7481,137 g781, lm84, lm90, lm99,138 max1617, max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696,139 nct210, nct72, ne1618, sa56004, tmp451, tmp461, w83l771,140};141 142/*143 * The LM90 registers144 */145 146#define LM90_REG_MAN_ID 0xFE147#define LM90_REG_CHIP_ID 0xFF148#define LM90_REG_CONFIG1 0x03149#define LM90_REG_CONFIG2 0xBF150#define LM90_REG_CONVRATE 0x04151#define LM90_REG_STATUS 0x02152#define LM90_REG_LOCAL_TEMP 0x00153#define LM90_REG_LOCAL_HIGH 0x05154#define LM90_REG_LOCAL_LOW 0x06155#define LM90_REG_LOCAL_CRIT 0x20156#define LM90_REG_REMOTE_TEMPH 0x01157#define LM90_REG_REMOTE_TEMPL 0x10158#define LM90_REG_REMOTE_OFFSH 0x11159#define LM90_REG_REMOTE_OFFSL 0x12160#define LM90_REG_REMOTE_HIGHH 0x07161#define LM90_REG_REMOTE_HIGHL 0x13162#define LM90_REG_REMOTE_LOWH 0x08163#define LM90_REG_REMOTE_LOWL 0x14164#define LM90_REG_REMOTE_CRIT 0x19165#define LM90_REG_TCRIT_HYST 0x21166 167/* MAX6646/6647/6649/6654/6657/6658/6659/6695/6696 registers */168 169#define MAX6657_REG_LOCAL_TEMPL 0x11170#define MAX6696_REG_STATUS2 0x12171#define MAX6659_REG_REMOTE_EMERG 0x16172#define MAX6659_REG_LOCAL_EMERG 0x17173 174/* SA56004 registers */175 176#define SA56004_REG_LOCAL_TEMPL 0x22177 178#define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */179 180/* TMP451/TMP461 registers */181#define TMP451_REG_LOCAL_TEMPL 0x15182#define TMP451_REG_CONALERT 0x22183 184#define TMP461_REG_CHEN 0x16185#define TMP461_REG_DFC 0x24186 187/* ADT7481 registers */188#define ADT7481_REG_STATUS2 0x23189#define ADT7481_REG_CONFIG2 0x24190 191#define ADT7481_REG_MAN_ID 0x3e192#define ADT7481_REG_CHIP_ID 0x3d193 194/* Device features */195#define LM90_HAVE_EXTENDED_TEMP BIT(0) /* extended temperature support */196#define LM90_HAVE_OFFSET BIT(1) /* temperature offset register */197#define LM90_HAVE_UNSIGNED_TEMP BIT(2) /* temperatures are unsigned */198#define LM90_HAVE_REM_LIMIT_EXT BIT(3) /* extended remote limit */199#define LM90_HAVE_EMERGENCY BIT(4) /* 3rd upper (emergency) limit */200#define LM90_HAVE_EMERGENCY_ALARM BIT(5)/* emergency alarm */201#define LM90_HAVE_TEMP3 BIT(6) /* 3rd temperature sensor */202#define LM90_HAVE_BROKEN_ALERT BIT(7) /* Broken alert */203#define LM90_PAUSE_FOR_CONFIG BIT(8) /* Pause conversion for config */204#define LM90_HAVE_CRIT BIT(9) /* Chip supports CRIT/OVERT register */205#define LM90_HAVE_CRIT_ALRM_SWP BIT(10) /* critical alarm bits swapped */206#define LM90_HAVE_PEC BIT(11) /* Chip supports PEC */207#define LM90_HAVE_PARTIAL_PEC BIT(12) /* Partial PEC support (adm1032)*/208#define LM90_HAVE_ALARMS BIT(13) /* Create 'alarms' attribute */209#define LM90_HAVE_EXT_UNSIGNED BIT(14) /* extended unsigned temperature*/210#define LM90_HAVE_LOW BIT(15) /* low limits */211#define LM90_HAVE_CONVRATE BIT(16) /* conversion rate */212#define LM90_HAVE_REMOTE_EXT BIT(17) /* extended remote temperature */213#define LM90_HAVE_FAULTQUEUE BIT(18) /* configurable samples count */214 215/* LM90 status */216#define LM90_STATUS_LTHRM BIT(0) /* local THERM limit tripped */217#define LM90_STATUS_RTHRM BIT(1) /* remote THERM limit tripped */218#define LM90_STATUS_ROPEN BIT(2) /* remote is an open circuit */219#define LM90_STATUS_RLOW BIT(3) /* remote low temp limit tripped */220#define LM90_STATUS_RHIGH BIT(4) /* remote high temp limit tripped */221#define LM90_STATUS_LLOW BIT(5) /* local low temp limit tripped */222#define LM90_STATUS_LHIGH BIT(6) /* local high temp limit tripped */223#define LM90_STATUS_BUSY BIT(7) /* conversion is ongoing */224 225/* MAX6695/6696 and ADT7481 2nd status register */226#define MAX6696_STATUS2_R2THRM BIT(1) /* remote2 THERM limit tripped */227#define MAX6696_STATUS2_R2OPEN BIT(2) /* remote2 is an open circuit */228#define MAX6696_STATUS2_R2LOW BIT(3) /* remote2 low temp limit tripped */229#define MAX6696_STATUS2_R2HIGH BIT(4) /* remote2 high temp limit tripped */230#define MAX6696_STATUS2_ROT2 BIT(5) /* remote emergency limit tripped */231#define MAX6696_STATUS2_R2OT2 BIT(6) /* remote2 emergency limit tripped */232#define MAX6696_STATUS2_LOT2 BIT(7) /* local emergency limit tripped */233 234/*235 * Driver data (common to all clients)236 */237 238static const struct i2c_device_id lm90_id[] = {239 { "adm1020", max1617 },240 { "adm1021", max1617 },241 { "adm1023", adm1023 },242 { "adm1032", adm1032 },243 { "adt7421", adt7461a },244 { "adt7461", adt7461 },245 { "adt7461a", adt7461a },246 { "adt7481", adt7481 },247 { "adt7482", adt7481 },248 { "adt7483a", adt7481 },249 { "g781", g781 },250 { "gl523sm", max1617 },251 { "lm84", lm84 },252 { "lm86", lm90 },253 { "lm89", lm90 },254 { "lm90", lm90 },255 { "lm99", lm99 },256 { "max1617", max1617 },257 { "max6642", max6642 },258 { "max6646", max6646 },259 { "max6647", max6646 },260 { "max6648", max6648 },261 { "max6649", max6646 },262 { "max6654", max6654 },263 { "max6657", max6657 },264 { "max6658", max6657 },265 { "max6659", max6659 },266 { "max6680", max6680 },267 { "max6681", max6680 },268 { "max6690", max6654 },269 { "max6692", max6648 },270 { "max6695", max6696 },271 { "max6696", max6696 },272 { "mc1066", max1617 },273 { "nct1008", adt7461a },274 { "nct210", nct210 },275 { "nct214", nct72 },276 { "nct218", nct72 },277 { "nct72", nct72 },278 { "ne1618", ne1618 },279 { "w83l771", w83l771 },280 { "sa56004", sa56004 },281 { "thmc10", max1617 },282 { "tmp451", tmp451 },283 { "tmp461", tmp461 },284 { }285};286MODULE_DEVICE_TABLE(i2c, lm90_id);287 288static const struct of_device_id __maybe_unused lm90_of_match[] = {289 {290 .compatible = "adi,adm1032",291 .data = (void *)adm1032292 },293 {294 .compatible = "adi,adt7461",295 .data = (void *)adt7461296 },297 {298 .compatible = "adi,adt7461a",299 .data = (void *)adt7461a300 },301 {302 .compatible = "adi,adt7481",303 .data = (void *)adt7481304 },305 {306 .compatible = "gmt,g781",307 .data = (void *)g781308 },309 {310 .compatible = "national,lm90",311 .data = (void *)lm90312 },313 {314 .compatible = "national,lm86",315 .data = (void *)lm90316 },317 {318 .compatible = "national,lm89",319 .data = (void *)lm90320 },321 {322 .compatible = "national,lm99",323 .data = (void *)lm99324 },325 {326 .compatible = "dallas,max6646",327 .data = (void *)max6646328 },329 {330 .compatible = "dallas,max6647",331 .data = (void *)max6646332 },333 {334 .compatible = "dallas,max6649",335 .data = (void *)max6646336 },337 {338 .compatible = "dallas,max6654",339 .data = (void *)max6654340 },341 {342 .compatible = "dallas,max6657",343 .data = (void *)max6657344 },345 {346 .compatible = "dallas,max6658",347 .data = (void *)max6657348 },349 {350 .compatible = "dallas,max6659",351 .data = (void *)max6659352 },353 {354 .compatible = "dallas,max6680",355 .data = (void *)max6680356 },357 {358 .compatible = "dallas,max6681",359 .data = (void *)max6680360 },361 {362 .compatible = "dallas,max6695",363 .data = (void *)max6696364 },365 {366 .compatible = "dallas,max6696",367 .data = (void *)max6696368 },369 {370 .compatible = "onnn,nct1008",371 .data = (void *)adt7461a372 },373 {374 .compatible = "onnn,nct214",375 .data = (void *)nct72376 },377 {378 .compatible = "onnn,nct218",379 .data = (void *)nct72380 },381 {382 .compatible = "onnn,nct72",383 .data = (void *)nct72384 },385 {386 .compatible = "winbond,w83l771",387 .data = (void *)w83l771388 },389 {390 .compatible = "nxp,sa56004",391 .data = (void *)sa56004392 },393 {394 .compatible = "ti,tmp451",395 .data = (void *)tmp451396 },397 {398 .compatible = "ti,tmp461",399 .data = (void *)tmp461400 },401 { },402};403MODULE_DEVICE_TABLE(of, lm90_of_match);404 405/*406 * chip type specific parameters407 */408struct lm90_params {409 u32 flags; /* Capabilities */410 u16 alert_alarms; /* Which alarm bits trigger ALERT# */411 /* Upper 8 bits for max6695/96 */412 u8 max_convrate; /* Maximum conversion rate register value */413 u8 resolution; /* 16-bit resolution (default 11 bit) */414 u8 reg_status2; /* 2nd status register (optional) */415 u8 reg_local_ext; /* Extended local temp register (optional) */416 u8 faultqueue_mask; /* fault queue bit mask */417 u8 faultqueue_depth; /* fault queue depth if mask is used */418};419 420static const struct lm90_params lm90_params[] = {421 [adm1023] = {422 .flags = LM90_HAVE_ALARMS | LM90_HAVE_OFFSET | LM90_HAVE_BROKEN_ALERT423 | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE424 | LM90_HAVE_REMOTE_EXT,425 .alert_alarms = 0x7c,426 .resolution = 8,427 .max_convrate = 7,428 },429 [adm1032] = {430 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT431 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT432 | LM90_HAVE_PARTIAL_PEC | LM90_HAVE_ALARMS433 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT434 | LM90_HAVE_FAULTQUEUE,435 .alert_alarms = 0x7c,436 .max_convrate = 10,437 },438 [adt7461] = {439 /*440 * Standard temperature range is supposed to be unsigned,441 * but that does not match reality. Negative temperatures442 * are always reported.443 */444 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT445 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP446 | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC447 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE448 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,449 .alert_alarms = 0x7c,450 .max_convrate = 10,451 .resolution = 10,452 },453 [adt7461a] = {454 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT455 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP456 | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_ALARMS457 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT458 | LM90_HAVE_FAULTQUEUE,459 .alert_alarms = 0x7c,460 .max_convrate = 10,461 },462 [adt7481] = {463 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT464 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP465 | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_PEC466 | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT | LM90_HAVE_LOW467 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT468 | LM90_HAVE_FAULTQUEUE,469 .alert_alarms = 0x1c7c,470 .max_convrate = 11,471 .resolution = 10,472 .reg_status2 = ADT7481_REG_STATUS2,473 },474 [g781] = {475 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT476 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT477 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE478 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,479 .alert_alarms = 0x7c,480 .max_convrate = 7,481 },482 [lm84] = {483 .flags = LM90_HAVE_ALARMS,484 .resolution = 8,485 },486 [lm90] = {487 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT488 | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW489 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT490 | LM90_HAVE_FAULTQUEUE,491 .alert_alarms = 0x7b,492 .max_convrate = 9,493 .faultqueue_mask = BIT(0),494 .faultqueue_depth = 3,495 },496 [lm99] = {497 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT498 | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW499 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT500 | LM90_HAVE_FAULTQUEUE,501 .alert_alarms = 0x7b,502 .max_convrate = 9,503 .faultqueue_mask = BIT(0),504 .faultqueue_depth = 3,505 },506 [max1617] = {507 .flags = LM90_HAVE_CONVRATE | LM90_HAVE_BROKEN_ALERT |508 LM90_HAVE_LOW | LM90_HAVE_ALARMS,509 .alert_alarms = 0x78,510 .resolution = 8,511 .max_convrate = 7,512 },513 [max6642] = {514 .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXT_UNSIGNED515 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,516 .alert_alarms = 0x50,517 .resolution = 10,518 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,519 .faultqueue_mask = BIT(4),520 .faultqueue_depth = 2,521 },522 [max6646] = {523 .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT524 | LM90_HAVE_EXT_UNSIGNED | LM90_HAVE_ALARMS | LM90_HAVE_LOW525 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,526 .alert_alarms = 0x7c,527 .max_convrate = 6,528 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,529 },530 [max6648] = {531 .flags = LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_CRIT532 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_LOW533 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,534 .alert_alarms = 0x7c,535 .max_convrate = 6,536 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,537 },538 [max6654] = {539 .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_ALARMS | LM90_HAVE_LOW540 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,541 .alert_alarms = 0x7c,542 .max_convrate = 7,543 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,544 },545 [max6657] = {546 .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT547 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE548 | LM90_HAVE_REMOTE_EXT,549 .alert_alarms = 0x7c,550 .max_convrate = 8,551 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,552 },553 [max6659] = {554 .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT555 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE556 | LM90_HAVE_REMOTE_EXT,557 .alert_alarms = 0x7c,558 .max_convrate = 8,559 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,560 },561 [max6680] = {562 /*563 * Apparent temperatures of 128 degrees C or higher are reported564 * and treated as negative temperatures (meaning min_alarm will565 * be set).566 */567 .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT568 | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT569 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE570 | LM90_HAVE_REMOTE_EXT,571 .alert_alarms = 0x7c,572 .max_convrate = 7,573 },574 [max6696] = {575 .flags = LM90_HAVE_EMERGENCY576 | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT577 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE578 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,579 .alert_alarms = 0x1c7c,580 .max_convrate = 6,581 .reg_status2 = MAX6696_REG_STATUS2,582 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,583 .faultqueue_mask = BIT(5),584 .faultqueue_depth = 4,585 },586 [nct72] = {587 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT588 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP589 | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_UNSIGNED_TEMP590 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT591 | LM90_HAVE_FAULTQUEUE,592 .alert_alarms = 0x7c,593 .max_convrate = 10,594 .resolution = 10,595 },596 [nct210] = {597 .flags = LM90_HAVE_ALARMS | LM90_HAVE_BROKEN_ALERT598 | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE599 | LM90_HAVE_REMOTE_EXT,600 .alert_alarms = 0x7c,601 .resolution = 11,602 .max_convrate = 7,603 },604 [ne1618] = {605 .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_BROKEN_ALERT606 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,607 .alert_alarms = 0x7c,608 .resolution = 11,609 .max_convrate = 7,610 },611 [w83l771] = {612 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT613 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE614 | LM90_HAVE_REMOTE_EXT,615 .alert_alarms = 0x7c,616 .max_convrate = 8,617 },618 [sa56004] = {619 /*620 * Apparent temperatures of 128 degrees C or higher are reported621 * and treated as negative temperatures (meaning min_alarm will622 * be set).623 */624 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT625 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE626 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,627 .alert_alarms = 0x7b,628 .max_convrate = 9,629 .reg_local_ext = SA56004_REG_LOCAL_TEMPL,630 .faultqueue_mask = BIT(0),631 .faultqueue_depth = 3,632 },633 [tmp451] = {634 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT635 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT636 | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS | LM90_HAVE_LOW637 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,638 .alert_alarms = 0x7c,639 .max_convrate = 9,640 .resolution = 12,641 .reg_local_ext = TMP451_REG_LOCAL_TEMPL,642 },643 [tmp461] = {644 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT645 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT646 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE647 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,648 .alert_alarms = 0x7c,649 .max_convrate = 9,650 .resolution = 12,651 .reg_local_ext = TMP451_REG_LOCAL_TEMPL,652 },653};654 655/*656 * temperature register index657 */658enum lm90_temp_reg_index {659 LOCAL_LOW = 0,660 LOCAL_HIGH,661 LOCAL_CRIT,662 REMOTE_CRIT,663 LOCAL_EMERG, /* max6659 and max6695/96 */664 REMOTE_EMERG, /* max6659 and max6695/96 */665 REMOTE2_CRIT, /* max6695/96 only */666 REMOTE2_EMERG, /* max6695/96 only */667 668 REMOTE_TEMP,669 REMOTE_LOW,670 REMOTE_HIGH,671 REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */672 LOCAL_TEMP,673 REMOTE2_TEMP, /* max6695/96 only */674 REMOTE2_LOW, /* max6695/96 only */675 REMOTE2_HIGH, /* max6695/96 only */676 REMOTE2_OFFSET,677 678 TEMP_REG_NUM679};680 681/*682 * Client data (each client gets its own)683 */684 685struct lm90_data {686 struct i2c_client *client;687 struct device *hwmon_dev;688 u32 chip_config[2];689 u32 channel_config[MAX_CHANNELS + 1];690 const char *channel_label[MAX_CHANNELS];691 struct hwmon_channel_info chip_info;692 struct hwmon_channel_info temp_info;693 const struct hwmon_channel_info *info[3];694 struct hwmon_chip_info chip;695 struct mutex update_lock;696 struct delayed_work alert_work;697 struct work_struct report_work;698 bool valid; /* true if register values are valid */699 bool alarms_valid; /* true if status register values are valid */700 unsigned long last_updated; /* in jiffies */701 unsigned long alarms_updated; /* in jiffies */702 int kind;703 u32 flags;704 705 unsigned int update_interval; /* in milliseconds */706 707 u8 config; /* Current configuration register value */708 u8 config_orig; /* Original configuration register value */709 u8 convrate_orig; /* Original conversion rate register value */710 u8 resolution; /* temperature resolution in bit */711 u16 alert_alarms; /* Which alarm bits trigger ALERT# */712 /* Upper 8 bits for max6695/96 */713 u8 max_convrate; /* Maximum conversion rate */714 u8 reg_status2; /* 2nd status register (optional) */715 u8 reg_local_ext; /* local extension register offset */716 u8 reg_remote_ext; /* remote temperature low byte */717 u8 faultqueue_mask; /* fault queue mask */718 u8 faultqueue_depth; /* fault queue mask */719 720 /* registers values */721 u16 temp[TEMP_REG_NUM];722 u8 temp_hyst;723 u8 conalert;724 u16 reported_alarms; /* alarms reported as sysfs/udev events */725 u16 current_alarms; /* current alarms, reported by chip */726 u16 alarms; /* alarms not yet reported to user */727};728 729/*730 * Support functions731 */732 733/*734 * If the chip supports PEC but not on write byte transactions, we need735 * to explicitly ask for a transaction without PEC.736 */737static inline s32 lm90_write_no_pec(struct i2c_client *client, u8 value)738{739 return i2c_smbus_xfer(client->adapter, client->addr,740 client->flags & ~I2C_CLIENT_PEC,741 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);742}743 744/*745 * It is assumed that client->update_lock is held (unless we are in746 * detection or initialization steps). This matters when PEC is enabled747 * for chips with partial PEC support, because we don't want the address748 * pointer to change between the write byte and the read byte transactions.749 */750static int lm90_read_reg(struct i2c_client *client, u8 reg)751{752 struct lm90_data *data = i2c_get_clientdata(client);753 bool partial_pec = (client->flags & I2C_CLIENT_PEC) &&754 (data->flags & LM90_HAVE_PARTIAL_PEC);755 int err;756 757 if (partial_pec) {758 err = lm90_write_no_pec(client, reg);759 if (err)760 return err;761 return i2c_smbus_read_byte(client);762 }763 return i2c_smbus_read_byte_data(client, reg);764}765 766/*767 * Return register write address768 *769 * The write address for registers 0x03 .. 0x08 is the read address plus 6.770 * For other registers the write address matches the read address.771 */772static u8 lm90_write_reg_addr(u8 reg)773{774 if (reg >= LM90_REG_CONFIG1 && reg <= LM90_REG_REMOTE_LOWH)775 return reg + 6;776 return reg;777}778 779/*780 * Write into LM90 register.781 * Convert register address to write address if needed, then execute the782 * operation.783 */784static int lm90_write_reg(struct i2c_client *client, u8 reg, u8 val)785{786 return i2c_smbus_write_byte_data(client, lm90_write_reg_addr(reg), val);787}788 789/*790 * Write into 16-bit LM90 register.791 * Convert register addresses to write address if needed, then execute the792 * operation.793 */794static int lm90_write16(struct i2c_client *client, u8 regh, u8 regl, u16 val)795{796 int ret;797 798 ret = lm90_write_reg(client, regh, val >> 8);799 if (ret < 0 || !regl)800 return ret;801 return lm90_write_reg(client, regl, val & 0xff);802}803 804static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl,805 bool is_volatile)806{807 int oldh, newh, l;808 809 oldh = lm90_read_reg(client, regh);810 if (oldh < 0)811 return oldh;812 813 if (!regl)814 return oldh << 8;815 816 l = lm90_read_reg(client, regl);817 if (l < 0)818 return l;819 820 if (!is_volatile)821 return (oldh << 8) | l;822 823 /*824 * For volatile registers we have to use a trick.825 * We have to read two registers to have the sensor temperature,826 * but we have to beware a conversion could occur between the827 * readings. The datasheet says we should either use828 * the one-shot conversion register, which we don't want to do829 * (disables hardware monitoring) or monitor the busy bit, which is830 * impossible (we can't read the values and monitor that bit at the831 * exact same time). So the solution used here is to read the high832 * the high byte again. If the new high byte matches the old one,833 * then we have a valid reading. Otherwise we have to read the low834 * byte again, and now we believe we have a correct reading.835 */836 newh = lm90_read_reg(client, regh);837 if (newh < 0)838 return newh;839 if (oldh != newh) {840 l = lm90_read_reg(client, regl);841 if (l < 0)842 return l;843 }844 return (newh << 8) | l;845}846 847static int lm90_update_confreg(struct lm90_data *data, u8 config)848{849 if (data->config != config) {850 int err;851 852 err = lm90_write_reg(data->client, LM90_REG_CONFIG1, config);853 if (err)854 return err;855 data->config = config;856 }857 return 0;858}859 860/*861 * client->update_lock must be held when calling this function (unless we are862 * in detection or initialization steps), and while a remote channel other863 * than channel 0 is selected. Also, calling code must make sure to re-select864 * external channel 0 before releasing the lock. This is necessary because865 * various registers have different meanings as a result of selecting a866 * non-default remote channel.867 */868static int lm90_select_remote_channel(struct lm90_data *data, bool second)869{870 u8 config = data->config & ~0x08;871 872 if (second)873 config |= 0x08;874 875 return lm90_update_confreg(data, config);876}877 878static int lm90_write_convrate(struct lm90_data *data, int val)879{880 u8 config = data->config;881 int err;882 883 /* Save config and pause conversion */884 if (data->flags & LM90_PAUSE_FOR_CONFIG) {885 err = lm90_update_confreg(data, config | 0x40);886 if (err < 0)887 return err;888 }889 890 /* Set conv rate */891 err = lm90_write_reg(data->client, LM90_REG_CONVRATE, val);892 893 /* Revert change to config */894 lm90_update_confreg(data, config);895 896 return err;897}898 899/*900 * Set conversion rate.901 * client->update_lock must be held when calling this function (unless we are902 * in detection or initialization steps).903 */904static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,905 unsigned int interval)906{907 unsigned int update_interval;908 int i, err;909 910 /* Shift calculations to avoid rounding errors */911 interval <<= 6;912 913 /* find the nearest update rate */914 for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;915 i < data->max_convrate; i++, update_interval >>= 1)916 if (interval >= update_interval * 3 / 4)917 break;918 919 err = lm90_write_convrate(data, i);920 data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);921 return err;922}923 924static int lm90_set_faultqueue(struct i2c_client *client,925 struct lm90_data *data, int val)926{927 int err;928 929 if (data->faultqueue_mask) {930 err = lm90_update_confreg(data, val <= data->faultqueue_depth / 2 ?931 data->config & ~data->faultqueue_mask :932 data->config | data->faultqueue_mask);933 } else {934 static const u8 values[4] = {0, 2, 6, 0x0e};935 936 data->conalert = (data->conalert & 0xf1) | values[val - 1];937 err = lm90_write_reg(data->client, TMP451_REG_CONALERT,938 data->conalert);939 }940 941 return err;942}943 944static int lm90_update_limits(struct device *dev)945{946 struct lm90_data *data = dev_get_drvdata(dev);947 struct i2c_client *client = data->client;948 int val;949 950 if (data->flags & LM90_HAVE_CRIT) {951 val = lm90_read_reg(client, LM90_REG_LOCAL_CRIT);952 if (val < 0)953 return val;954 data->temp[LOCAL_CRIT] = val << 8;955 956 val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT);957 if (val < 0)958 return val;959 data->temp[REMOTE_CRIT] = val << 8;960 961 val = lm90_read_reg(client, LM90_REG_TCRIT_HYST);962 if (val < 0)963 return val;964 data->temp_hyst = val;965 }966 if ((data->flags & LM90_HAVE_FAULTQUEUE) && !data->faultqueue_mask) {967 val = lm90_read_reg(client, TMP451_REG_CONALERT);968 if (val < 0)969 return val;970 data->conalert = val;971 }972 973 val = lm90_read16(client, LM90_REG_REMOTE_LOWH,974 (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_LOWL : 0,975 false);976 if (val < 0)977 return val;978 data->temp[REMOTE_LOW] = val;979 980 val = lm90_read16(client, LM90_REG_REMOTE_HIGHH,981 (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_HIGHL : 0,982 false);983 if (val < 0)984 return val;985 data->temp[REMOTE_HIGH] = val;986 987 if (data->flags & LM90_HAVE_OFFSET) {988 val = lm90_read16(client, LM90_REG_REMOTE_OFFSH,989 LM90_REG_REMOTE_OFFSL, false);990 if (val < 0)991 return val;992 data->temp[REMOTE_OFFSET] = val;993 }994 995 if (data->flags & LM90_HAVE_EMERGENCY) {996 val = lm90_read_reg(client, MAX6659_REG_LOCAL_EMERG);997 if (val < 0)998 return val;999 data->temp[LOCAL_EMERG] = val << 8;1000 1001 val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG);1002 if (val < 0)1003 return val;1004 data->temp[REMOTE_EMERG] = val << 8;1005 }1006 1007 if (data->flags & LM90_HAVE_TEMP3) {1008 val = lm90_select_remote_channel(data, true);1009 if (val < 0)1010 return val;1011 1012 val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT);1013 if (val < 0)1014 return val;1015 data->temp[REMOTE2_CRIT] = val << 8;1016 1017 if (data->flags & LM90_HAVE_EMERGENCY) {1018 val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG);1019 if (val < 0)1020 return val;1021 data->temp[REMOTE2_EMERG] = val << 8;1022 }1023 1024 val = lm90_read_reg(client, LM90_REG_REMOTE_LOWH);1025 if (val < 0)1026 return val;1027 data->temp[REMOTE2_LOW] = val << 8;1028 1029 val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHH);1030 if (val < 0)1031 return val;1032 data->temp[REMOTE2_HIGH] = val << 8;1033 1034 if (data->flags & LM90_HAVE_OFFSET) {1035 val = lm90_read16(client, LM90_REG_REMOTE_OFFSH,1036 LM90_REG_REMOTE_OFFSL, false);1037 if (val < 0)1038 return val;1039 data->temp[REMOTE2_OFFSET] = val;1040 }1041 1042 lm90_select_remote_channel(data, false);1043 }1044 1045 return 0;1046}1047 1048static void lm90_report_alarms(struct work_struct *work)1049{1050 struct lm90_data *data = container_of(work, struct lm90_data, report_work);1051 u16 cleared_alarms, new_alarms, current_alarms;1052 struct device *hwmon_dev = data->hwmon_dev;1053 struct device *dev = &data->client->dev;1054 int st, st2;1055 1056 current_alarms = data->current_alarms;1057 cleared_alarms = data->reported_alarms & ~current_alarms;1058 new_alarms = current_alarms & ~data->reported_alarms;1059 1060 if (!cleared_alarms && !new_alarms)1061 return;1062 1063 st = new_alarms & 0xff;1064 st2 = new_alarms >> 8;1065 1066 if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||1067 (st2 & MAX6696_STATUS2_LOT2))1068 dev_dbg(dev, "temp%d out of range, please check!\n", 1);1069 if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||1070 (st2 & MAX6696_STATUS2_ROT2))1071 dev_dbg(dev, "temp%d out of range, please check!\n", 2);1072 if (st & LM90_STATUS_ROPEN)1073 dev_dbg(dev, "temp%d diode open, please check!\n", 2);1074 if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |1075 MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))1076 dev_dbg(dev, "temp%d out of range, please check!\n", 3);1077 if (st2 & MAX6696_STATUS2_R2OPEN)1078 dev_dbg(dev, "temp%d diode open, please check!\n", 3);1079 1080 st |= cleared_alarms & 0xff;1081 st2 |= cleared_alarms >> 8;1082 1083 if (st & LM90_STATUS_LLOW)1084 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 0);1085 if (st & LM90_STATUS_RLOW)1086 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 1);1087 if (st2 & MAX6696_STATUS2_R2LOW)1088 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 2);1089 1090 if (st & LM90_STATUS_LHIGH)1091 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 0);1092 if (st & LM90_STATUS_RHIGH)1093 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 1);1094 if (st2 & MAX6696_STATUS2_R2HIGH)1095 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 2);1096 1097 if (st & LM90_STATUS_LTHRM)1098 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 0);1099 if (st & LM90_STATUS_RTHRM)1100 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 1);1101 if (st2 & MAX6696_STATUS2_R2THRM)1102 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 2);1103 1104 if (st2 & MAX6696_STATUS2_LOT2)1105 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 0);1106 if (st2 & MAX6696_STATUS2_ROT2)1107 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 1);1108 if (st2 & MAX6696_STATUS2_R2OT2)1109 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 2);1110 1111 data->reported_alarms = current_alarms;1112}1113 1114static int lm90_update_alarms_locked(struct lm90_data *data, bool force)1115{1116 if (force || !data->alarms_valid ||1117 time_after(jiffies, data->alarms_updated + msecs_to_jiffies(data->update_interval))) {1118 struct i2c_client *client = data->client;1119 bool check_enable;1120 u16 alarms;1121 int val;1122 1123 data->alarms_valid = false;1124 1125 val = lm90_read_reg(client, LM90_REG_STATUS);1126 if (val < 0)1127 return val;1128 alarms = val & ~LM90_STATUS_BUSY;1129 1130 if (data->reg_status2) {1131 val = lm90_read_reg(client, data->reg_status2);1132 if (val < 0)1133 return val;1134 alarms |= val << 8;1135 }1136 /*1137 * If the update is forced (called from interrupt or alert1138 * handler) and alarm data is valid, the alarms may have been1139 * updated after the last update interval, and the status1140 * register may still be cleared. Only add additional alarms1141 * in this case. Alarms will be cleared later if appropriate.1142 */1143 if (force && data->alarms_valid)1144 data->current_alarms |= alarms;1145 else1146 data->current_alarms = alarms;1147 data->alarms |= alarms;1148 1149 check_enable = (client->irq || !(data->config_orig & 0x80)) &&1150 (data->config & 0x80);1151 1152 if (force || check_enable)1153 schedule_work(&data->report_work);1154 1155 /*1156 * Re-enable ALERT# output if it was originally enabled, relevant1157 * alarms are all clear, and alerts are currently disabled.1158 * Otherwise (re)schedule worker if needed.1159 */1160 if (check_enable) {1161 if (!(data->current_alarms & data->alert_alarms)) {1162 dev_dbg(&client->dev, "Re-enabling ALERT#\n");1163 lm90_update_confreg(data, data->config & ~0x80);1164 /*1165 * We may have been called from the update handler.1166 * If so, the worker, if scheduled, is no longer1167 * needed. Cancel it. Don't synchronize because1168 * it may already be running.1169 */1170 cancel_delayed_work(&data->alert_work);1171 } else {1172 schedule_delayed_work(&data->alert_work,1173 max_t(int, HZ, msecs_to_jiffies(data->update_interval)));1174 }1175 }1176 data->alarms_updated = jiffies;1177 data->alarms_valid = true;1178 }1179 return 0;1180}1181 1182static int lm90_update_alarms(struct lm90_data *data, bool force)1183{1184 int err;1185 1186 mutex_lock(&data->update_lock);1187 err = lm90_update_alarms_locked(data, force);1188 mutex_unlock(&data->update_lock);1189 1190 return err;1191}1192 1193static void lm90_alert_work(struct work_struct *__work)1194{1195 struct delayed_work *delayed_work = container_of(__work, struct delayed_work, work);1196 struct lm90_data *data = container_of(delayed_work, struct lm90_data, alert_work);1197 1198 /* Nothing to do if alerts are enabled */1199 if (!(data->config & 0x80))1200 return;1201 1202 lm90_update_alarms(data, true);1203}1204 1205static int lm90_update_device(struct device *dev)1206{1207 struct lm90_data *data = dev_get_drvdata(dev);1208 struct i2c_client *client = data->client;1209 unsigned long next_update;1210 int val;1211 1212 if (!data->valid) {1213 val = lm90_update_limits(dev);1214 if (val < 0)1215 return val;1216 }1217 1218 next_update = data->last_updated +1219 msecs_to_jiffies(data->update_interval);1220 if (time_after(jiffies, next_update) || !data->valid) {1221 dev_dbg(&client->dev, "Updating lm90 data.\n");1222 1223 data->valid = false;1224 1225 val = lm90_read_reg(client, LM90_REG_LOCAL_LOW);1226 if (val < 0)1227 return val;1228 data->temp[LOCAL_LOW] = val << 8;1229 1230 val = lm90_read_reg(client, LM90_REG_LOCAL_HIGH);1231 if (val < 0)1232 return val;1233 data->temp[LOCAL_HIGH] = val << 8;1234 1235 val = lm90_read16(client, LM90_REG_LOCAL_TEMP,1236 data->reg_local_ext, true);1237 if (val < 0)1238 return val;1239 data->temp[LOCAL_TEMP] = val;1240 val = lm90_read16(client, LM90_REG_REMOTE_TEMPH,1241 data->reg_remote_ext, true);1242 if (val < 0)1243 return val;1244 data->temp[REMOTE_TEMP] = val;1245 1246 if (data->flags & LM90_HAVE_TEMP3) {1247 val = lm90_select_remote_channel(data, true);1248 if (val < 0)1249 return val;1250 1251 val = lm90_read16(client, LM90_REG_REMOTE_TEMPH,1252 data->reg_remote_ext, true);1253 if (val < 0) {1254 lm90_select_remote_channel(data, false);1255 return val;1256 }1257 data->temp[REMOTE2_TEMP] = val;1258 1259 lm90_select_remote_channel(data, false);1260 }1261 1262 val = lm90_update_alarms_locked(data, false);1263 if (val < 0)1264 return val;1265 1266 data->last_updated = jiffies;1267 data->valid = true;1268 }1269 1270 return 0;1271}1272 1273static int lm90_temp_get_resolution(struct lm90_data *data, int index)1274{1275 switch (index) {1276 case REMOTE_TEMP:1277 if (data->reg_remote_ext)1278 return data->resolution;1279 return 8;1280 case REMOTE_OFFSET:1281 case REMOTE2_OFFSET:1282 case REMOTE2_TEMP:1283 return data->resolution;1284 case LOCAL_TEMP:1285 if (data->reg_local_ext)1286 return data->resolution;1287 return 8;1288 case REMOTE_LOW:1289 case REMOTE_HIGH:1290 case REMOTE2_LOW:1291 case REMOTE2_HIGH:1292 if (data->flags & LM90_HAVE_REM_LIMIT_EXT)1293 return data->resolution;1294 return 8;1295 default:1296 return 8;1297 }1298}1299 1300static int lm90_temp_from_reg(u32 flags, u16 regval, u8 resolution)1301{1302 int val;1303 1304 if (flags & LM90_HAVE_EXTENDED_TEMP)1305 val = regval - 0x4000;1306 else if (flags & (LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_EXT_UNSIGNED))1307 val = regval;1308 else1309 val = (s16)regval;1310 1311 return ((val >> (16 - resolution)) * 1000) >> (resolution - 8);1312}1313 1314static int lm90_get_temp(struct lm90_data *data, int index, int channel)1315{1316 int temp = lm90_temp_from_reg(data->flags, data->temp[index],1317 lm90_temp_get_resolution(data, index));1318 1319 /* +16 degrees offset for remote temperature on LM99 */1320 if (data->kind == lm99 && channel)1321 temp += 16000;1322 1323 return temp;1324}1325 1326static u16 lm90_temp_to_reg(u32 flags, long val, u8 resolution)1327{1328 int fraction = resolution > 8 ?1329 1000 - DIV_ROUND_CLOSEST(1000, BIT(resolution - 8)) : 0;1330 1331 if (flags & LM90_HAVE_EXTENDED_TEMP) {1332 val = clamp_val(val, -64000, 191000 + fraction);1333 val += 64000;1334 } else if (flags & LM90_HAVE_EXT_UNSIGNED) {1335 val = clamp_val(val, 0, 255000 + fraction);1336 } else if (flags & LM90_HAVE_UNSIGNED_TEMP) {1337 val = clamp_val(val, 0, 127000 + fraction);1338 } else {1339 val = clamp_val(val, -128000, 127000 + fraction);1340 }1341 1342 return DIV_ROUND_CLOSEST(val << (resolution - 8), 1000) << (16 - resolution);1343}1344 1345static int lm90_set_temp(struct lm90_data *data, int index, int channel, long val)1346{1347 static const u8 regs[] = {1348 [LOCAL_LOW] = LM90_REG_LOCAL_LOW,1349 [LOCAL_HIGH] = LM90_REG_LOCAL_HIGH,1350 [LOCAL_CRIT] = LM90_REG_LOCAL_CRIT,1351 [REMOTE_CRIT] = LM90_REG_REMOTE_CRIT,1352 [LOCAL_EMERG] = MAX6659_REG_LOCAL_EMERG,1353 [REMOTE_EMERG] = MAX6659_REG_REMOTE_EMERG,1354 [REMOTE2_CRIT] = LM90_REG_REMOTE_CRIT,1355 [REMOTE2_EMERG] = MAX6659_REG_REMOTE_EMERG,1356 [REMOTE_LOW] = LM90_REG_REMOTE_LOWH,1357 [REMOTE_HIGH] = LM90_REG_REMOTE_HIGHH,1358 [REMOTE2_LOW] = LM90_REG_REMOTE_LOWH,1359 [REMOTE2_HIGH] = LM90_REG_REMOTE_HIGHH,1360 };1361 struct i2c_client *client = data->client;1362 u8 regh = regs[index];1363 u8 regl = 0;1364 int err;1365 1366 if (channel && (data->flags & LM90_HAVE_REM_LIMIT_EXT)) {1367 if (index == REMOTE_LOW || index == REMOTE2_LOW)1368 regl = LM90_REG_REMOTE_LOWL;1369 else if (index == REMOTE_HIGH || index == REMOTE2_HIGH)1370 regl = LM90_REG_REMOTE_HIGHL;1371 }1372 1373 /* +16 degrees offset for remote temperature on LM99 */1374 if (data->kind == lm99 && channel) {1375 /* prevent integer underflow */1376 val = max(val, -128000l);1377 val -= 16000;1378 }1379 1380 data->temp[index] = lm90_temp_to_reg(data->flags, val,1381 lm90_temp_get_resolution(data, index));1382 1383 if (channel > 1)1384 lm90_select_remote_channel(data, true);1385 1386 err = lm90_write16(client, regh, regl, data->temp[index]);1387 1388 if (channel > 1)1389 lm90_select_remote_channel(data, false);1390 1391 return err;1392}1393 1394static int lm90_get_temphyst(struct lm90_data *data, int index, int channel)1395{1396 int temp = lm90_get_temp(data, index, channel);1397 1398 return temp - data->temp_hyst * 1000;1399}1400 1401static int lm90_set_temphyst(struct lm90_data *data, long val)1402{1403 int temp = lm90_get_temp(data, LOCAL_CRIT, 0);1404 1405 /* prevent integer overflow/underflow */1406 val = clamp_val(val, -128000l, 255000l);1407 data->temp_hyst = clamp_val(DIV_ROUND_CLOSEST(temp - val, 1000), 0, 31);1408 1409 return lm90_write_reg(data->client, LM90_REG_TCRIT_HYST, data->temp_hyst);1410}1411 1412static int lm90_get_temp_offset(struct lm90_data *data, int index)1413{1414 int res = lm90_temp_get_resolution(data, index);1415 1416 return lm90_temp_from_reg(0, data->temp[index], res);1417}1418 1419static int lm90_set_temp_offset(struct lm90_data *data, int index, int channel, long val)1420{1421 int err;1422 1423 val = lm90_temp_to_reg(0, val, lm90_temp_get_resolution(data, index));1424 1425 /* For ADT7481 we can use the same registers for remote channel 1 and 2 */1426 if (channel > 1)1427 lm90_select_remote_channel(data, true);1428 1429 err = lm90_write16(data->client, LM90_REG_REMOTE_OFFSH, LM90_REG_REMOTE_OFFSL, val);1430 1431 if (channel > 1)1432 lm90_select_remote_channel(data, false);1433 1434 if (err)1435 return err;1436 1437 data->temp[index] = val;1438 1439 return 0;1440}1441 1442static const u8 lm90_temp_index[MAX_CHANNELS] = {1443 LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP1444};1445 1446static const u8 lm90_temp_min_index[MAX_CHANNELS] = {1447 LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW1448};1449 1450static const u8 lm90_temp_max_index[MAX_CHANNELS] = {1451 LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH1452};1453 1454static const u8 lm90_temp_crit_index[MAX_CHANNELS] = {1455 LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT1456};1457 1458static const u8 lm90_temp_emerg_index[MAX_CHANNELS] = {1459 LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG1460};1461 1462static const s8 lm90_temp_offset_index[MAX_CHANNELS] = {1463 -1, REMOTE_OFFSET, REMOTE2_OFFSET1464};1465 1466static const u16 lm90_min_alarm_bits[MAX_CHANNELS] = { BIT(5), BIT(3), BIT(11) };1467static const u16 lm90_max_alarm_bits[MAX_CHANNELS] = { BIT(6), BIT(4), BIT(12) };1468static const u16 lm90_crit_alarm_bits[MAX_CHANNELS] = { BIT(0), BIT(1), BIT(9) };1469static const u16 lm90_crit_alarm_bits_swapped[MAX_CHANNELS] = { BIT(1), BIT(0), BIT(9) };1470static const u16 lm90_emergency_alarm_bits[MAX_CHANNELS] = { BIT(15), BIT(13), BIT(14) };1471static const u16 lm90_fault_bits[MAX_CHANNELS] = { BIT(0), BIT(2), BIT(10) };1472 1473static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)1474{1475 struct lm90_data *data = dev_get_drvdata(dev);1476 int err;1477 u16 bit;1478 1479 mutex_lock(&data->update_lock);1480 err = lm90_update_device(dev);1481 mutex_unlock(&data->update_lock);1482 if (err)1483 return err;1484 1485 switch (attr) {1486 case hwmon_temp_input:1487 *val = lm90_get_temp(data, lm90_temp_index[channel], channel);1488 break;1489 case hwmon_temp_min_alarm:1490 case hwmon_temp_max_alarm:1491 case hwmon_temp_crit_alarm:1492 case hwmon_temp_emergency_alarm:1493 case hwmon_temp_fault:1494 switch (attr) {1495 case hwmon_temp_min_alarm:1496 bit = lm90_min_alarm_bits[channel];1497 break;1498 case hwmon_temp_max_alarm:1499 bit = lm90_max_alarm_bits[channel];1500 break;1501 case hwmon_temp_crit_alarm:1502 if (data->flags & LM90_HAVE_CRIT_ALRM_SWP)1503 bit = lm90_crit_alarm_bits_swapped[channel];1504 else1505 bit = lm90_crit_alarm_bits[channel];1506 break;1507 case hwmon_temp_emergency_alarm:1508 bit = lm90_emergency_alarm_bits[channel];1509 break;1510 case hwmon_temp_fault:1511 bit = lm90_fault_bits[channel];1512 break;1513 }1514 *val = !!(data->alarms & bit);1515 data->alarms &= ~bit;1516 data->alarms |= data->current_alarms;1517 break;1518 case hwmon_temp_min:1519 *val = lm90_get_temp(data, lm90_temp_min_index[channel], channel);1520 break;1521 case hwmon_temp_max:1522 *val = lm90_get_temp(data, lm90_temp_max_index[channel], channel);1523 break;1524 case hwmon_temp_crit:1525 *val = lm90_get_temp(data, lm90_temp_crit_index[channel], channel);1526 break;1527 case hwmon_temp_crit_hyst:1528 *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel], channel);1529 break;1530 case hwmon_temp_emergency:1531 *val = lm90_get_temp(data, lm90_temp_emerg_index[channel], channel);1532 break;1533 case hwmon_temp_emergency_hyst:1534 *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel], channel);1535 break;1536 case hwmon_temp_offset:1537 *val = lm90_get_temp_offset(data, lm90_temp_offset_index[channel]);1538 break;1539 default:1540 return -EOPNOTSUPP;1541 }1542 return 0;1543}1544 1545static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)1546{1547 struct lm90_data *data = dev_get_drvdata(dev);1548 int err;1549 1550 mutex_lock(&data->update_lock);1551 1552 err = lm90_update_device(dev);1553 if (err)1554 goto error;1555 1556 switch (attr) {1557 case hwmon_temp_min:1558 err = lm90_set_temp(data, lm90_temp_min_index[channel],1559 channel, val);1560 break;1561 case hwmon_temp_max:1562 err = lm90_set_temp(data, lm90_temp_max_index[channel],1563 channel, val);1564 break;1565 case hwmon_temp_crit:1566 err = lm90_set_temp(data, lm90_temp_crit_index[channel],1567 channel, val);1568 break;1569 case hwmon_temp_crit_hyst:1570 err = lm90_set_temphyst(data, val);1571 break;1572 case hwmon_temp_emergency:1573 err = lm90_set_temp(data, lm90_temp_emerg_index[channel],1574 channel, val);1575 break;1576 case hwmon_temp_offset:1577 err = lm90_set_temp_offset(data, lm90_temp_offset_index[channel],1578 channel, val);1579 break;1580 default:1581 err = -EOPNOTSUPP;1582 break;1583 }1584error:1585 mutex_unlock(&data->update_lock);1586 1587 return err;1588}1589 1590static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)1591{1592 switch (attr) {1593 case hwmon_temp_input:1594 case hwmon_temp_min_alarm:1595 case hwmon_temp_max_alarm:1596 case hwmon_temp_crit_alarm:1597 case hwmon_temp_emergency_alarm:1598 case hwmon_temp_emergency_hyst:1599 case hwmon_temp_fault:1600 case hwmon_temp_label:1601 return 0444;1602 case hwmon_temp_min:1603 case hwmon_temp_max:1604 case hwmon_temp_crit:1605 case hwmon_temp_emergency:1606 case hwmon_temp_offset:1607 return 0644;1608 case hwmon_temp_crit_hyst:1609 if (channel == 0)1610 return 0644;1611 return 0444;1612 default:1613 return 0;1614 }1615}1616 1617static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)1618{1619 struct lm90_data *data = dev_get_drvdata(dev);1620 int err;1621 1622 mutex_lock(&data->update_lock);1623 err = lm90_update_device(dev);1624 mutex_unlock(&data->update_lock);1625 if (err)1626 return err;1627 1628 switch (attr) {1629 case hwmon_chip_update_interval:1630 *val = data->update_interval;1631 break;1632 case hwmon_chip_alarms:1633 *val = data->alarms;1634 break;1635 case hwmon_chip_temp_samples:1636 if (data->faultqueue_mask) {1637 *val = (data->config & data->faultqueue_mask) ?1638 data->faultqueue_depth : 1;1639 } else {1640 switch (data->conalert & 0x0e) {1641 case 0x0:1642 default:1643 *val = 1;1644 break;1645 case 0x2:1646 *val = 2;1647 break;1648 case 0x6:1649 *val = 3;1650 break;1651 case 0xe:1652 *val = 4;1653 break;1654 }1655 }1656 break;1657 default:1658 return -EOPNOTSUPP;1659 }1660 1661 return 0;1662}1663 1664static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)1665{1666 struct lm90_data *data = dev_get_drvdata(dev);1667 struct i2c_client *client = data->client;1668 int err;1669 1670 mutex_lock(&data->update_lock);1671 1672 err = lm90_update_device(dev);1673 if (err)1674 goto error;1675 1676 switch (attr) {1677 case hwmon_chip_update_interval:1678 err = lm90_set_convrate(client, data,1679 clamp_val(val, 0, 100000));1680 break;1681 case hwmon_chip_temp_samples:1682 err = lm90_set_faultqueue(client, data, clamp_val(val, 1, 4));1683 break;1684 default:1685 err = -EOPNOTSUPP;1686 break;1687 }1688error:1689 mutex_unlock(&data->update_lock);1690 1691 return err;1692}1693 1694static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)1695{1696 switch (attr) {1697 case hwmon_chip_update_interval:1698 case hwmon_chip_temp_samples:1699 return 0644;1700 case hwmon_chip_alarms:1701 return 0444;1702 default:1703 return 0;1704 }1705}1706 1707static int lm90_read(struct device *dev, enum hwmon_sensor_types type,1708 u32 attr, int channel, long *val)1709{1710 switch (type) {1711 case hwmon_chip:1712 return lm90_chip_read(dev, attr, channel, val);1713 case hwmon_temp:1714 return lm90_temp_read(dev, attr, channel, val);1715 default:1716 return -EOPNOTSUPP;1717 }1718}1719 1720static int lm90_read_string(struct device *dev, enum hwmon_sensor_types type,1721 u32 attr, int channel, const char **str)1722{1723 struct lm90_data *data = dev_get_drvdata(dev);1724 1725 *str = data->channel_label[channel];1726 1727 return 0;1728}1729 1730static int lm90_write(struct device *dev, enum hwmon_sensor_types type,1731 u32 attr, int channel, long val)1732{1733 switch (type) {1734 case hwmon_chip:1735 return lm90_chip_write(dev, attr, channel, val);1736 case hwmon_temp:1737 return lm90_temp_write(dev, attr, channel, val);1738 default:1739 return -EOPNOTSUPP;1740 }1741}1742 1743static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,1744 u32 attr, int channel)1745{1746 switch (type) {1747 case hwmon_chip:1748 return lm90_chip_is_visible(data, attr, channel);1749 case hwmon_temp:1750 return lm90_temp_is_visible(data, attr, channel);1751 default:1752 return 0;1753 }1754}1755 1756static const char *lm90_detect_lm84(struct i2c_client *client)1757{1758 static const u8 regs[] = {1759 LM90_REG_STATUS, LM90_REG_LOCAL_TEMP, LM90_REG_LOCAL_HIGH,1760 LM90_REG_REMOTE_TEMPH, LM90_REG_REMOTE_HIGHH1761 };1762 int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);1763 int reg1, reg2, reg3, reg4;1764 bool nonzero = false;1765 u8 ff = 0xff;1766 int i;1767 1768 if (status < 0 || (status & 0xab))1769 return NULL;1770 1771 /*1772 * For LM84, undefined registers return the most recent value.1773 * Repeat several times, each time checking against a different1774 * (presumably) existing register.1775 */1776 for (i = 0; i < ARRAY_SIZE(regs); i++) {1777 reg1 = i2c_smbus_read_byte_data(client, regs[i]);1778 reg2 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL);1779 reg3 = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW);1780 reg4 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH);1781 1782 if (reg1 < 0)1783 return NULL;1784 1785 /* If any register has a different value, this is not an LM84 */1786 if (reg2 != reg1 || reg3 != reg1 || reg4 != reg1)1787 return NULL;1788 1789 nonzero |= reg1 || reg2 || reg3 || reg4;1790 ff &= reg1;1791 }1792 /*1793 * If all registers always returned 0 or 0xff, all bets are off,1794 * and we can not make any predictions about the chip type.1795 */1796 return nonzero && ff != 0xff ? "lm84" : NULL;1797}1798 1799static const char *lm90_detect_max1617(struct i2c_client *client, int config1)1800{1801 int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);1802 int llo, rlo, lhi, rhi;1803 1804 if (status < 0 || (status & 0x03))1805 return NULL;1806 1807 if (config1 & 0x3f)1808 return NULL;1809 1810 /*1811 * Fail if unsupported registers return anything but 0xff.1812 * The calling code already checked man_id and chip_id.1813 * A byte read operation repeats the most recent read operation1814 * and should also return 0xff.1815 */1816 if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) != 0xff ||1817 i2c_smbus_read_byte_data(client, MAX6657_REG_LOCAL_TEMPL) != 0xff ||1818 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWL) != 0xff ||1819 i2c_smbus_read_byte(client) != 0xff)1820 return NULL;1821 1822 llo = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW);1823 rlo = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH);1824 1825 lhi = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH);1826 rhi = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_HIGHH);1827 1828 if (llo < 0 || rlo < 0)1829 return NULL;1830 1831 /*1832 * A byte read operation repeats the most recent read and should1833 * return the same value.1834 */1835 if (i2c_smbus_read_byte(client) != rhi)1836 return NULL;1837 1838 /*1839 * The following two checks are marginal since the checked values1840 * are strictly speaking valid.1841 */1842 1843 /* fail for negative high limits; this also catches read errors */1844 if ((s8)lhi < 0 || (s8)rhi < 0)1845 return NULL;1846 1847 /* fail if low limits are larger than or equal to high limits */1848 if ((s8)llo >= lhi || (s8)rlo >= rhi)1849 return NULL;1850 1851 if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) {1852 /*1853 * Word read operations return 0xff in second byte1854 */1855 if (i2c_smbus_read_word_data(client, LM90_REG_REMOTE_TEMPL) !=1856 0xffff)1857 return NULL;1858 if (i2c_smbus_read_word_data(client, LM90_REG_CONFIG1) !=1859 (config1 | 0xff00))1860 return NULL;1861 if (i2c_smbus_read_word_data(client, LM90_REG_LOCAL_HIGH) !=1862 (lhi | 0xff00))1863 return NULL;1864 }1865 1866 return "max1617";1867}1868 1869static const char *lm90_detect_national(struct i2c_client *client, int chip_id,1870 int config1, int convrate)1871{1872 int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);1873 int address = client->addr;1874 const char *name = NULL;1875 1876 if (config2 < 0)1877 return NULL;1878 1879 if ((config1 & 0x2a) || (config2 & 0xf8) || convrate > 0x09)1880 return NULL;1881 1882 if (address != 0x4c && address != 0x4d)1883 return NULL;1884 1885 switch (chip_id & 0xf0) {1886 case 0x10: /* LM86 */1887 if (address == 0x4c)1888 name = "lm86";1889 break;1890 case 0x20: /* LM90 */1891 if (address == 0x4c)1892 name = "lm90";1893 break;1894 case 0x30: /* LM89/LM99 */1895 name = "lm99"; /* detect LM89 as LM99 */1896 break;1897 default:1898 break;1899 }1900 1901 return name;1902}1903 1904static const char *lm90_detect_on(struct i2c_client *client, int chip_id, int config1,1905 int convrate)1906{1907 int address = client->addr;1908 const char *name = NULL;1909 1910 switch (chip_id) {1911 case 0xca: /* NCT218 */1912 if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&1913 convrate <= 0x0a)1914 name = "nct218";1915 break;1916 default:1917 break;1918 }1919 return name;1920}1921 1922static const char *lm90_detect_analog(struct i2c_client *client, bool common_address,1923 int chip_id, int config1, int convrate)1924{1925 int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);1926 int config2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CONFIG2);1927 int man_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_MAN_ID);1928 int chip_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CHIP_ID);1929 int address = client->addr;1930 const char *name = NULL;1931 1932 if (status < 0 || config2 < 0 || man_id2 < 0 || chip_id2 < 0)1933 return NULL;1934 1935 /*1936 * The following chips should be detected by this function. Known1937 * register values are listed. Registers 0x3d .. 0x3e are undocumented1938 * for most of the chips, yet appear to return a well defined value.1939 * Register 0xff is undocumented for some of the chips. Register 0x3f1940 * is undocumented for all chips, but also returns a well defined value.1941 * Values are as reported from real chips unless mentioned otherwise.1942 * The code below checks values for registers 0x3d, 0x3e, and 0xff,1943 * but not for register 0x3f.1944 *1945 * Chip Register1946 * 3d 3e 3f fe ff Notes1947 * ----------------------------------------------------------1948 * adm1020 00 00 00 41 391949 * adm1021 00 00 00 41 031950 * adm1021a 00 00 00 41 3c1951 * adm1023 00 00 00 41 3c same as adm1021a1952 * adm1032 00 00 00 41 421953 *1954 * adt7421 21 41 04 41 041955 * adt7461 00 00 00 41 511956 * adt7461a 61 41 05 41 571957 * adt7481 81 41 02 41 621958 * adt7482 - - - 41 65 datasheet1959 * 82 41 05 41 75 real chip1960 * adt7483 83 41 04 41 941961 *1962 * nct72 61 41 07 41 551963 * nct210 00 00 00 41 3f1964 * nct214 61 41 08 41 5a1965 * nct1008 - - - 41 57 datasheet rev. 31966 * 61 41 06 41 54 real chip1967 *1968 * nvt210 - - - 41 - datasheet1969 * nvt211 - - - 41 - datasheet1970 */1971 switch (chip_id) {1972 case 0x00 ... 0x03: /* ADM1021 */1973 case 0x05 ... 0x0f:1974 if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&1975 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))1976 name = "adm1021";1977 break;1978 case 0x04: /* ADT7421 (undocumented) */1979 if (man_id2 == 0x41 && chip_id2 == 0x21 &&1980 (address == 0x4c || address == 0x4d) &&1981 (config1 & 0x0b) == 0x08 && convrate <= 0x0a)1982 name = "adt7421";1983 break;1984 case 0x30 ... 0x38: /* ADM1021A, ADM1023 */1985 case 0x3a ... 0x3e:1986 /*1987 * ADM1021A and compatible chips will be mis-detected as1988 * ADM1023. Chips labeled 'ADM1021A' and 'ADM1023' were both1989 * found to have a Chip ID of 0x3c.1990 * ADM1021A does not officially support low byte registers1991 * (0x12 .. 0x14), but a chip labeled ADM1021A does support it.1992 * Official support for the temperature offset high byte1993 * register (0x11) was added to revision F of the ADM1021A1994 * datasheet.1995 * It is currently unknown if there is a means to distinguish1996 * ADM1021A from ADM1023, and/or if revisions of ADM1021A exist1997 * which differ in functionality from ADM1023.1998 */1999 if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&2000 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))2001 name = "adm1023";2002 break;2003 case 0x39: /* ADM1020 (undocumented) */2004 if (man_id2 == 0x00 && chip_id2 == 0x00 &&2005 (address == 0x4c || address == 0x4d || address == 0x4e) &&2006 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))2007 name = "adm1020";2008 break;2009 case 0x3f: /* NCT210 */2010 if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&2011 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))2012 name = "nct210";2013 break;2014 case 0x40 ... 0x4f: /* ADM1032 */2015 if (man_id2 == 0x00 && chip_id2 == 0x00 &&2016 (address == 0x4c || address == 0x4d) && !(config1 & 0x3f) &&2017 convrate <= 0x0a)2018 name = "adm1032";2019 break;2020 case 0x51: /* ADT7461 */2021 if (man_id2 == 0x00 && chip_id2 == 0x00 &&2022 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&2023 convrate <= 0x0a)2024 name = "adt7461";2025 break;2026 case 0x54: /* NCT1008 */2027 if (man_id2 == 0x41 && chip_id2 == 0x61 &&2028 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&2029 convrate <= 0x0a)2030 name = "nct1008";2031 break;2032 case 0x55: /* NCT72 */2033 if (man_id2 == 0x41 && chip_id2 == 0x61 &&2034 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&2035 convrate <= 0x0a)2036 name = "nct72";2037 break;2038 case 0x57: /* ADT7461A, NCT1008 (datasheet rev. 3) */2039 if (man_id2 == 0x41 && chip_id2 == 0x61 &&2040 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&2041 convrate <= 0x0a)2042 name = "adt7461a";2043 break;2044 case 0x5a: /* NCT214 */2045 if (man_id2 == 0x41 && chip_id2 == 0x61 &&2046 common_address && !(config1 & 0x1b) && convrate <= 0x0a)2047 name = "nct214";2048 break;2049 case 0x62: /* ADT7481, undocumented */2050 if (man_id2 == 0x41 && chip_id2 == 0x81 &&2051 (address == 0x4b || address == 0x4c) && !(config1 & 0x10) &&2052 !(config2 & 0x7f) && (convrate & 0x0f) <= 0x0b) {2053 name = "adt7481";2054 }2055 break;2056 case 0x65: /* ADT7482, datasheet */2057 case 0x75: /* ADT7482, real chip */2058 if (man_id2 == 0x41 && chip_id2 == 0x82 &&2059 address == 0x4c && !(config1 & 0x10) && !(config2 & 0x7f) &&2060 convrate <= 0x0a)2061 name = "adt7482";2062 break;2063 case 0x94: /* ADT7483 */2064 if (man_id2 == 0x41 && chip_id2 == 0x83 &&2065 common_address &&2066 ((address >= 0x18 && address <= 0x1a) ||2067 (address >= 0x29 && address <= 0x2b) ||2068 (address >= 0x4c && address <= 0x4e)) &&2069 !(config1 & 0x10) && !(config2 & 0x7f) && convrate <= 0x0a)2070 name = "adt7483a";2071 break;2072 default:2073 break;2074 }2075 2076 return name;2077}2078 2079static const char *lm90_detect_maxim(struct i2c_client *client, bool common_address,2080 int chip_id, int config1, int convrate)2081{2082 int man_id, emerg, emerg2, status2;2083 int address = client->addr;2084 const char *name = NULL;2085 2086 switch (chip_id) {2087 case 0x01:2088 if (!common_address)2089 break;2090 2091 /*2092 * We read MAX6659_REG_REMOTE_EMERG twice, and re-read2093 * LM90_REG_MAN_ID in between. If MAX6659_REG_REMOTE_EMERG2094 * exists, both readings will reflect the same value. Otherwise,2095 * the readings will be different.2096 */2097 emerg = i2c_smbus_read_byte_data(client,2098 MAX6659_REG_REMOTE_EMERG);2099 man_id = i2c_smbus_read_byte_data(client,2100 LM90_REG_MAN_ID);2101 emerg2 = i2c_smbus_read_byte_data(client,2102 MAX6659_REG_REMOTE_EMERG);2103 status2 = i2c_smbus_read_byte_data(client,2104 MAX6696_REG_STATUS2);2105 if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)2106 return NULL;2107 2108 /*2109 * Even though MAX6695 and MAX6696 do not have a chip ID2110 * register, reading it returns 0x01. Bit 4 of the config12111 * register is unused and should return zero when read. Bit 0 of2112 * the status2 register is unused and should return zero when2113 * read.2114 *2115 * MAX6695 and MAX6696 have an additional set of temperature2116 * limit registers. We can detect those chips by checking if2117 * one of those registers exists.2118 */2119 if (!(config1 & 0x10) && !(status2 & 0x01) && emerg == emerg2 &&2120 convrate <= 0x07)2121 name = "max6696";2122 /*2123 * The chip_id register of the MAX6680 and MAX6681 holds the2124 * revision of the chip. The lowest bit of the config1 register2125 * is unused and should return zero when read, so should the2126 * second to last bit of config1 (software reset). Register2127 * address 0x12 (LM90_REG_REMOTE_OFFSL) exists for this chip and2128 * should differ from emerg2, and emerg2 should match man_id2129 * since it does not exist.2130 */2131 else if (!(config1 & 0x03) && convrate <= 0x07 &&2132 emerg2 == man_id && emerg2 != status2)2133 name = "max6680";2134 /*2135 * MAX1617A does not have any extended registers (register2136 * address 0x10 or higher) except for manufacturer and2137 * device ID registers. Unlike other chips of this series,2138 * unsupported registers were observed to return a fixed value2139 * of 0x01.2140 * Note: Multiple chips with different markings labeled as2141 * "MAX1617" (no "A") were observed to report manufacturer ID2142 * 0x4d and device ID 0x01. It is unknown if other variants of2143 * MAX1617/MAX617A with different behavior exist. The detection2144 * code below works for those chips.2145 */2146 else if (!(config1 & 0x03f) && convrate <= 0x07 &&2147 emerg == 0x01 && emerg2 == 0x01 && status2 == 0x01)2148 name = "max1617";2149 break;2150 case 0x08:2151 /*2152 * The chip_id of the MAX6654 holds the revision of the chip.2153 * The lowest 3 bits of the config1 register are unused and2154 * should return zero when read.2155 */2156 if (common_address && !(config1 & 0x07) && convrate <= 0x07)2157 name = "max6654";2158 break;2159 case 0x09:2160 /*2161 * The chip_id of the MAX6690 holds the revision of the chip.2162 * The lowest 3 bits of the config1 register are unused and2163 * should return zero when read.2164 * Note that MAX6654 and MAX6690 are practically the same chips.2165 * The only diference is the rated accuracy. Rev. 1 of the2166 * MAX6690 datasheet lists a chip ID of 0x08, and a chip labeled2167 * MAX6654 was observed to have a chip ID of 0x09.2168 */2169 if (common_address && !(config1 & 0x07) && convrate <= 0x07)2170 name = "max6690";2171 break;2172 case 0x4d:2173 /*2174 * MAX6642, MAX6657, MAX6658 and MAX6659 do NOT have a chip_id2175 * register. Reading from that address will return the last2176 * read value, which in our case is those of the man_id2177 * register, or 0x4d.2178 * MAX6642 does not have a conversion rate register, nor low2179 * limit registers. Reading from those registers returns the2180 * last read value.2181 *2182 * For MAX6657, MAX6658 and MAX6659, the config1 register lacks2183 * a low nibble, so the value will be those of the previous2184 * read, so in our case again those of the man_id register.2185 * MAX6659 has a third set of upper temperature limit registers.2186 * Those registers also return values on MAX6657 and MAX6658,2187 * thus the only way to detect MAX6659 is by its address.2188 * For this reason it will be mis-detected as MAX6657 if its2189 * address is 0x4c.2190 */2191 if (address >= 0x48 && address <= 0x4f && config1 == convrate &&2192 !(config1 & 0x0f)) {2193 int regval;2194 2195 /*2196 * We know that this is not a MAX6657/58/59 because its2197 * configuration register has the wrong value and it does2198 * not appear to have a conversion rate register.2199 */2200 2201 /* re-read manufacturer ID to have a good baseline */2202 if (i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID) != 0x4d)2203 break;2204 2205 /* check various non-existing registers */2206 if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != 0x4d ||2207 i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != 0x4d ||2208 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != 0x4d)2209 break;2210 2211 /* check for unused status register bits */2212 regval = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);2213 if (regval < 0 || (regval & 0x2b))2214 break;2215 2216 /* re-check unsupported registers */2217 if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != regval ||2218 i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != regval ||2219 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != regval)2220 break;2221 2222 name = "max6642";2223 } else if ((address == 0x4c || address == 0x4d || address == 0x4e) &&2224 (config1 & 0x1f) == 0x0d && convrate <= 0x09) {2225 if (address == 0x4c)2226 name = "max6657";2227 else2228 name = "max6659";2229 }2230 break;2231 case 0x59:2232 /*2233 * The chip_id register of the MAX6646/6647/6649 holds the2234 * revision of the chip. The lowest 6 bits of the config12235 * register are unused and should return zero when read.2236 * The I2C address of MAX6648/6692 is fixed at 0x4c.2237 * MAX6646 is at address 0x4d, MAX6647 is at address 0x4e,2238 * and MAX6649 is at address 0x4c. A slight difference between2239 * the two sets of chips is that the remote temperature register2240 * reports different values if the DXP pin is open or shorted.2241 * We can use that information to help distinguish between the2242 * chips. MAX6648 will be mis-detected as MAX6649 if the remote2243 * diode is connected, but there isn't really anything we can2244 * do about that.2245 */2246 if (!(config1 & 0x3f) && convrate <= 0x07) {2247 int temp;2248 2249 switch (address) {2250 case 0x4c:2251 /*2252 * MAX6649 reports an external temperature2253 * value of 0xff if DXP is open or shorted.2254 * MAX6648 reports 0x80 in that case.2255 */2256 temp = i2c_smbus_read_byte_data(client,2257 LM90_REG_REMOTE_TEMPH);2258 if (temp == 0x80)2259 name = "max6648";2260 else2261 name = "max6649";2262 break;2263 case 0x4d:2264 name = "max6646";2265 break;2266 case 0x4e:2267 name = "max6647";2268 break;2269 default:2270 break;2271 }2272 }2273 break;2274 default:2275 break;2276 }2277 2278 return name;2279}2280 2281static const char *lm90_detect_nuvoton(struct i2c_client *client, int chip_id,2282 int config1, int convrate)2283{2284 int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);2285 int address = client->addr;2286 const char *name = NULL;2287 2288 if (config2 < 0)2289 return NULL;2290 2291 if (address == 0x4c && !(config1 & 0x2a) && !(config2 & 0xf8)) {2292 if (chip_id == 0x01 && convrate <= 0x09) {2293 /* W83L771W/G */2294 name = "w83l771";2295 } else if ((chip_id & 0xfe) == 0x10 && convrate <= 0x08) {2296 /* W83L771AWG/ASG */2297 name = "w83l771";2298 }2299 }2300 return name;2301}2302 2303static const char *lm90_detect_nxp(struct i2c_client *client, bool common_address,2304 int chip_id, int config1, int convrate)2305{2306 int address = client->addr;2307 const char *name = NULL;2308 int config2;2309 2310 switch (chip_id) {2311 case 0x00:2312 config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);2313 if (config2 < 0)2314 return NULL;2315 if (address >= 0x48 && address <= 0x4f &&2316 !(config1 & 0x2a) && !(config2 & 0xfe) && convrate <= 0x09)2317 name = "sa56004";2318 break;2319 case 0x80:2320 if (common_address && !(config1 & 0x3f) && convrate <= 0x07)2321 name = "ne1618";2322 break;2323 default:2324 break;2325 }2326 return name;2327}2328 2329static const char *lm90_detect_gmt(struct i2c_client *client, int chip_id,2330 int config1, int convrate)2331{2332 int address = client->addr;2333 2334 /*2335 * According to the datasheet, G781 is supposed to be at I2C Address2336 * 0x4c and have a chip ID of 0x01. G781-1 is supposed to be at I2C2337 * address 0x4d and have a chip ID of 0x03. However, when support2338 * for G781 was added, chips at 0x4c and 0x4d were found to have a2339 * chip ID of 0x01. A G781-1 at I2C address 0x4d was now found with2340 * chip ID 0x03.2341 * To avoid detection failures, accept chip ID 0x01 and 0x03 at both2342 * addresses.2343 * G784 reports manufacturer ID 0x47 and chip ID 0x01. A public2344 * datasheet is not available. Extensive testing suggests that2345 * the chip appears to be fully compatible with G781.2346 * Available register dumps show that G751 also reports manufacturer2347 * ID 0x47 and chip ID 0x01 even though that chip does not officially2348 * support those registers. This makes chip detection somewhat2349 * vulnerable. To improve detection quality, read the offset low byte2350 * and alert fault queue registers and verify that only expected bits2351 * are set.2352 */2353 if ((chip_id == 0x01 || chip_id == 0x03) &&2354 (address == 0x4c || address == 0x4d) &&2355 !(config1 & 0x3f) && convrate <= 0x08) {2356 int reg;2357 2358 reg = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_OFFSL);2359 if (reg < 0 || reg & 0x1f)2360 return NULL;2361 reg = i2c_smbus_read_byte_data(client, TMP451_REG_CONALERT);2362 if (reg < 0 || reg & 0xf1)2363 return NULL;2364 2365 return "g781";2366 }2367 2368 return NULL;2369}2370 2371static const char *lm90_detect_ti49(struct i2c_client *client, bool common_address,2372 int chip_id, int config1, int convrate)2373{2374 if (common_address && chip_id == 0x00 && !(config1 & 0x3f) && !(convrate & 0xf8)) {2375 /* THMC10: Unsupported registers return 0xff */2376 if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) == 0xff &&2377 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_CRIT) == 0xff)2378 return "thmc10";2379 }2380 return NULL;2381}2382 2383static const char *lm90_detect_ti(struct i2c_client *client, int chip_id,2384 int config1, int convrate)2385{2386 int address = client->addr;2387 const char *name = NULL;2388 2389 if (chip_id == 0x00 && !(config1 & 0x1b) && convrate <= 0x09) {2390 int local_ext, conalert, chen, dfc;2391 2392 local_ext = i2c_smbus_read_byte_data(client,2393 TMP451_REG_LOCAL_TEMPL);2394 conalert = i2c_smbus_read_byte_data(client,2395 TMP451_REG_CONALERT);2396 chen = i2c_smbus_read_byte_data(client, TMP461_REG_CHEN);2397 dfc = i2c_smbus_read_byte_data(client, TMP461_REG_DFC);2398 2399 if (!(local_ext & 0x0f) && (conalert & 0xf1) == 0x01 &&2400 (chen & 0xfc) == 0x00 && (dfc & 0xfc) == 0x00) {2401 if (address == 0x4c && !(chen & 0x03))2402 name = "tmp451";2403 else if (address >= 0x48 && address <= 0x4f)2404 name = "tmp461";2405 }2406 }2407 2408 return name;2409}2410 2411/* Return 0 if detection is successful, -ENODEV otherwise */2412static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info)2413{2414 struct i2c_adapter *adapter = client->adapter;2415 int man_id, chip_id, config1, convrate, lhigh;2416 const char *name = NULL;2417 int address = client->addr;2418 bool common_address =2419 (address >= 0x18 && address <= 0x1a) ||2420 (address >= 0x29 && address <= 0x2b) ||2421 (address >= 0x4c && address <= 0x4e);2422 2423 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))2424 return -ENODEV;2425 2426 /*2427 * Get well defined register value for chips with neither man_id nor2428 * chip_id registers.2429 */2430 lhigh = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH);2431 2432 /* detection and identification */2433 man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID);2434 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID);2435 config1 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG1);2436 convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE);2437 if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0 || lhigh < 0)2438 return -ENODEV;2439 2440 /* Bail out immediately if all register report the same value */2441 if (lhigh == man_id && lhigh == chip_id && lhigh == config1 && lhigh == convrate)2442 return -ENODEV;2443 2444 /*2445 * If reading man_id and chip_id both return the same value as lhigh,2446 * the chip may not support those registers and return the most recent read2447 * value. Check again with a different register and handle accordingly.2448 */2449 if (man_id == lhigh && chip_id == lhigh) {2450 convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE);2451 man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID);2452 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID);2453 if (convrate < 0 || man_id < 0 || chip_id < 0)2454 return -ENODEV;2455 if (man_id == convrate && chip_id == convrate)2456 man_id = -1;2457 }2458 switch (man_id) {2459 case -1: /* Chip does not support man_id / chip_id */2460 if (common_address && !convrate && !(config1 & 0x7f))2461 name = lm90_detect_lm84(client);2462 break;2463 case 0x01: /* National Semiconductor */2464 name = lm90_detect_national(client, chip_id, config1, convrate);2465 break;2466 case 0x1a: /* ON */2467 name = lm90_detect_on(client, chip_id, config1, convrate);2468 break;2469 case 0x23: /* Genesys Logic */2470 if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8))2471 name = "gl523sm";2472 break;2473 case 0x41: /* Analog Devices */2474 name = lm90_detect_analog(client, common_address, chip_id, config1,2475 convrate);2476 break;2477 case 0x47: /* GMT */2478 name = lm90_detect_gmt(client, chip_id, config1, convrate);2479 break;2480 case 0x49: /* TI */2481 name = lm90_detect_ti49(client, common_address, chip_id, config1, convrate);2482 break;2483 case 0x4d: /* Maxim Integrated */2484 name = lm90_detect_maxim(client, common_address, chip_id,2485 config1, convrate);2486 break;2487 case 0x54: /* ON MC1066, Microchip TC1068, TCM1617 (originally TelCom) */2488 if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8))2489 name = "mc1066";2490 break;2491 case 0x55: /* TI */2492 name = lm90_detect_ti(client, chip_id, config1, convrate);2493 break;2494 case 0x5c: /* Winbond/Nuvoton */2495 name = lm90_detect_nuvoton(client, chip_id, config1, convrate);2496 break;2497 case 0xa1: /* NXP Semiconductor/Philips */2498 name = lm90_detect_nxp(client, common_address, chip_id, config1, convrate);2499 break;2500 case 0xff: /* MAX1617, G767, NE1617 */2501 if (common_address && chip_id == 0xff && convrate < 8)2502 name = lm90_detect_max1617(client, config1);2503 break;2504 default:2505 break;2506 }2507 2508 if (!name) { /* identification failed */2509 dev_dbg(&adapter->dev,2510 "Unsupported chip at 0x%02x (man_id=0x%02X, chip_id=0x%02X)\n",2511 client->addr, man_id, chip_id);2512 return -ENODEV;2513 }2514 2515 strscpy(info->type, name, I2C_NAME_SIZE);2516 2517 return 0;2518}2519 2520static void lm90_restore_conf(void *_data)2521{2522 struct lm90_data *data = _data;2523 struct i2c_client *client = data->client;2524 2525 cancel_delayed_work_sync(&data->alert_work);2526 cancel_work_sync(&data->report_work);2527 2528 /* Restore initial configuration */2529 if (data->flags & LM90_HAVE_CONVRATE)2530 lm90_write_convrate(data, data->convrate_orig);2531 lm90_write_reg(client, LM90_REG_CONFIG1, data->config_orig);2532}2533 2534static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)2535{2536 struct device_node *np = client->dev.of_node;2537 int config, convrate;2538 2539 if (data->flags & LM90_HAVE_CONVRATE) {2540 convrate = lm90_read_reg(client, LM90_REG_CONVRATE);2541 if (convrate < 0)2542 return convrate;2543 data->convrate_orig = convrate;2544 lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */2545 } else {2546 data->update_interval = 500;2547 }2548 2549 /*2550 * Start the conversions.2551 */2552 config = lm90_read_reg(client, LM90_REG_CONFIG1);2553 if (config < 0)2554 return config;2555 data->config_orig = config;2556 data->config = config;2557 2558 /* Check Temperature Range Select */2559 if (data->flags & LM90_HAVE_EXTENDED_TEMP) {2560 if (of_property_read_bool(np, "ti,extended-range-enable"))2561 config |= 0x04;2562 if (!(config & 0x04))2563 data->flags &= ~LM90_HAVE_EXTENDED_TEMP;2564 }2565 2566 /*2567 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,2568 * 0.125 degree resolution) and range (0x08, extend range2569 * to -64 degree) mode for the remote temperature sensor.2570 * Note that expeciments with an actual chip do not show a difference2571 * if bit 3 is set or not.2572 */2573 if (data->kind == max6680)2574 config |= 0x18;2575 2576 /*2577 * Put MAX6654 into extended range (0x20, extend minimum range from2578 * 0 degrees to -64 degrees). Note that extended resolution is not2579 * possible on the MAX6654 unless conversion rate is set to 1 Hz or2580 * slower, which is intentionally not done by default.2581 */2582 if (data->kind == max6654)2583 config |= 0x20;2584 2585 /*2586 * Select external channel 0 for devices with three sensors2587 */2588 if (data->flags & LM90_HAVE_TEMP3)2589 config &= ~0x08;2590 2591 /*2592 * Interrupt is enabled by default on reset, but it may be disabled2593 * by bootloader, unmask it.2594 */2595 if (client->irq)2596 config &= ~0x80;2597 2598 config &= 0xBF; /* run */2599 lm90_update_confreg(data, config);2600 2601 return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);2602}2603 2604static bool lm90_is_tripped(struct i2c_client *client)2605{2606 struct lm90_data *data = i2c_get_clientdata(client);2607 int ret;2608 2609 ret = lm90_update_alarms(data, true);2610 if (ret < 0)2611 return false;2612 2613 return !!data->current_alarms;2614}2615 2616static irqreturn_t lm90_irq_thread(int irq, void *dev_id)2617{2618 struct i2c_client *client = dev_id;2619 2620 if (lm90_is_tripped(client))2621 return IRQ_HANDLED;2622 else2623 return IRQ_NONE;2624}2625 2626static int lm90_probe_channel_from_dt(struct i2c_client *client,2627 struct device_node *child,2628 struct lm90_data *data)2629{2630 u32 id;2631 s32 val;2632 int err;2633 struct device *dev = &client->dev;2634 2635 err = of_property_read_u32(child, "reg", &id);2636 if (err) {2637 dev_err(dev, "missing reg property of %pOFn\n", child);2638 return err;2639 }2640 2641 if (id >= MAX_CHANNELS) {2642 dev_err(dev, "invalid reg property value %d in %pOFn\n", id, child);2643 return -EINVAL;2644 }2645 2646 err = of_property_read_string(child, "label", &data->channel_label[id]);2647 if (err == -ENODATA || err == -EILSEQ) {2648 dev_err(dev, "invalid label property in %pOFn\n", child);2649 return err;2650 }2651 2652 if (data->channel_label[id])2653 data->channel_config[id] |= HWMON_T_LABEL;2654 2655 err = of_property_read_s32(child, "temperature-offset-millicelsius", &val);2656 if (!err) {2657 if (id == 0) {2658 dev_err(dev, "temperature-offset-millicelsius can't be set for internal channel\n");2659 return -EINVAL;2660 }2661 2662 err = lm90_set_temp_offset(data, lm90_temp_offset_index[id], id, val);2663 if (err) {2664 dev_err(dev, "can't set temperature offset %d for channel %d (%d)\n",2665 val, id, err);2666 return err;2667 }2668 }2669 2670 return 0;2671}2672 2673static int lm90_parse_dt_channel_info(struct i2c_client *client,2674 struct lm90_data *data)2675{2676 int err;2677 struct device *dev = &client->dev;2678 const struct device_node *np = dev->of_node;2679 2680 for_each_child_of_node_scoped(np, child) {2681 if (strcmp(child->name, "channel"))2682 continue;2683 2684 err = lm90_probe_channel_from_dt(client, child, data);2685 if (err)2686 return err;2687 }2688 2689 return 0;2690}2691 2692static const struct hwmon_ops lm90_ops = {2693 .is_visible = lm90_is_visible,2694 .read = lm90_read,2695 .read_string = lm90_read_string,2696 .write = lm90_write,2697};2698 2699static int lm90_probe(struct i2c_client *client)2700{2701 struct device *dev = &client->dev;2702 struct i2c_adapter *adapter = client->adapter;2703 struct hwmon_channel_info *info;2704 struct device *hwmon_dev;2705 struct lm90_data *data;2706 int err;2707 2708 err = devm_regulator_get_enable(dev, "vcc");2709 if (err)2710 return dev_err_probe(dev, err, "Failed to enable regulator\n");2711 2712 data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);2713 if (!data)2714 return -ENOMEM;2715 2716 data->client = client;2717 i2c_set_clientdata(client, data);2718 mutex_init(&data->update_lock);2719 INIT_DELAYED_WORK(&data->alert_work, lm90_alert_work);2720 INIT_WORK(&data->report_work, lm90_report_alarms);2721 2722 /* Set the device type */2723 data->kind = (uintptr_t)i2c_get_match_data(client);2724 2725 /*2726 * Different devices have different alarm bits triggering the2727 * ALERT# output2728 */2729 data->alert_alarms = lm90_params[data->kind].alert_alarms;2730 data->resolution = lm90_params[data->kind].resolution ? : 11;2731 2732 /* Set chip capabilities */2733 data->flags = lm90_params[data->kind].flags;2734 2735 if ((data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) &&2736 !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_PEC))2737 data->flags &= ~(LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC);2738 2739 if ((data->flags & LM90_HAVE_PARTIAL_PEC) &&2740 !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))2741 data->flags &= ~LM90_HAVE_PARTIAL_PEC;2742 2743 data->chip.ops = &lm90_ops;2744 data->chip.info = data->info;2745 2746 data->info[0] = &data->chip_info;2747 info = &data->chip_info;2748 info->type = hwmon_chip;2749 info->config = data->chip_config;2750 2751 data->chip_config[0] = HWMON_C_REGISTER_TZ;2752 if (data->flags & LM90_HAVE_ALARMS)2753 data->chip_config[0] |= HWMON_C_ALARMS;2754 if (data->flags & LM90_HAVE_CONVRATE)2755 data->chip_config[0] |= HWMON_C_UPDATE_INTERVAL;2756 if (data->flags & LM90_HAVE_FAULTQUEUE)2757 data->chip_config[0] |= HWMON_C_TEMP_SAMPLES;2758 if (data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC))2759 data->chip_config[0] |= HWMON_C_PEC;2760 data->info[1] = &data->temp_info;2761 2762 info = &data->temp_info;2763 info->type = hwmon_temp;2764 info->config = data->channel_config;2765 2766 data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MAX |2767 HWMON_T_MAX_ALARM;2768 data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MAX |2769 HWMON_T_MAX_ALARM | HWMON_T_FAULT;2770 2771 if (data->flags & LM90_HAVE_LOW) {2772 data->channel_config[0] |= HWMON_T_MIN | HWMON_T_MIN_ALARM;2773 data->channel_config[1] |= HWMON_T_MIN | HWMON_T_MIN_ALARM;2774 }2775 2776 if (data->flags & LM90_HAVE_CRIT) {2777 data->channel_config[0] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;2778 data->channel_config[1] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;2779 }2780 2781 if (data->flags & LM90_HAVE_OFFSET)2782 data->channel_config[1] |= HWMON_T_OFFSET;2783 2784 if (data->flags & LM90_HAVE_EMERGENCY) {2785 data->channel_config[0] |= HWMON_T_EMERGENCY |2786 HWMON_T_EMERGENCY_HYST;2787 data->channel_config[1] |= HWMON_T_EMERGENCY |2788 HWMON_T_EMERGENCY_HYST;2789 }2790 2791 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {2792 data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;2793 data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;2794 }2795 2796 if (data->flags & LM90_HAVE_TEMP3) {2797 data->channel_config[2] = HWMON_T_INPUT |2798 HWMON_T_MIN | HWMON_T_MAX |2799 HWMON_T_CRIT | HWMON_T_CRIT_HYST |2800 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |2801 HWMON_T_CRIT_ALARM | HWMON_T_FAULT;2802 if (data->flags & LM90_HAVE_EMERGENCY) {2803 data->channel_config[2] |= HWMON_T_EMERGENCY |2804 HWMON_T_EMERGENCY_HYST;2805 }2806 if (data->flags & LM90_HAVE_EMERGENCY_ALARM)2807 data->channel_config[2] |= HWMON_T_EMERGENCY_ALARM;2808 if (data->flags & LM90_HAVE_OFFSET)2809 data->channel_config[2] |= HWMON_T_OFFSET;2810 }2811 2812 data->faultqueue_mask = lm90_params[data->kind].faultqueue_mask;2813 data->faultqueue_depth = lm90_params[data->kind].faultqueue_depth;2814 data->reg_local_ext = lm90_params[data->kind].reg_local_ext;2815 if (data->flags & LM90_HAVE_REMOTE_EXT)2816 data->reg_remote_ext = LM90_REG_REMOTE_TEMPL;2817 data->reg_status2 = lm90_params[data->kind].reg_status2;2818 2819 /* Set maximum conversion rate */2820 data->max_convrate = lm90_params[data->kind].max_convrate;2821 2822 /* Parse device-tree channel information */2823 if (client->dev.of_node) {2824 err = lm90_parse_dt_channel_info(client, data);2825 if (err)2826 return err;2827 }2828 2829 /* Initialize the LM90 chip */2830 err = lm90_init_client(client, data);2831 if (err < 0) {2832 dev_err(dev, "Failed to initialize device\n");2833 return err;2834 }2835 2836 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,2837 data, &data->chip,2838 NULL);2839 if (IS_ERR(hwmon_dev))2840 return PTR_ERR(hwmon_dev);2841 2842 data->hwmon_dev = hwmon_dev;2843 2844 if (client->irq) {2845 dev_dbg(dev, "IRQ: %d\n", client->irq);2846 err = devm_request_threaded_irq(dev, client->irq,2847 NULL, lm90_irq_thread,2848 IRQF_ONESHOT, "lm90", client);2849 if (err < 0) {2850 dev_err(dev, "cannot request IRQ %d\n", client->irq);2851 return err;2852 }2853 }2854 2855 return 0;2856}2857 2858static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,2859 unsigned int flag)2860{2861 if (type != I2C_PROTOCOL_SMBUS_ALERT)2862 return;2863 2864 if (lm90_is_tripped(client)) {2865 /*2866 * Disable ALERT# output, because these chips don't implement2867 * SMBus alert correctly; they should only hold the alert line2868 * low briefly.2869 */2870 struct lm90_data *data = i2c_get_clientdata(client);2871 2872 if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&2873 (data->current_alarms & data->alert_alarms)) {2874 if (!(data->config & 0x80)) {2875 dev_dbg(&client->dev, "Disabling ALERT#\n");2876 lm90_update_confreg(data, data->config | 0x80);2877 }2878 schedule_delayed_work(&data->alert_work,2879 max_t(int, HZ, msecs_to_jiffies(data->update_interval)));2880 }2881 } else {2882 dev_dbg(&client->dev, "Everything OK\n");2883 }2884}2885 2886static int lm90_suspend(struct device *dev)2887{2888 struct lm90_data *data = dev_get_drvdata(dev);2889 struct i2c_client *client = data->client;2890 2891 if (client->irq)2892 disable_irq(client->irq);2893 2894 return 0;2895}2896 2897static int lm90_resume(struct device *dev)2898{2899 struct lm90_data *data = dev_get_drvdata(dev);2900 struct i2c_client *client = data->client;2901 2902 if (client->irq)2903 enable_irq(client->irq);2904 2905 return 0;2906}2907 2908static DEFINE_SIMPLE_DEV_PM_OPS(lm90_pm_ops, lm90_suspend, lm90_resume);2909 2910static struct i2c_driver lm90_driver = {2911 .class = I2C_CLASS_HWMON,2912 .driver = {2913 .name = "lm90",2914 .of_match_table = of_match_ptr(lm90_of_match),2915 .pm = pm_sleep_ptr(&lm90_pm_ops),2916 },2917 .probe = lm90_probe,2918 .alert = lm90_alert,2919 .id_table = lm90_id,2920 .detect = lm90_detect,2921 .address_list = normal_i2c,2922};2923 2924module_i2c_driver(lm90_driver);2925 2926MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");2927MODULE_DESCRIPTION("LM90/ADM1032 driver");2928MODULE_LICENSE("GPL");2929