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1// SPDX-License-Identifier: GPL-2.0-or-later2/* tmp401.c3 *4 * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com>5 * Preliminary tmp411 support by:6 * Gabriel Konat, Sander Leget, Wouter Willems7 * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de>8 *9 * Cleanup and support for TMP431 and TMP432 by Guenter Roeck10 * Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net>11 */12 13/*14 * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC.15 *16 * Note this IC is in some aspect similar to the LM90, but it has quite a17 * few differences too, for example the local temp has a higher resolution18 * and thus has 16 bits registers for its value and limit instead of 8 bits.19 */20 21#include <linux/bitops.h>22#include <linux/err.h>23#include <linux/i2c.h>24#include <linux/hwmon.h>25#include <linux/init.h>26#include <linux/module.h>27#include <linux/mutex.h>28#include <linux/regmap.h>29#include <linux/slab.h>30 31/* Addresses to scan */32static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d,33	0x4e, 0x4f, I2C_CLIENT_END };34 35enum chips { tmp401, tmp411, tmp431, tmp432, tmp435 };36 37/*38 * The TMP401 registers, note some registers have different addresses for39 * reading and writing40 */41#define TMP401_STATUS				0x0242#define TMP401_CONFIG				0x0343#define TMP401_CONVERSION_RATE			0x0444#define TMP4XX_N_FACTOR_REG			0x1845#define TMP43X_BETA_RANGE			0x2546#define TMP401_TEMP_CRIT_HYST			0x2147#define TMP401_MANUFACTURER_ID_REG		0xFE48#define TMP401_DEVICE_ID_REG			0xFF49 50static const u8 TMP401_TEMP_MSB[7][3] = {51	{ 0x00, 0x01, 0x23 },	/* temp */52	{ 0x06, 0x08, 0x16 },	/* low limit */53	{ 0x05, 0x07, 0x15 },	/* high limit */54	{ 0x20, 0x19, 0x1a },	/* therm (crit) limit */55	{ 0x30, 0x34, 0x00 },	/* lowest */56	{ 0x32, 0xf6, 0x00 },	/* highest */57};58 59/* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */60static const u8 TMP432_STATUS_REG[] = {61	0x1b, 0x36, 0x35, 0x37 };62 63/* Flags */64#define TMP401_CONFIG_RANGE			BIT(2)65#define TMP401_CONFIG_SHUTDOWN			BIT(6)66#define TMP401_STATUS_LOCAL_CRIT		BIT(0)67#define TMP401_STATUS_REMOTE_CRIT		BIT(1)68#define TMP401_STATUS_REMOTE_OPEN		BIT(2)69#define TMP401_STATUS_REMOTE_LOW		BIT(3)70#define TMP401_STATUS_REMOTE_HIGH		BIT(4)71#define TMP401_STATUS_LOCAL_LOW			BIT(5)72#define TMP401_STATUS_LOCAL_HIGH		BIT(6)73 74/* On TMP432, each status has its own register */75#define TMP432_STATUS_LOCAL			BIT(0)76#define TMP432_STATUS_REMOTE1			BIT(1)77#define TMP432_STATUS_REMOTE2			BIT(2)78 79/* Manufacturer / Device ID's */80#define TMP401_MANUFACTURER_ID			0x5581#define TMP401_DEVICE_ID			0x1182#define TMP411A_DEVICE_ID			0x1283#define TMP411B_DEVICE_ID			0x1384#define TMP411C_DEVICE_ID			0x1085#define TMP431_DEVICE_ID			0x3186#define TMP432_DEVICE_ID			0x3287#define TMP435_DEVICE_ID			0x3588 89/*90 * Driver data (common to all clients)91 */92 93static const struct i2c_device_id tmp401_id[] = {94	{ "tmp401", tmp401 },95	{ "tmp411", tmp411 },96	{ "tmp431", tmp431 },97	{ "tmp432", tmp432 },98	{ "tmp435", tmp435 },99	{ }100};101MODULE_DEVICE_TABLE(i2c, tmp401_id);102 103/*104 * Client data (each client gets its own)105 */106 107struct tmp401_data {108	struct i2c_client *client;109	struct regmap *regmap;110	struct mutex update_lock;111	enum chips kind;112 113	bool extended_range;114 115	/* hwmon API configuration data */116	u32 chip_channel_config[4];117	struct hwmon_channel_info chip_info;118	u32 temp_channel_config[4];119	struct hwmon_channel_info temp_info;120	const struct hwmon_channel_info *info[3];121	struct hwmon_chip_info chip;122};123 124/* regmap */125 126static bool tmp401_regmap_is_volatile(struct device *dev, unsigned int reg)127{128	switch (reg) {129	case 0:			/* local temp msb */130	case 1:			/* remote temp msb */131	case 2:			/* status */132	case 0x10:		/* remote temp lsb */133	case 0x15:		/* local temp lsb */134	case 0x1b:		/* status (tmp432) */135	case 0x23 ... 0x24:	/* remote temp 2 msb / lsb */136	case 0x30 ... 0x37:	/* lowest/highest temp; status (tmp432) */137		return true;138	default:139		return false;140	}141}142 143static int tmp401_reg_read(void *context, unsigned int reg, unsigned int *val)144{145	struct tmp401_data *data = context;146	struct i2c_client *client = data->client;147	int regval;148 149	switch (reg) {150	case 0:			/* local temp msb */151	case 1:			/* remote temp msb */152	case 5:			/* local temp high limit msb */153	case 6:			/* local temp low limit msb */154	case 7:			/* remote temp ligh limit msb */155	case 8:			/* remote temp low limit msb */156	case 0x15:		/* remote temp 2 high limit msb */157	case 0x16:		/* remote temp 2 low limit msb */158	case 0x23:		/* remote temp 2 msb */159	case 0x30:		/* local temp minimum, tmp411 */160	case 0x32:		/* local temp maximum, tmp411 */161	case 0x34:		/* remote temp minimum, tmp411 */162	case 0xf6:		/* remote temp maximum, tmp411 (really 0x36) */163		/* work around register overlap between TMP411 and TMP432 */164		if (reg == 0xf6)165			reg = 0x36;166		regval = i2c_smbus_read_word_swapped(client, reg);167		if (regval < 0)168			return regval;169		*val = regval;170		break;171	case 0x19:		/* critical limits, 8-bit registers */172	case 0x1a:173	case 0x20:174		regval = i2c_smbus_read_byte_data(client, reg);175		if (regval < 0)176			return regval;177		*val = regval << 8;178		break;179	case 0x1b:180	case 0x35 ... 0x37:181		if (data->kind == tmp432) {182			regval = i2c_smbus_read_byte_data(client, reg);183			if (regval < 0)184				return regval;185			*val = regval;186			break;187		}188		/* simulate TMP432 status registers */189		regval = i2c_smbus_read_byte_data(client, TMP401_STATUS);190		if (regval < 0)191			return regval;192		*val = 0;193		switch (reg) {194		case 0x1b:	/* open / fault */195			if (regval & TMP401_STATUS_REMOTE_OPEN)196				*val |= BIT(1);197			break;198		case 0x35:	/* high limit */199			if (regval & TMP401_STATUS_LOCAL_HIGH)200				*val |= BIT(0);201			if (regval & TMP401_STATUS_REMOTE_HIGH)202				*val |= BIT(1);203			break;204		case 0x36:	/* low limit */205			if (regval & TMP401_STATUS_LOCAL_LOW)206				*val |= BIT(0);207			if (regval & TMP401_STATUS_REMOTE_LOW)208				*val |= BIT(1);209			break;210		case 0x37:	/* therm / crit limit */211			if (regval & TMP401_STATUS_LOCAL_CRIT)212				*val |= BIT(0);213			if (regval & TMP401_STATUS_REMOTE_CRIT)214				*val |= BIT(1);215			break;216		}217		break;218	default:219		regval = i2c_smbus_read_byte_data(client, reg);220		if (regval < 0)221			return regval;222		*val = regval;223		break;224	}225	return 0;226}227 228static int tmp401_reg_write(void *context, unsigned int reg, unsigned int val)229{230	struct tmp401_data *data = context;231	struct i2c_client *client = data->client;232 233	switch (reg) {234	case 0x05:		/* local temp high limit msb */235	case 0x06:		/* local temp low limit msb */236	case 0x07:		/* remote temp ligh limit msb */237	case 0x08:		/* remote temp low limit msb */238		reg += 6;	/* adjust for register write address */239		fallthrough;240	case 0x15:		/* remote temp 2 high limit msb */241	case 0x16:		/* remote temp 2 low limit msb */242		return i2c_smbus_write_word_swapped(client, reg, val);243	case 0x19:		/* critical limits, 8-bit registers */244	case 0x1a:245	case 0x20:246		return i2c_smbus_write_byte_data(client, reg, val >> 8);247	case TMP401_CONVERSION_RATE:248	case TMP401_CONFIG:249		reg += 6;	/* adjust for register write address */250		fallthrough;251	default:252		return i2c_smbus_write_byte_data(client, reg, val);253	}254}255 256static const struct regmap_config tmp401_regmap_config = {257	.reg_bits = 8,258	.val_bits = 16,259	.cache_type = REGCACHE_MAPLE,260	.volatile_reg = tmp401_regmap_is_volatile,261	.reg_read = tmp401_reg_read,262	.reg_write = tmp401_reg_write,263};264 265/* temperature conversion */266 267static int tmp401_register_to_temp(u16 reg, bool extended)268{269	int temp = reg;270 271	if (extended)272		temp -= 64 * 256;273 274	return DIV_ROUND_CLOSEST(temp * 125, 32);275}276 277static u16 tmp401_temp_to_register(long temp, bool extended, int zbits)278{279	if (extended) {280		temp = clamp_val(temp, -64000, 191000);281		temp += 64000;282	} else {283		temp = clamp_val(temp, 0, 127000);284	}285 286	return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits;287}288 289/* hwmon API functions */290 291static const u8 tmp401_temp_reg_index[] = {292	[hwmon_temp_input] = 0,293	[hwmon_temp_min] = 1,294	[hwmon_temp_max] = 2,295	[hwmon_temp_crit] = 3,296	[hwmon_temp_lowest] = 4,297	[hwmon_temp_highest] = 5,298};299 300static const u8 tmp401_status_reg_index[] = {301	[hwmon_temp_fault] = 0,302	[hwmon_temp_min_alarm] = 1,303	[hwmon_temp_max_alarm] = 2,304	[hwmon_temp_crit_alarm] = 3,305};306 307static int tmp401_temp_read(struct device *dev, u32 attr, int channel, long *val)308{309	struct tmp401_data *data = dev_get_drvdata(dev);310	struct regmap *regmap = data->regmap;311	unsigned int regs[2] = { TMP401_TEMP_MSB[3][channel], TMP401_TEMP_CRIT_HYST };312	unsigned int regval;313	u16 regvals[2];314	int reg, ret;315 316	switch (attr) {317	case hwmon_temp_input:318	case hwmon_temp_min:319	case hwmon_temp_max:320	case hwmon_temp_crit:321	case hwmon_temp_lowest:322	case hwmon_temp_highest:323		reg = TMP401_TEMP_MSB[tmp401_temp_reg_index[attr]][channel];324		ret = regmap_read(regmap, reg, &regval);325		if (ret < 0)326			return ret;327		*val = tmp401_register_to_temp(regval, data->extended_range);328		break;329	case hwmon_temp_crit_hyst:330		ret = regmap_multi_reg_read(regmap, regs, regvals, 2);331		if (ret < 0)332			return ret;333		*val = tmp401_register_to_temp(regvals[0], data->extended_range) -334							(regvals[1] * 1000);335		break;336	case hwmon_temp_fault:337	case hwmon_temp_min_alarm:338	case hwmon_temp_max_alarm:339	case hwmon_temp_crit_alarm:340		reg = TMP432_STATUS_REG[tmp401_status_reg_index[attr]];341		ret = regmap_read(regmap, reg, &regval);342		if (ret < 0)343			return ret;344		*val = !!(regval & BIT(channel));345		break;346	default:347		return -EOPNOTSUPP;348	}349	return 0;350}351 352static int tmp401_temp_write(struct device *dev, u32 attr, int channel,353			     long val)354{355	struct tmp401_data *data = dev_get_drvdata(dev);356	struct regmap *regmap = data->regmap;357	unsigned int regval;358	int reg, ret, temp;359 360	mutex_lock(&data->update_lock);361	switch (attr) {362	case hwmon_temp_min:363	case hwmon_temp_max:364	case hwmon_temp_crit:365		reg = TMP401_TEMP_MSB[tmp401_temp_reg_index[attr]][channel];366		regval = tmp401_temp_to_register(val, data->extended_range,367						 attr == hwmon_temp_crit ? 8 : 4);368		ret = regmap_write(regmap, reg, regval);369		break;370	case hwmon_temp_crit_hyst:371		if (data->extended_range)372			val = clamp_val(val, -64000, 191000);373		else374			val = clamp_val(val, 0, 127000);375 376		reg = TMP401_TEMP_MSB[3][channel];377		ret = regmap_read(regmap, reg, &regval);378		if (ret < 0)379			break;380		temp = tmp401_register_to_temp(regval, data->extended_range);381		val = clamp_val(val, temp - 255000, temp);382		regval = ((temp - val) + 500) / 1000;383		ret = regmap_write(regmap, TMP401_TEMP_CRIT_HYST, regval);384		break;385	default:386		ret = -EOPNOTSUPP;387		break;388	}389	mutex_unlock(&data->update_lock);390	return ret;391}392 393static int tmp401_chip_read(struct device *dev, u32 attr, int channel, long *val)394{395	struct tmp401_data *data = dev_get_drvdata(dev);396	u32 regval;397	int ret;398 399	switch (attr) {400	case hwmon_chip_update_interval:401		ret = regmap_read(data->regmap, TMP401_CONVERSION_RATE, &regval);402		if (ret < 0)403			return ret;404		*val = (1 << (7 - regval)) * 125;405		break;406	case hwmon_chip_temp_reset_history:407		*val = 0;408		break;409	default:410		return -EOPNOTSUPP;411	}412 413	return 0;414}415 416static int tmp401_set_convrate(struct regmap *regmap, long val)417{418	int rate;419 420	/*421	 * For valid rates, interval can be calculated as422	 *	interval = (1 << (7 - rate)) * 125;423	 * Rounded rate is therefore424	 *	rate = 7 - __fls(interval * 4 / (125 * 3));425	 * Use clamp_val() to avoid overflows, and to ensure valid input426	 * for __fls.427	 */428	val = clamp_val(val, 125, 16000);429	rate = 7 - __fls(val * 4 / (125 * 3));430	return regmap_write(regmap, TMP401_CONVERSION_RATE, rate);431}432 433static int tmp401_chip_write(struct device *dev, u32 attr, int channel, long val)434{435	struct tmp401_data *data = dev_get_drvdata(dev);436	struct regmap *regmap = data->regmap;437	int err;438 439	mutex_lock(&data->update_lock);440	switch (attr) {441	case hwmon_chip_update_interval:442		err = tmp401_set_convrate(regmap, val);443		break;444	case hwmon_chip_temp_reset_history:445		if (val != 1) {446			err = -EINVAL;447			break;448		}449		/*450		 * Reset history by writing any value to any of the451		 * minimum/maximum registers (0x30-0x37).452		 */453		err = regmap_write(regmap, 0x30, 0);454		break;455	default:456		err = -EOPNOTSUPP;457		break;458	}459	mutex_unlock(&data->update_lock);460 461	return err;462}463 464static int tmp401_read(struct device *dev, enum hwmon_sensor_types type,465		       u32 attr, int channel, long *val)466{467	switch (type) {468	case hwmon_chip:469		return tmp401_chip_read(dev, attr, channel, val);470	case hwmon_temp:471		return tmp401_temp_read(dev, attr, channel, val);472	default:473		return -EOPNOTSUPP;474	}475}476 477static int tmp401_write(struct device *dev, enum hwmon_sensor_types type,478			u32 attr, int channel, long val)479{480	switch (type) {481	case hwmon_chip:482		return tmp401_chip_write(dev, attr, channel, val);483	case hwmon_temp:484		return tmp401_temp_write(dev, attr, channel, val);485	default:486		return -EOPNOTSUPP;487	}488}489 490static umode_t tmp401_is_visible(const void *data, enum hwmon_sensor_types type,491				 u32 attr, int channel)492{493	switch (type) {494	case hwmon_chip:495		switch (attr) {496		case hwmon_chip_update_interval:497		case hwmon_chip_temp_reset_history:498			return 0644;499		default:500			break;501		}502		break;503	case hwmon_temp:504		switch (attr) {505		case hwmon_temp_input:506		case hwmon_temp_min_alarm:507		case hwmon_temp_max_alarm:508		case hwmon_temp_crit_alarm:509		case hwmon_temp_fault:510		case hwmon_temp_lowest:511		case hwmon_temp_highest:512			return 0444;513		case hwmon_temp_min:514		case hwmon_temp_max:515		case hwmon_temp_crit:516		case hwmon_temp_crit_hyst:517			return 0644;518		default:519			break;520		}521		break;522	default:523		break;524	}525	return 0;526}527 528static const struct hwmon_ops tmp401_ops = {529	.is_visible = tmp401_is_visible,530	.read = tmp401_read,531	.write = tmp401_write,532};533 534/* chip initialization, detect, probe */535 536static int tmp401_init_client(struct tmp401_data *data)537{538	struct regmap *regmap = data->regmap;539	u32 config, config_orig;540	int ret;541	u32 val = 0;542	s32 nfactor = 0;543 544	/* Set conversion rate to 2 Hz */545	ret = regmap_write(regmap, TMP401_CONVERSION_RATE, 5);546	if (ret < 0)547		return ret;548 549	/* Start conversions (disable shutdown if necessary) */550	ret = regmap_read(regmap, TMP401_CONFIG, &config);551	if (ret < 0)552		return ret;553 554	config_orig = config;555	config &= ~TMP401_CONFIG_SHUTDOWN;556 557	if (of_property_read_bool(data->client->dev.of_node, "ti,extended-range-enable")) {558		/* Enable measurement over extended temperature range */559		config |= TMP401_CONFIG_RANGE;560	}561 562	data->extended_range = !!(config & TMP401_CONFIG_RANGE);563 564	if (config != config_orig) {565		ret = regmap_write(regmap, TMP401_CONFIG, config);566		if (ret < 0)567			return ret;568	}569 570	ret = of_property_read_u32(data->client->dev.of_node, "ti,n-factor", &nfactor);571	if (!ret) {572		if (data->kind == tmp401) {573			dev_err(&data->client->dev, "ti,tmp401 does not support n-factor correction\n");574			return -EINVAL;575		}576		if (nfactor < -128 || nfactor > 127) {577			dev_err(&data->client->dev, "n-factor is invalid (%d)\n", nfactor);578			return -EINVAL;579		}580		ret = regmap_write(regmap, TMP4XX_N_FACTOR_REG, (unsigned int)nfactor);581		if (ret < 0)582			return ret;583	}584 585	ret = of_property_read_u32(data->client->dev.of_node, "ti,beta-compensation", &val);586	if (!ret) {587		if (data->kind == tmp401 || data->kind == tmp411) {588			dev_err(&data->client->dev, "ti,tmp401 or ti,tmp411 does not support beta compensation\n");589			return -EINVAL;590		}591		if (val > 15) {592			dev_err(&data->client->dev, "beta-compensation is invalid (%u)\n", val);593			return -EINVAL;594		}595		ret = regmap_write(regmap, TMP43X_BETA_RANGE, val);596		if (ret < 0)597			return ret;598	}599 600	return 0;601}602 603static int tmp401_detect(struct i2c_client *client,604			 struct i2c_board_info *info)605{606	enum chips kind;607	struct i2c_adapter *adapter = client->adapter;608	u8 reg;609 610	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))611		return -ENODEV;612 613	/* Detect and identify the chip */614	reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG);615	if (reg != TMP401_MANUFACTURER_ID)616		return -ENODEV;617 618	reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG);619 620	switch (reg) {621	case TMP401_DEVICE_ID:622		if (client->addr != 0x4c)623			return -ENODEV;624		kind = tmp401;625		break;626	case TMP411A_DEVICE_ID:627		if (client->addr != 0x4c)628			return -ENODEV;629		kind = tmp411;630		break;631	case TMP411B_DEVICE_ID:632		if (client->addr != 0x4d)633			return -ENODEV;634		kind = tmp411;635		break;636	case TMP411C_DEVICE_ID:637		if (client->addr != 0x4e)638			return -ENODEV;639		kind = tmp411;640		break;641	case TMP431_DEVICE_ID:642		if (client->addr != 0x4c && client->addr != 0x4d)643			return -ENODEV;644		kind = tmp431;645		break;646	case TMP432_DEVICE_ID:647		if (client->addr != 0x4c && client->addr != 0x4d)648			return -ENODEV;649		kind = tmp432;650		break;651	case TMP435_DEVICE_ID:652		kind = tmp435;653		break;654	default:655		return -ENODEV;656	}657 658	reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG);659	if (reg & 0x1b)660		return -ENODEV;661 662	reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE);663	/* Datasheet says: 0x1-0x6 */664	if (reg > 15)665		return -ENODEV;666 667	strscpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE);668 669	return 0;670}671 672static int tmp401_probe(struct i2c_client *client)673{674	static const char * const names[] = {675		"TMP401", "TMP411", "TMP431", "TMP432", "TMP435"676	};677	struct device *dev = &client->dev;678	struct hwmon_channel_info *info;679	struct device *hwmon_dev;680	struct tmp401_data *data;681	int status;682 683	data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL);684	if (!data)685		return -ENOMEM;686 687	data->client = client;688	mutex_init(&data->update_lock);689	data->kind = (uintptr_t)i2c_get_match_data(client);690 691	data->regmap = devm_regmap_init(dev, NULL, data, &tmp401_regmap_config);692	if (IS_ERR(data->regmap))693		return PTR_ERR(data->regmap);694 695	/* initialize configuration data */696	data->chip.ops = &tmp401_ops;697	data->chip.info = data->info;698 699	data->info[0] = &data->chip_info;700	data->info[1] = &data->temp_info;701 702	info = &data->chip_info;703	info->type = hwmon_chip;704	info->config = data->chip_channel_config;705 706	data->chip_channel_config[0] = HWMON_C_UPDATE_INTERVAL;707 708	info = &data->temp_info;709	info->type = hwmon_temp;710	info->config = data->temp_channel_config;711 712	data->temp_channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |713		HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |714		HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM;715	data->temp_channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |716		HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |717		HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;718 719	if (data->kind == tmp411) {720		data->temp_channel_config[0] |= HWMON_T_HIGHEST | HWMON_T_LOWEST;721		data->temp_channel_config[1] |= HWMON_T_HIGHEST | HWMON_T_LOWEST;722		data->chip_channel_config[0] |= HWMON_C_TEMP_RESET_HISTORY;723	}724 725	if (data->kind == tmp432) {726		data->temp_channel_config[2] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |727			HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |728			HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;729	}730 731	/* Initialize the TMP401 chip */732	status = tmp401_init_client(data);733	if (status < 0)734		return status;735 736	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, data,737							 &data->chip, NULL);738	if (IS_ERR(hwmon_dev))739		return PTR_ERR(hwmon_dev);740 741	dev_info(dev, "Detected TI %s chip\n", names[data->kind]);742 743	return 0;744}745 746static const struct of_device_id __maybe_unused tmp4xx_of_match[] = {747	{ .compatible = "ti,tmp401", },748	{ .compatible = "ti,tmp411", },749	{ .compatible = "ti,tmp431", },750	{ .compatible = "ti,tmp432", },751	{ .compatible = "ti,tmp435", },752	{ },753};754MODULE_DEVICE_TABLE(of, tmp4xx_of_match);755 756static struct i2c_driver tmp401_driver = {757	.class		= I2C_CLASS_HWMON,758	.driver = {759		.name	= "tmp401",760		.of_match_table = of_match_ptr(tmp4xx_of_match),761	},762	.probe		= tmp401_probe,763	.id_table	= tmp401_id,764	.detect		= tmp401_detect,765	.address_list	= normal_i2c,766};767 768module_i2c_driver(tmp401_driver);769 770MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");771MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver");772MODULE_LICENSE("GPL");773