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1// SPDX-License-Identifier: GPL-2.0-or-later2/*3 * w83781d.c - Part of lm_sensors, Linux kernel modules for hardware4 * monitoring5 * Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,6 * Philip Edelbrock <phil@netroedge.com>,7 * and Mark Studebaker <mdsxyz123@yahoo.com>8 * Copyright (c) 2007 - 2008 Jean Delvare <jdelvare@suse.de>9 */10 11/*12 * Supports following chips:13 *14 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA15 * as99127f 7 3 0 3 0x31 0x12c3 yes no16 * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no17 * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes18 * w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes19 * w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no20 *21 */22 23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt24 25#include <linux/module.h>26#include <linux/init.h>27#include <linux/slab.h>28#include <linux/jiffies.h>29#include <linux/i2c.h>30#include <linux/hwmon.h>31#include <linux/hwmon-vid.h>32#include <linux/hwmon-sysfs.h>33#include <linux/sysfs.h>34#include <linux/err.h>35#include <linux/mutex.h>36 37#ifdef CONFIG_ISA38#include <linux/platform_device.h>39#include <linux/ioport.h>40#include <linux/io.h>41#endif42 43#include "lm75.h"44 45/* Addresses to scan */46static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,47 0x2e, 0x2f, I2C_CLIENT_END };48 49enum chips { w83781d, w83782d, w83783s, as99127f };50 51/* Insmod parameters */52static unsigned short force_subclients[4];53module_param_array(force_subclients, short, NULL, 0);54MODULE_PARM_DESC(force_subclients,55 "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");56 57static bool reset;58module_param(reset, bool, 0);59MODULE_PARM_DESC(reset, "Set to one to reset chip on load");60 61static bool init = 1;62module_param(init, bool, 0);63MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");64 65/* Constants specified below */66 67/* Length of ISA address segment */68#define W83781D_EXTENT 869 70/* Where are the ISA address/data registers relative to the base address */71#define W83781D_ADDR_REG_OFFSET 572#define W83781D_DATA_REG_OFFSET 673 74/* The device registers */75/* in nr from 0 to 8 */76#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \77 (0x554 + (((nr) - 7) * 2)))78#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \79 (0x555 + (((nr) - 7) * 2)))80#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \81 (0x550 + (nr) - 7))82 83/* fan nr from 0 to 2 */84#define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))85#define W83781D_REG_FAN(nr) (0x28 + (nr))86 87#define W83781D_REG_BANK 0x4E88#define W83781D_REG_TEMP2_CONFIG 0x15289#define W83781D_REG_TEMP3_CONFIG 0x25290/* temp nr from 1 to 3 */91#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \92 ((nr == 2) ? (0x0150) : \93 (0x27)))94#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \95 ((nr == 2) ? (0x153) : \96 (0x3A)))97#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \98 ((nr == 2) ? (0x155) : \99 (0x39)))100 101#define W83781D_REG_CONFIG 0x40102 103/* Interrupt status (W83781D, AS99127F) */104#define W83781D_REG_ALARM1 0x41105#define W83781D_REG_ALARM2 0x42106 107/* Real-time status (W83782D, W83783S) */108#define W83782D_REG_ALARM1 0x459109#define W83782D_REG_ALARM2 0x45A110#define W83782D_REG_ALARM3 0x45B111 112#define W83781D_REG_BEEP_CONFIG 0x4D113#define W83781D_REG_BEEP_INTS1 0x56114#define W83781D_REG_BEEP_INTS2 0x57115#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */116 117#define W83781D_REG_VID_FANDIV 0x47118 119#define W83781D_REG_CHIPID 0x49120#define W83781D_REG_WCHIPID 0x58121#define W83781D_REG_CHIPMAN 0x4F122#define W83781D_REG_PIN 0x4B123 124/* 782D/783S only */125#define W83781D_REG_VBAT 0x5D126 127/* PWM 782D (1-4) and 783S (1-2) only */128static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };129#define W83781D_REG_PWMCLK12 0x5C130#define W83781D_REG_PWMCLK34 0x45C131 132#define W83781D_REG_I2C_ADDR 0x48133#define W83781D_REG_I2C_SUBADDR 0x4A134 135/*136 * The following are undocumented in the data sheets however we137 * received the information in an email from Winbond tech support138 */139/* Sensor selection - not on 781d */140#define W83781D_REG_SCFG1 0x5D141static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };142 143#define W83781D_REG_SCFG2 0x59144static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };145 146#define W83781D_DEFAULT_BETA 3435147 148/* Conversions */149#define IN_TO_REG(val) clamp_val(((val) + 8) / 16, 0, 255)150#define IN_FROM_REG(val) ((val) * 16)151 152static inline u8153FAN_TO_REG(long rpm, int div)154{155 if (rpm == 0)156 return 255;157 rpm = clamp_val(rpm, 1, 1000000);158 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);159}160 161static inline long162FAN_FROM_REG(u8 val, int div)163{164 if (val == 0)165 return -1;166 if (val == 255)167 return 0;168 return 1350000 / (val * div);169}170 171#define TEMP_TO_REG(val) clamp_val((val) / 1000, -127, 128)172#define TEMP_FROM_REG(val) ((val) * 1000)173 174#define BEEP_MASK_FROM_REG(val, type) ((type) == as99127f ? \175 (~(val)) & 0x7fff : (val) & 0xff7fff)176#define BEEP_MASK_TO_REG(val, type) ((type) == as99127f ? \177 (~(val)) & 0x7fff : (val) & 0xff7fff)178 179#define DIV_FROM_REG(val) (1 << (val))180 181static inline u8182DIV_TO_REG(long val, enum chips type)183{184 int i;185 val = clamp_val(val, 1,186 ((type == w83781d || type == as99127f) ? 8 : 128)) >> 1;187 for (i = 0; i < 7; i++) {188 if (val == 0)189 break;190 val >>= 1;191 }192 return i;193}194 195struct w83781d_data {196 struct i2c_client *client;197 struct device *hwmon_dev;198 struct mutex lock;199 enum chips type;200 201 /* For ISA device only */202 const char *name;203 int isa_addr;204 205 struct mutex update_lock;206 bool valid; /* true if following fields are valid */207 unsigned long last_updated; /* In jiffies */208 209 struct i2c_client *lm75[2]; /* for secondary I2C addresses */210 /* array of 2 pointers to subclients */211 212 u8 in[9]; /* Register value - 8 & 9 for 782D only */213 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */214 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */215 u8 fan[3]; /* Register value */216 u8 fan_min[3]; /* Register value */217 s8 temp; /* Register value */218 s8 temp_max; /* Register value */219 s8 temp_max_hyst; /* Register value */220 u16 temp_add[2]; /* Register value */221 u16 temp_max_add[2]; /* Register value */222 u16 temp_max_hyst_add[2]; /* Register value */223 u8 fan_div[3]; /* Register encoding, shifted right */224 u8 vid; /* Register encoding, combined */225 u32 alarms; /* Register encoding, combined */226 u32 beep_mask; /* Register encoding, combined */227 u8 pwm[4]; /* Register value */228 u8 pwm2_enable; /* Boolean */229 u16 sens[3]; /*230 * 782D/783S only.231 * 1 = pentium diode; 2 = 3904 diode;232 * 4 = thermistor233 */234 u8 vrm;235};236 237static struct w83781d_data *w83781d_data_if_isa(void);238static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);239 240static int w83781d_read_value(struct w83781d_data *data, u16 reg);241static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);242static struct w83781d_data *w83781d_update_device(struct device *dev);243static void w83781d_init_device(struct device *dev);244 245/* following are the sysfs callback functions */246#define show_in_reg(reg) \247static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \248 char *buf) \249{ \250 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \251 struct w83781d_data *data = w83781d_update_device(dev); \252 return sprintf(buf, "%ld\n", \253 (long)IN_FROM_REG(data->reg[attr->index])); \254}255show_in_reg(in);256show_in_reg(in_min);257show_in_reg(in_max);258 259#define store_in_reg(REG, reg) \260static ssize_t store_in_##reg(struct device *dev, struct device_attribute \261 *da, const char *buf, size_t count) \262{ \263 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \264 struct w83781d_data *data = dev_get_drvdata(dev); \265 int nr = attr->index; \266 unsigned long val; \267 int err = kstrtoul(buf, 10, &val); \268 if (err) \269 return err; \270 mutex_lock(&data->update_lock); \271 data->in_##reg[nr] = IN_TO_REG(val); \272 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), \273 data->in_##reg[nr]); \274 \275 mutex_unlock(&data->update_lock); \276 return count; \277}278store_in_reg(MIN, min);279store_in_reg(MAX, max);280 281#define sysfs_in_offsets(offset) \282static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \283 show_in, NULL, offset); \284static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \285 show_in_min, store_in_min, offset); \286static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \287 show_in_max, store_in_max, offset)288 289sysfs_in_offsets(0);290sysfs_in_offsets(1);291sysfs_in_offsets(2);292sysfs_in_offsets(3);293sysfs_in_offsets(4);294sysfs_in_offsets(5);295sysfs_in_offsets(6);296sysfs_in_offsets(7);297sysfs_in_offsets(8);298 299#define show_fan_reg(reg) \300static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \301 char *buf) \302{ \303 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \304 struct w83781d_data *data = w83781d_update_device(dev); \305 return sprintf(buf, "%ld\n", \306 FAN_FROM_REG(data->reg[attr->index], \307 DIV_FROM_REG(data->fan_div[attr->index]))); \308}309show_fan_reg(fan);310show_fan_reg(fan_min);311 312static ssize_t313store_fan_min(struct device *dev, struct device_attribute *da,314 const char *buf, size_t count)315{316 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);317 struct w83781d_data *data = dev_get_drvdata(dev);318 int nr = attr->index;319 unsigned long val;320 int err;321 322 err = kstrtoul(buf, 10, &val);323 if (err)324 return err;325 326 mutex_lock(&data->update_lock);327 data->fan_min[nr] =328 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));329 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),330 data->fan_min[nr]);331 332 mutex_unlock(&data->update_lock);333 return count;334}335 336static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);337static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,338 show_fan_min, store_fan_min, 0);339static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);340static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,341 show_fan_min, store_fan_min, 1);342static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);343static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,344 show_fan_min, store_fan_min, 2);345 346#define show_temp_reg(reg) \347static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \348 char *buf) \349{ \350 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \351 struct w83781d_data *data = w83781d_update_device(dev); \352 int nr = attr->index; \353 if (nr >= 2) { /* TEMP2 and TEMP3 */ \354 return sprintf(buf, "%d\n", \355 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \356 } else { /* TEMP1 */ \357 return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->reg)); \358 } \359}360show_temp_reg(temp);361show_temp_reg(temp_max);362show_temp_reg(temp_max_hyst);363 364#define store_temp_reg(REG, reg) \365static ssize_t store_temp_##reg(struct device *dev, \366 struct device_attribute *da, const char *buf, size_t count) \367{ \368 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \369 struct w83781d_data *data = dev_get_drvdata(dev); \370 int nr = attr->index; \371 long val; \372 int err = kstrtol(buf, 10, &val); \373 if (err) \374 return err; \375 mutex_lock(&data->update_lock); \376 \377 if (nr >= 2) { /* TEMP2 and TEMP3 */ \378 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \379 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \380 data->temp_##reg##_add[nr-2]); \381 } else { /* TEMP1 */ \382 data->temp_##reg = TEMP_TO_REG(val); \383 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \384 data->temp_##reg); \385 } \386 \387 mutex_unlock(&data->update_lock); \388 return count; \389}390store_temp_reg(OVER, max);391store_temp_reg(HYST, max_hyst);392 393#define sysfs_temp_offsets(offset) \394static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \395 show_temp, NULL, offset); \396static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \397 show_temp_max, store_temp_max, offset); \398static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \399 show_temp_max_hyst, store_temp_max_hyst, offset);400 401sysfs_temp_offsets(1);402sysfs_temp_offsets(2);403sysfs_temp_offsets(3);404 405static ssize_t406cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)407{408 struct w83781d_data *data = w83781d_update_device(dev);409 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));410}411 412static DEVICE_ATTR_RO(cpu0_vid);413 414static ssize_t415vrm_show(struct device *dev, struct device_attribute *attr, char *buf)416{417 struct w83781d_data *data = dev_get_drvdata(dev);418 return sprintf(buf, "%ld\n", (long) data->vrm);419}420 421static ssize_t422vrm_store(struct device *dev, struct device_attribute *attr, const char *buf,423 size_t count)424{425 struct w83781d_data *data = dev_get_drvdata(dev);426 unsigned long val;427 int err;428 429 err = kstrtoul(buf, 10, &val);430 if (err)431 return err;432 data->vrm = clamp_val(val, 0, 255);433 434 return count;435}436 437static DEVICE_ATTR_RW(vrm);438 439static ssize_t440alarms_show(struct device *dev, struct device_attribute *attr, char *buf)441{442 struct w83781d_data *data = w83781d_update_device(dev);443 return sprintf(buf, "%u\n", data->alarms);444}445 446static DEVICE_ATTR_RO(alarms);447 448static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,449 char *buf)450{451 struct w83781d_data *data = w83781d_update_device(dev);452 int bitnr = to_sensor_dev_attr(attr)->index;453 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);454}455 456/* The W83781D has a single alarm bit for temp2 and temp3 */457static ssize_t show_temp3_alarm(struct device *dev,458 struct device_attribute *attr, char *buf)459{460 struct w83781d_data *data = w83781d_update_device(dev);461 int bitnr = (data->type == w83781d) ? 5 : 13;462 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);463}464 465static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);466static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);467static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);468static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);469static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);470static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);471static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);472static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);473static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);474static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);475static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);476static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);477static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);478static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);479static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);480 481static ssize_t beep_mask_show(struct device *dev,482 struct device_attribute *attr, char *buf)483{484 struct w83781d_data *data = w83781d_update_device(dev);485 return sprintf(buf, "%ld\n",486 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));487}488 489static ssize_t490beep_mask_store(struct device *dev, struct device_attribute *attr,491 const char *buf, size_t count)492{493 struct w83781d_data *data = dev_get_drvdata(dev);494 unsigned long val;495 int err;496 497 err = kstrtoul(buf, 10, &val);498 if (err)499 return err;500 501 mutex_lock(&data->update_lock);502 data->beep_mask &= 0x8000; /* preserve beep enable */503 data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);504 w83781d_write_value(data, W83781D_REG_BEEP_INTS1,505 data->beep_mask & 0xff);506 w83781d_write_value(data, W83781D_REG_BEEP_INTS2,507 (data->beep_mask >> 8) & 0xff);508 if (data->type != w83781d && data->type != as99127f) {509 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,510 ((data->beep_mask) >> 16) & 0xff);511 }512 mutex_unlock(&data->update_lock);513 514 return count;515}516 517static DEVICE_ATTR_RW(beep_mask);518 519static ssize_t show_beep(struct device *dev, struct device_attribute *attr,520 char *buf)521{522 struct w83781d_data *data = w83781d_update_device(dev);523 int bitnr = to_sensor_dev_attr(attr)->index;524 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);525}526 527static ssize_t528store_beep(struct device *dev, struct device_attribute *attr,529 const char *buf, size_t count)530{531 struct w83781d_data *data = dev_get_drvdata(dev);532 int bitnr = to_sensor_dev_attr(attr)->index;533 u8 reg;534 unsigned long bit;535 int err;536 537 err = kstrtoul(buf, 10, &bit);538 if (err)539 return err;540 541 if (bit & ~1)542 return -EINVAL;543 544 mutex_lock(&data->update_lock);545 if (bit)546 data->beep_mask |= (1 << bitnr);547 else548 data->beep_mask &= ~(1 << bitnr);549 550 if (bitnr < 8) {551 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);552 if (bit)553 reg |= (1 << bitnr);554 else555 reg &= ~(1 << bitnr);556 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);557 } else if (bitnr < 16) {558 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);559 if (bit)560 reg |= (1 << (bitnr - 8));561 else562 reg &= ~(1 << (bitnr - 8));563 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);564 } else {565 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);566 if (bit)567 reg |= (1 << (bitnr - 16));568 else569 reg &= ~(1 << (bitnr - 16));570 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);571 }572 mutex_unlock(&data->update_lock);573 574 return count;575}576 577/* The W83781D has a single beep bit for temp2 and temp3 */578static ssize_t show_temp3_beep(struct device *dev,579 struct device_attribute *attr, char *buf)580{581 struct w83781d_data *data = w83781d_update_device(dev);582 int bitnr = (data->type == w83781d) ? 5 : 13;583 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);584}585 586static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,587 show_beep, store_beep, 0);588static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,589 show_beep, store_beep, 1);590static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,591 show_beep, store_beep, 2);592static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,593 show_beep, store_beep, 3);594static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,595 show_beep, store_beep, 8);596static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,597 show_beep, store_beep, 9);598static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,599 show_beep, store_beep, 10);600static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,601 show_beep, store_beep, 16);602static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,603 show_beep, store_beep, 17);604static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,605 show_beep, store_beep, 6);606static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,607 show_beep, store_beep, 7);608static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,609 show_beep, store_beep, 11);610static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,611 show_beep, store_beep, 4);612static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,613 show_beep, store_beep, 5);614static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,615 show_temp3_beep, store_beep, 13);616static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,617 show_beep, store_beep, 15);618 619static ssize_t620show_fan_div(struct device *dev, struct device_attribute *da, char *buf)621{622 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);623 struct w83781d_data *data = w83781d_update_device(dev);624 return sprintf(buf, "%ld\n",625 (long) DIV_FROM_REG(data->fan_div[attr->index]));626}627 628/*629 * Note: we save and restore the fan minimum here, because its value is630 * determined in part by the fan divisor. This follows the principle of631 * least surprise; the user doesn't expect the fan minimum to change just632 * because the divisor changed.633 */634static ssize_t635store_fan_div(struct device *dev, struct device_attribute *da,636 const char *buf, size_t count)637{638 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);639 struct w83781d_data *data = dev_get_drvdata(dev);640 unsigned long min;641 int nr = attr->index;642 u8 reg;643 unsigned long val;644 int err;645 646 err = kstrtoul(buf, 10, &val);647 if (err)648 return err;649 650 mutex_lock(&data->update_lock);651 652 /* Save fan_min */653 min = FAN_FROM_REG(data->fan_min[nr],654 DIV_FROM_REG(data->fan_div[nr]));655 656 data->fan_div[nr] = DIV_TO_REG(val, data->type);657 658 reg = (w83781d_read_value(data, nr == 2 ?659 W83781D_REG_PIN : W83781D_REG_VID_FANDIV)660 & (nr == 0 ? 0xcf : 0x3f))661 | ((data->fan_div[nr] & 0x03) << (nr == 0 ? 4 : 6));662 w83781d_write_value(data, nr == 2 ?663 W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);664 665 /* w83781d and as99127f don't have extended divisor bits */666 if (data->type != w83781d && data->type != as99127f) {667 reg = (w83781d_read_value(data, W83781D_REG_VBAT)668 & ~(1 << (5 + nr)))669 | ((data->fan_div[nr] & 0x04) << (3 + nr));670 w83781d_write_value(data, W83781D_REG_VBAT, reg);671 }672 673 /* Restore fan_min */674 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));675 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);676 677 mutex_unlock(&data->update_lock);678 return count;679}680 681static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,682 show_fan_div, store_fan_div, 0);683static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,684 show_fan_div, store_fan_div, 1);685static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,686 show_fan_div, store_fan_div, 2);687 688static ssize_t689show_pwm(struct device *dev, struct device_attribute *da, char *buf)690{691 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);692 struct w83781d_data *data = w83781d_update_device(dev);693 return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);694}695 696static ssize_t697pwm2_enable_show(struct device *dev, struct device_attribute *da, char *buf)698{699 struct w83781d_data *data = w83781d_update_device(dev);700 return sprintf(buf, "%d\n", (int)data->pwm2_enable);701}702 703static ssize_t704store_pwm(struct device *dev, struct device_attribute *da, const char *buf,705 size_t count)706{707 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);708 struct w83781d_data *data = dev_get_drvdata(dev);709 int nr = attr->index;710 unsigned long val;711 int err;712 713 err = kstrtoul(buf, 10, &val);714 if (err)715 return err;716 717 mutex_lock(&data->update_lock);718 data->pwm[nr] = clamp_val(val, 0, 255);719 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);720 mutex_unlock(&data->update_lock);721 return count;722}723 724static ssize_t725pwm2_enable_store(struct device *dev, struct device_attribute *da,726 const char *buf, size_t count)727{728 struct w83781d_data *data = dev_get_drvdata(dev);729 unsigned long val;730 u32 reg;731 int err;732 733 err = kstrtoul(buf, 10, &val);734 if (err)735 return err;736 737 mutex_lock(&data->update_lock);738 739 switch (val) {740 case 0:741 case 1:742 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);743 w83781d_write_value(data, W83781D_REG_PWMCLK12,744 (reg & 0xf7) | (val << 3));745 746 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);747 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,748 (reg & 0xef) | (!val << 4));749 750 data->pwm2_enable = val;751 break;752 753 default:754 mutex_unlock(&data->update_lock);755 return -EINVAL;756 }757 758 mutex_unlock(&data->update_lock);759 return count;760}761 762static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);763static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);764static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);765static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);766/* only PWM2 can be enabled/disabled */767static DEVICE_ATTR_RW(pwm2_enable);768 769static ssize_t770show_sensor(struct device *dev, struct device_attribute *da, char *buf)771{772 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);773 struct w83781d_data *data = w83781d_update_device(dev);774 return sprintf(buf, "%d\n", (int)data->sens[attr->index]);775}776 777static ssize_t778store_sensor(struct device *dev, struct device_attribute *da,779 const char *buf, size_t count)780{781 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);782 struct w83781d_data *data = dev_get_drvdata(dev);783 int nr = attr->index;784 unsigned long val;785 u32 tmp;786 int err;787 788 err = kstrtoul(buf, 10, &val);789 if (err)790 return err;791 792 mutex_lock(&data->update_lock);793 794 switch (val) {795 case 1: /* PII/Celeron diode */796 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);797 w83781d_write_value(data, W83781D_REG_SCFG1,798 tmp | BIT_SCFG1[nr]);799 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);800 w83781d_write_value(data, W83781D_REG_SCFG2,801 tmp | BIT_SCFG2[nr]);802 data->sens[nr] = val;803 break;804 case 2: /* 3904 */805 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);806 w83781d_write_value(data, W83781D_REG_SCFG1,807 tmp | BIT_SCFG1[nr]);808 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);809 w83781d_write_value(data, W83781D_REG_SCFG2,810 tmp & ~BIT_SCFG2[nr]);811 data->sens[nr] = val;812 break;813 case W83781D_DEFAULT_BETA:814 dev_warn(dev,815 "Sensor type %d is deprecated, please use 4 instead\n",816 W83781D_DEFAULT_BETA);817 fallthrough;818 case 4: /* thermistor */819 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);820 w83781d_write_value(data, W83781D_REG_SCFG1,821 tmp & ~BIT_SCFG1[nr]);822 data->sens[nr] = val;823 break;824 default:825 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",826 (long) val);827 break;828 }829 830 mutex_unlock(&data->update_lock);831 return count;832}833 834static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,835 show_sensor, store_sensor, 0);836static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,837 show_sensor, store_sensor, 1);838static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,839 show_sensor, store_sensor, 2);840 841/*842 * Assumes that adapter is of I2C, not ISA variety.843 * OTHERWISE DON'T CALL THIS844 */845static int846w83781d_detect_subclients(struct i2c_client *new_client)847{848 int i, val1 = 0, id;849 int err;850 int address = new_client->addr;851 unsigned short sc_addr[2];852 struct i2c_adapter *adapter = new_client->adapter;853 struct w83781d_data *data = i2c_get_clientdata(new_client);854 enum chips kind = data->type;855 int num_sc = 1;856 857 id = i2c_adapter_id(adapter);858 859 if (force_subclients[0] == id && force_subclients[1] == address) {860 for (i = 2; i <= 3; i++) {861 if (force_subclients[i] < 0x48 ||862 force_subclients[i] > 0x4f) {863 dev_err(&new_client->dev,864 "Invalid subclient address %d; must be 0x48-0x4f\n",865 force_subclients[i]);866 err = -EINVAL;867 goto ERROR_SC_1;868 }869 }870 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,871 (force_subclients[2] & 0x07) |872 ((force_subclients[3] & 0x07) << 4));873 sc_addr[0] = force_subclients[2];874 } else {875 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);876 sc_addr[0] = 0x48 + (val1 & 0x07);877 }878 879 if (kind != w83783s) {880 num_sc = 2;881 if (force_subclients[0] == id &&882 force_subclients[1] == address) {883 sc_addr[1] = force_subclients[3];884 } else {885 sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);886 }887 if (sc_addr[0] == sc_addr[1]) {888 dev_err(&new_client->dev,889 "Duplicate addresses 0x%x for subclients.\n",890 sc_addr[0]);891 err = -EBUSY;892 goto ERROR_SC_2;893 }894 }895 896 for (i = 0; i < num_sc; i++) {897 data->lm75[i] = i2c_new_dummy_device(adapter, sc_addr[i]);898 if (IS_ERR(data->lm75[i])) {899 dev_err(&new_client->dev,900 "Subclient %d registration at address 0x%x failed.\n",901 i, sc_addr[i]);902 err = PTR_ERR(data->lm75[i]);903 if (i == 1)904 goto ERROR_SC_3;905 goto ERROR_SC_2;906 }907 }908 909 return 0;910 911/* Undo inits in case of errors */912ERROR_SC_3:913 i2c_unregister_device(data->lm75[0]);914ERROR_SC_2:915ERROR_SC_1:916 return err;917}918 919#define IN_UNIT_ATTRS(X) \920 &sensor_dev_attr_in##X##_input.dev_attr.attr, \921 &sensor_dev_attr_in##X##_min.dev_attr.attr, \922 &sensor_dev_attr_in##X##_max.dev_attr.attr, \923 &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \924 &sensor_dev_attr_in##X##_beep.dev_attr.attr925 926#define FAN_UNIT_ATTRS(X) \927 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \928 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \929 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \930 &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \931 &sensor_dev_attr_fan##X##_beep.dev_attr.attr932 933#define TEMP_UNIT_ATTRS(X) \934 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \935 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \936 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \937 &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \938 &sensor_dev_attr_temp##X##_beep.dev_attr.attr939 940static struct attribute *w83781d_attributes[] = {941 IN_UNIT_ATTRS(0),942 IN_UNIT_ATTRS(2),943 IN_UNIT_ATTRS(3),944 IN_UNIT_ATTRS(4),945 IN_UNIT_ATTRS(5),946 IN_UNIT_ATTRS(6),947 FAN_UNIT_ATTRS(1),948 FAN_UNIT_ATTRS(2),949 FAN_UNIT_ATTRS(3),950 TEMP_UNIT_ATTRS(1),951 TEMP_UNIT_ATTRS(2),952 &dev_attr_cpu0_vid.attr,953 &dev_attr_vrm.attr,954 &dev_attr_alarms.attr,955 &dev_attr_beep_mask.attr,956 &sensor_dev_attr_beep_enable.dev_attr.attr,957 NULL958};959static const struct attribute_group w83781d_group = {960 .attrs = w83781d_attributes,961};962 963static struct attribute *w83781d_attributes_in1[] = {964 IN_UNIT_ATTRS(1),965 NULL966};967static const struct attribute_group w83781d_group_in1 = {968 .attrs = w83781d_attributes_in1,969};970 971static struct attribute *w83781d_attributes_in78[] = {972 IN_UNIT_ATTRS(7),973 IN_UNIT_ATTRS(8),974 NULL975};976static const struct attribute_group w83781d_group_in78 = {977 .attrs = w83781d_attributes_in78,978};979 980static struct attribute *w83781d_attributes_temp3[] = {981 TEMP_UNIT_ATTRS(3),982 NULL983};984static const struct attribute_group w83781d_group_temp3 = {985 .attrs = w83781d_attributes_temp3,986};987 988static struct attribute *w83781d_attributes_pwm12[] = {989 &sensor_dev_attr_pwm1.dev_attr.attr,990 &sensor_dev_attr_pwm2.dev_attr.attr,991 &dev_attr_pwm2_enable.attr,992 NULL993};994static const struct attribute_group w83781d_group_pwm12 = {995 .attrs = w83781d_attributes_pwm12,996};997 998static struct attribute *w83781d_attributes_pwm34[] = {999 &sensor_dev_attr_pwm3.dev_attr.attr,1000 &sensor_dev_attr_pwm4.dev_attr.attr,1001 NULL1002};1003static const struct attribute_group w83781d_group_pwm34 = {1004 .attrs = w83781d_attributes_pwm34,1005};1006 1007static struct attribute *w83781d_attributes_other[] = {1008 &sensor_dev_attr_temp1_type.dev_attr.attr,1009 &sensor_dev_attr_temp2_type.dev_attr.attr,1010 &sensor_dev_attr_temp3_type.dev_attr.attr,1011 NULL1012};1013static const struct attribute_group w83781d_group_other = {1014 .attrs = w83781d_attributes_other,1015};1016 1017/* No clean up is done on error, it's up to the caller */1018static int1019w83781d_create_files(struct device *dev, int kind, int is_isa)1020{1021 int err;1022 1023 err = sysfs_create_group(&dev->kobj, &w83781d_group);1024 if (err)1025 return err;1026 1027 if (kind != w83783s) {1028 err = sysfs_create_group(&dev->kobj, &w83781d_group_in1);1029 if (err)1030 return err;1031 }1032 if (kind != as99127f && kind != w83781d && kind != w83783s) {1033 err = sysfs_create_group(&dev->kobj, &w83781d_group_in78);1034 if (err)1035 return err;1036 }1037 if (kind != w83783s) {1038 err = sysfs_create_group(&dev->kobj, &w83781d_group_temp3);1039 if (err)1040 return err;1041 1042 if (kind != w83781d) {1043 err = sysfs_chmod_file(&dev->kobj,1044 &sensor_dev_attr_temp3_alarm.dev_attr.attr,1045 S_IRUGO | S_IWUSR);1046 if (err)1047 return err;1048 }1049 }1050 1051 if (kind != w83781d && kind != as99127f) {1052 err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm12);1053 if (err)1054 return err;1055 }1056 if (kind == w83782d && !is_isa) {1057 err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm34);1058 if (err)1059 return err;1060 }1061 1062 if (kind != as99127f && kind != w83781d) {1063 err = device_create_file(dev,1064 &sensor_dev_attr_temp1_type.dev_attr);1065 if (err)1066 return err;1067 err = device_create_file(dev,1068 &sensor_dev_attr_temp2_type.dev_attr);1069 if (err)1070 return err;1071 if (kind != w83783s) {1072 err = device_create_file(dev,1073 &sensor_dev_attr_temp3_type.dev_attr);1074 if (err)1075 return err;1076 }1077 }1078 1079 return 0;1080}1081 1082/* Return 0 if detection is successful, -ENODEV otherwise */1083static int1084w83781d_detect(struct i2c_client *client, struct i2c_board_info *info)1085{1086 int val1, val2;1087 struct w83781d_data *isa = w83781d_data_if_isa();1088 struct i2c_adapter *adapter = client->adapter;1089 int address = client->addr;1090 const char *client_name;1091 enum vendor { winbond, asus } vendid;1092 1093 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))1094 return -ENODEV;1095 1096 /*1097 * We block updates of the ISA device to minimize the risk of1098 * concurrent access to the same W83781D chip through different1099 * interfaces.1100 */1101 if (isa)1102 mutex_lock(&isa->update_lock);1103 1104 if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {1105 dev_dbg(&adapter->dev,1106 "Detection of w83781d chip failed at step 3\n");1107 goto err_nodev;1108 }1109 1110 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);1111 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);1112 /* Check for Winbond or Asus ID if in bank 0 */1113 if (!(val1 & 0x07) &&1114 ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||1115 ((val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {1116 dev_dbg(&adapter->dev,1117 "Detection of w83781d chip failed at step 4\n");1118 goto err_nodev;1119 }1120 /*1121 * If Winbond SMBus, check address at 0x48.1122 * Asus doesn't support, except for as99127f rev.21123 */1124 if ((!(val1 & 0x80) && val2 == 0xa3) ||1125 ((val1 & 0x80) && val2 == 0x5c)) {1126 if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)1127 != address) {1128 dev_dbg(&adapter->dev,1129 "Detection of w83781d chip failed at step 5\n");1130 goto err_nodev;1131 }1132 }1133 1134 /* Put it now into bank 0 and Vendor ID High Byte */1135 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,1136 (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)1137 & 0x78) | 0x80);1138 1139 /* Get the vendor ID */1140 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);1141 if (val2 == 0x5c)1142 vendid = winbond;1143 else if (val2 == 0x12)1144 vendid = asus;1145 else {1146 dev_dbg(&adapter->dev,1147 "w83781d chip vendor is neither Winbond nor Asus\n");1148 goto err_nodev;1149 }1150 1151 /* Determine the chip type. */1152 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);1153 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)1154 client_name = "w83781d";1155 else if (val1 == 0x30 && vendid == winbond)1156 client_name = "w83782d";1157 else if (val1 == 0x40 && vendid == winbond && address == 0x2d)1158 client_name = "w83783s";1159 else if (val1 == 0x31)1160 client_name = "as99127f";1161 else1162 goto err_nodev;1163 1164 if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) {1165 dev_dbg(&adapter->dev,1166 "Device at 0x%02x appears to be the same as ISA device\n",1167 address);1168 goto err_nodev;1169 }1170 1171 if (isa)1172 mutex_unlock(&isa->update_lock);1173 1174 strscpy(info->type, client_name, I2C_NAME_SIZE);1175 1176 return 0;1177 1178 err_nodev:1179 if (isa)1180 mutex_unlock(&isa->update_lock);1181 return -ENODEV;1182}1183 1184static void w83781d_remove_files(struct device *dev)1185{1186 sysfs_remove_group(&dev->kobj, &w83781d_group);1187 sysfs_remove_group(&dev->kobj, &w83781d_group_in1);1188 sysfs_remove_group(&dev->kobj, &w83781d_group_in78);1189 sysfs_remove_group(&dev->kobj, &w83781d_group_temp3);1190 sysfs_remove_group(&dev->kobj, &w83781d_group_pwm12);1191 sysfs_remove_group(&dev->kobj, &w83781d_group_pwm34);1192 sysfs_remove_group(&dev->kobj, &w83781d_group_other);1193}1194 1195static int w83781d_probe(struct i2c_client *client)1196{1197 struct device *dev = &client->dev;1198 struct w83781d_data *data;1199 int err;1200 1201 data = devm_kzalloc(dev, sizeof(struct w83781d_data), GFP_KERNEL);1202 if (!data)1203 return -ENOMEM;1204 1205 i2c_set_clientdata(client, data);1206 mutex_init(&data->lock);1207 mutex_init(&data->update_lock);1208 1209 data->type = (uintptr_t)i2c_get_match_data(client);1210 data->client = client;1211 1212 /* attach secondary i2c lm75-like clients */1213 err = w83781d_detect_subclients(client);1214 if (err)1215 return err;1216 1217 /* Initialize the chip */1218 w83781d_init_device(dev);1219 1220 /* Register sysfs hooks */1221 err = w83781d_create_files(dev, data->type, 0);1222 if (err)1223 goto exit_remove_files;1224 1225 data->hwmon_dev = hwmon_device_register(dev);1226 if (IS_ERR(data->hwmon_dev)) {1227 err = PTR_ERR(data->hwmon_dev);1228 goto exit_remove_files;1229 }1230 1231 return 0;1232 1233 exit_remove_files:1234 w83781d_remove_files(dev);1235 i2c_unregister_device(data->lm75[0]);1236 i2c_unregister_device(data->lm75[1]);1237 return err;1238}1239 1240static void1241w83781d_remove(struct i2c_client *client)1242{1243 struct w83781d_data *data = i2c_get_clientdata(client);1244 struct device *dev = &client->dev;1245 1246 hwmon_device_unregister(data->hwmon_dev);1247 w83781d_remove_files(dev);1248 1249 i2c_unregister_device(data->lm75[0]);1250 i2c_unregister_device(data->lm75[1]);1251}1252 1253static int1254w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)1255{1256 struct i2c_client *client = data->client;1257 int res, bank;1258 struct i2c_client *cl;1259 1260 bank = (reg >> 8) & 0x0f;1261 if (bank > 2)1262 /* switch banks */1263 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,1264 bank);1265 if (bank == 0 || bank > 2) {1266 res = i2c_smbus_read_byte_data(client, reg & 0xff);1267 } else {1268 /* switch to subclient */1269 cl = data->lm75[bank - 1];1270 /* convert from ISA to LM75 I2C addresses */1271 switch (reg & 0xff) {1272 case 0x50: /* TEMP */1273 res = i2c_smbus_read_word_swapped(cl, 0);1274 break;1275 case 0x52: /* CONFIG */1276 res = i2c_smbus_read_byte_data(cl, 1);1277 break;1278 case 0x53: /* HYST */1279 res = i2c_smbus_read_word_swapped(cl, 2);1280 break;1281 case 0x55: /* OVER */1282 default:1283 res = i2c_smbus_read_word_swapped(cl, 3);1284 break;1285 }1286 }1287 if (bank > 2)1288 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);1289 1290 return res;1291}1292 1293static int1294w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)1295{1296 struct i2c_client *client = data->client;1297 int bank;1298 struct i2c_client *cl;1299 1300 bank = (reg >> 8) & 0x0f;1301 if (bank > 2)1302 /* switch banks */1303 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,1304 bank);1305 if (bank == 0 || bank > 2) {1306 i2c_smbus_write_byte_data(client, reg & 0xff,1307 value & 0xff);1308 } else {1309 /* switch to subclient */1310 cl = data->lm75[bank - 1];1311 /* convert from ISA to LM75 I2C addresses */1312 switch (reg & 0xff) {1313 case 0x52: /* CONFIG */1314 i2c_smbus_write_byte_data(cl, 1, value & 0xff);1315 break;1316 case 0x53: /* HYST */1317 i2c_smbus_write_word_swapped(cl, 2, value);1318 break;1319 case 0x55: /* OVER */1320 i2c_smbus_write_word_swapped(cl, 3, value);1321 break;1322 }1323 }1324 if (bank > 2)1325 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);1326 1327 return 0;1328}1329 1330static void1331w83781d_init_device(struct device *dev)1332{1333 struct w83781d_data *data = dev_get_drvdata(dev);1334 int i, p;1335 int type = data->type;1336 u8 tmp;1337 1338 if (reset && type != as99127f) { /*1339 * this resets registers we don't have1340 * documentation for on the as99127f1341 */1342 /*1343 * Resetting the chip has been the default for a long time,1344 * but it causes the BIOS initializations (fan clock dividers,1345 * thermal sensor types...) to be lost, so it is now optional.1346 * It might even go away if nobody reports it as being useful,1347 * as I see very little reason why this would be needed at1348 * all.1349 */1350 dev_info(dev,1351 "If reset=1 solved a problem you were having, please report!\n");1352 1353 /* save these registers */1354 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);1355 p = w83781d_read_value(data, W83781D_REG_PWMCLK12);1356 /*1357 * Reset all except Watchdog values and last conversion values1358 * This sets fan-divs to 2, among others1359 */1360 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);1361 /*1362 * Restore the registers and disable power-on abnormal beep.1363 * This saves FAN 1/2/3 input/output values set by BIOS.1364 */1365 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);1366 w83781d_write_value(data, W83781D_REG_PWMCLK12, p);1367 /*1368 * Disable master beep-enable (reset turns it on).1369 * Individual beep_mask should be reset to off but for some1370 * reason disabling this bit helps some people not get beeped1371 */1372 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);1373 }1374 1375 /*1376 * Disable power-on abnormal beep, as advised by the datasheet.1377 * Already done if reset=1.1378 */1379 if (init && !reset && type != as99127f) {1380 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);1381 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);1382 }1383 1384 data->vrm = vid_which_vrm();1385 1386 if ((type != w83781d) && (type != as99127f)) {1387 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);1388 for (i = 1; i <= 3; i++) {1389 if (!(tmp & BIT_SCFG1[i - 1])) {1390 data->sens[i - 1] = 4;1391 } else {1392 if (w83781d_read_value1393 (data,1394 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])1395 data->sens[i - 1] = 1;1396 else1397 data->sens[i - 1] = 2;1398 }1399 if (type == w83783s && i == 2)1400 break;1401 }1402 }1403 1404 if (init && type != as99127f) {1405 /* Enable temp2 */1406 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);1407 if (tmp & 0x01) {1408 dev_warn(dev,1409 "Enabling temp2, readings might not make sense\n");1410 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,1411 tmp & 0xfe);1412 }1413 1414 /* Enable temp3 */1415 if (type != w83783s) {1416 tmp = w83781d_read_value(data,1417 W83781D_REG_TEMP3_CONFIG);1418 if (tmp & 0x01) {1419 dev_warn(dev,1420 "Enabling temp3, readings might not make sense\n");1421 w83781d_write_value(data,1422 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);1423 }1424 }1425 }1426 1427 /* Start monitoring */1428 w83781d_write_value(data, W83781D_REG_CONFIG,1429 (w83781d_read_value(data,1430 W83781D_REG_CONFIG) & 0xf7)1431 | 0x01);1432 1433 /* A few vars need to be filled upon startup */1434 for (i = 0; i < 3; i++) {1435 data->fan_min[i] = w83781d_read_value(data,1436 W83781D_REG_FAN_MIN(i));1437 }1438 1439 mutex_init(&data->update_lock);1440}1441 1442static struct w83781d_data *w83781d_update_device(struct device *dev)1443{1444 struct w83781d_data *data = dev_get_drvdata(dev);1445 struct i2c_client *client = data->client;1446 int i;1447 1448 mutex_lock(&data->update_lock);1449 1450 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)1451 || !data->valid) {1452 dev_dbg(dev, "Starting device update\n");1453 1454 for (i = 0; i <= 8; i++) {1455 if (data->type == w83783s && i == 1)1456 continue; /* 783S has no in1 */1457 data->in[i] =1458 w83781d_read_value(data, W83781D_REG_IN(i));1459 data->in_min[i] =1460 w83781d_read_value(data, W83781D_REG_IN_MIN(i));1461 data->in_max[i] =1462 w83781d_read_value(data, W83781D_REG_IN_MAX(i));1463 if ((data->type != w83782d) && (i == 6))1464 break;1465 }1466 for (i = 0; i < 3; i++) {1467 data->fan[i] =1468 w83781d_read_value(data, W83781D_REG_FAN(i));1469 data->fan_min[i] =1470 w83781d_read_value(data, W83781D_REG_FAN_MIN(i));1471 }1472 if (data->type != w83781d && data->type != as99127f) {1473 for (i = 0; i < 4; i++) {1474 data->pwm[i] =1475 w83781d_read_value(data,1476 W83781D_REG_PWM[i]);1477 /* Only W83782D on SMBus has PWM3 and PWM4 */1478 if ((data->type != w83782d || !client)1479 && i == 1)1480 break;1481 }1482 /* Only PWM2 can be disabled */1483 data->pwm2_enable = (w83781d_read_value(data,1484 W83781D_REG_PWMCLK12) & 0x08) >> 3;1485 }1486 1487 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));1488 data->temp_max =1489 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));1490 data->temp_max_hyst =1491 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));1492 data->temp_add[0] =1493 w83781d_read_value(data, W83781D_REG_TEMP(2));1494 data->temp_max_add[0] =1495 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));1496 data->temp_max_hyst_add[0] =1497 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));1498 if (data->type != w83783s) {1499 data->temp_add[1] =1500 w83781d_read_value(data, W83781D_REG_TEMP(3));1501 data->temp_max_add[1] =1502 w83781d_read_value(data,1503 W83781D_REG_TEMP_OVER(3));1504 data->temp_max_hyst_add[1] =1505 w83781d_read_value(data,1506 W83781D_REG_TEMP_HYST(3));1507 }1508 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);1509 data->vid = i & 0x0f;1510 data->vid |= (w83781d_read_value(data,1511 W83781D_REG_CHIPID) & 0x01) << 4;1512 data->fan_div[0] = (i >> 4) & 0x03;1513 data->fan_div[1] = (i >> 6) & 0x03;1514 data->fan_div[2] = (w83781d_read_value(data,1515 W83781D_REG_PIN) >> 6) & 0x03;1516 if ((data->type != w83781d) && (data->type != as99127f)) {1517 i = w83781d_read_value(data, W83781D_REG_VBAT);1518 data->fan_div[0] |= (i >> 3) & 0x04;1519 data->fan_div[1] |= (i >> 4) & 0x04;1520 data->fan_div[2] |= (i >> 5) & 0x04;1521 }1522 if (data->type == w83782d) {1523 data->alarms = w83781d_read_value(data,1524 W83782D_REG_ALARM1)1525 | (w83781d_read_value(data,1526 W83782D_REG_ALARM2) << 8)1527 | (w83781d_read_value(data,1528 W83782D_REG_ALARM3) << 16);1529 } else if (data->type == w83783s) {1530 data->alarms = w83781d_read_value(data,1531 W83782D_REG_ALARM1)1532 | (w83781d_read_value(data,1533 W83782D_REG_ALARM2) << 8);1534 } else {1535 /*1536 * No real-time status registers, fall back to1537 * interrupt status registers1538 */1539 data->alarms = w83781d_read_value(data,1540 W83781D_REG_ALARM1)1541 | (w83781d_read_value(data,1542 W83781D_REG_ALARM2) << 8);1543 }1544 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);1545 data->beep_mask = (i << 8) +1546 w83781d_read_value(data, W83781D_REG_BEEP_INTS1);1547 if ((data->type != w83781d) && (data->type != as99127f)) {1548 data->beep_mask |=1549 w83781d_read_value(data,1550 W83781D_REG_BEEP_INTS3) << 16;1551 }1552 data->last_updated = jiffies;1553 data->valid = true;1554 }1555 1556 mutex_unlock(&data->update_lock);1557 1558 return data;1559}1560 1561static const struct i2c_device_id w83781d_ids[] = {1562 { "w83781d", w83781d, },1563 { "w83782d", w83782d, },1564 { "w83783s", w83783s, },1565 { "as99127f", as99127f },1566 { /* LIST END */ }1567};1568MODULE_DEVICE_TABLE(i2c, w83781d_ids);1569 1570static const struct of_device_id w83781d_of_match[] = {1571 { .compatible = "winbond,w83781d" },1572 { .compatible = "winbond,w83781g" },1573 { .compatible = "winbond,w83782d" },1574 { .compatible = "winbond,w83783s" },1575 { .compatible = "asus,as99127f" },1576 { },1577};1578MODULE_DEVICE_TABLE(of, w83781d_of_match);1579 1580static struct i2c_driver w83781d_driver = {1581 .class = I2C_CLASS_HWMON,1582 .driver = {1583 .name = "w83781d",1584 .of_match_table = w83781d_of_match,1585 },1586 .probe = w83781d_probe,1587 .remove = w83781d_remove,1588 .id_table = w83781d_ids,1589 .detect = w83781d_detect,1590 .address_list = normal_i2c,1591};1592 1593/*1594 * ISA related code1595 */1596#ifdef CONFIG_ISA1597 1598/* ISA device, if found */1599static struct platform_device *pdev;1600 1601static unsigned short isa_address = 0x290;1602 1603/*1604 * I2C devices get this name attribute automatically, but for ISA devices1605 * we must create it by ourselves.1606 */1607static ssize_t1608name_show(struct device *dev, struct device_attribute *devattr, char *buf)1609{1610 struct w83781d_data *data = dev_get_drvdata(dev);1611 return sprintf(buf, "%s\n", data->name);1612}1613static DEVICE_ATTR_RO(name);1614 1615static struct w83781d_data *w83781d_data_if_isa(void)1616{1617 return pdev ? platform_get_drvdata(pdev) : NULL;1618}1619 1620/* Returns 1 if the I2C chip appears to be an alias of the ISA chip */1621static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)1622{1623 struct w83781d_data *isa;1624 int i;1625 1626 if (!pdev) /* No ISA chip */1627 return 0;1628 1629 isa = platform_get_drvdata(pdev);1630 1631 if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)1632 return 0; /* Address doesn't match */1633 if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)1634 return 0; /* Chip type doesn't match */1635 1636 /*1637 * We compare all the limit registers, the config register and the1638 * interrupt mask registers1639 */1640 for (i = 0x2b; i <= 0x3d; i++) {1641 if (w83781d_read_value(isa, i) !=1642 i2c_smbus_read_byte_data(client, i))1643 return 0;1644 }1645 if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=1646 i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))1647 return 0;1648 for (i = 0x43; i <= 0x46; i++) {1649 if (w83781d_read_value(isa, i) !=1650 i2c_smbus_read_byte_data(client, i))1651 return 0;1652 }1653 1654 return 1;1655}1656 1657static int1658w83781d_read_value_isa(struct w83781d_data *data, u16 reg)1659{1660 int word_sized, res;1661 1662 word_sized = (((reg & 0xff00) == 0x100)1663 || ((reg & 0xff00) == 0x200))1664 && (((reg & 0x00ff) == 0x50)1665 || ((reg & 0x00ff) == 0x53)1666 || ((reg & 0x00ff) == 0x55));1667 if (reg & 0xff00) {1668 outb_p(W83781D_REG_BANK,1669 data->isa_addr + W83781D_ADDR_REG_OFFSET);1670 outb_p(reg >> 8,1671 data->isa_addr + W83781D_DATA_REG_OFFSET);1672 }1673 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);1674 res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);1675 if (word_sized) {1676 outb_p((reg & 0xff) + 1,1677 data->isa_addr + W83781D_ADDR_REG_OFFSET);1678 res =1679 (res << 8) + inb_p(data->isa_addr +1680 W83781D_DATA_REG_OFFSET);1681 }1682 if (reg & 0xff00) {1683 outb_p(W83781D_REG_BANK,1684 data->isa_addr + W83781D_ADDR_REG_OFFSET);1685 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);1686 }1687 return res;1688}1689 1690static void1691w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)1692{1693 int word_sized;1694 1695 word_sized = (((reg & 0xff00) == 0x100)1696 || ((reg & 0xff00) == 0x200))1697 && (((reg & 0x00ff) == 0x53)1698 || ((reg & 0x00ff) == 0x55));1699 if (reg & 0xff00) {1700 outb_p(W83781D_REG_BANK,1701 data->isa_addr + W83781D_ADDR_REG_OFFSET);1702 outb_p(reg >> 8,1703 data->isa_addr + W83781D_DATA_REG_OFFSET);1704 }1705 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);1706 if (word_sized) {1707 outb_p(value >> 8,1708 data->isa_addr + W83781D_DATA_REG_OFFSET);1709 outb_p((reg & 0xff) + 1,1710 data->isa_addr + W83781D_ADDR_REG_OFFSET);1711 }1712 outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);1713 if (reg & 0xff00) {1714 outb_p(W83781D_REG_BANK,1715 data->isa_addr + W83781D_ADDR_REG_OFFSET);1716 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);1717 }1718}1719 1720/*1721 * The SMBus locks itself, usually, but nothing may access the Winbond between1722 * bank switches. ISA access must always be locked explicitly!1723 * We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,1724 * would slow down the W83781D access and should not be necessary.1725 * There are some ugly typecasts here, but the good news is - they should1726 * nowhere else be necessary!1727 */1728static int1729w83781d_read_value(struct w83781d_data *data, u16 reg)1730{1731 struct i2c_client *client = data->client;1732 int res;1733 1734 mutex_lock(&data->lock);1735 if (client)1736 res = w83781d_read_value_i2c(data, reg);1737 else1738 res = w83781d_read_value_isa(data, reg);1739 mutex_unlock(&data->lock);1740 return res;1741}1742 1743static int1744w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)1745{1746 struct i2c_client *client = data->client;1747 1748 mutex_lock(&data->lock);1749 if (client)1750 w83781d_write_value_i2c(data, reg, value);1751 else1752 w83781d_write_value_isa(data, reg, value);1753 mutex_unlock(&data->lock);1754 return 0;1755}1756 1757static int1758w83781d_isa_probe(struct platform_device *pdev)1759{1760 int err, reg;1761 struct w83781d_data *data;1762 struct resource *res;1763 1764 /* Reserve the ISA region */1765 res = platform_get_resource(pdev, IORESOURCE_IO, 0);1766 if (!devm_request_region(&pdev->dev,1767 res->start + W83781D_ADDR_REG_OFFSET, 2,1768 "w83781d"))1769 return -EBUSY;1770 1771 data = devm_kzalloc(&pdev->dev, sizeof(struct w83781d_data),1772 GFP_KERNEL);1773 if (!data)1774 return -ENOMEM;1775 1776 mutex_init(&data->lock);1777 data->isa_addr = res->start;1778 platform_set_drvdata(pdev, data);1779 1780 reg = w83781d_read_value(data, W83781D_REG_WCHIPID);1781 switch (reg) {1782 case 0x30:1783 data->type = w83782d;1784 data->name = "w83782d";1785 break;1786 default:1787 data->type = w83781d;1788 data->name = "w83781d";1789 }1790 1791 /* Initialize the W83781D chip */1792 w83781d_init_device(&pdev->dev);1793 1794 /* Register sysfs hooks */1795 err = w83781d_create_files(&pdev->dev, data->type, 1);1796 if (err)1797 goto exit_remove_files;1798 1799 err = device_create_file(&pdev->dev, &dev_attr_name);1800 if (err)1801 goto exit_remove_files;1802 1803 data->hwmon_dev = hwmon_device_register(&pdev->dev);1804 if (IS_ERR(data->hwmon_dev)) {1805 err = PTR_ERR(data->hwmon_dev);1806 goto exit_remove_files;1807 }1808 1809 return 0;1810 1811 exit_remove_files:1812 w83781d_remove_files(&pdev->dev);1813 device_remove_file(&pdev->dev, &dev_attr_name);1814 return err;1815}1816 1817static void w83781d_isa_remove(struct platform_device *pdev)1818{1819 struct w83781d_data *data = platform_get_drvdata(pdev);1820 1821 hwmon_device_unregister(data->hwmon_dev);1822 w83781d_remove_files(&pdev->dev);1823 device_remove_file(&pdev->dev, &dev_attr_name);1824}1825 1826static struct platform_driver w83781d_isa_driver = {1827 .driver = {1828 .name = "w83781d",1829 },1830 .probe = w83781d_isa_probe,1831 .remove_new = w83781d_isa_remove,1832};1833 1834/* return 1 if a supported chip is found, 0 otherwise */1835static int __init1836w83781d_isa_found(unsigned short address)1837{1838 int val, save, found = 0;1839 int port;1840 1841 /*1842 * Some boards declare base+0 to base+7 as a PNP device, some base+41843 * to base+7 and some base+5 to base+6. So we better request each port1844 * individually for the probing phase.1845 */1846 for (port = address; port < address + W83781D_EXTENT; port++) {1847 if (!request_region(port, 1, "w83781d")) {1848 pr_debug("Failed to request port 0x%x\n", port);1849 goto release;1850 }1851 }1852 1853#define REALLY_SLOW_IO1854 /*1855 * We need the timeouts for at least some W83781D-like1856 * chips. But only if we read 'undefined' registers.1857 */1858 val = inb_p(address + 1);1859 if (inb_p(address + 2) != val1860 || inb_p(address + 3) != val1861 || inb_p(address + 7) != val) {1862 pr_debug("Detection failed at step %d\n", 1);1863 goto release;1864 }1865#undef REALLY_SLOW_IO1866 1867 /*1868 * We should be able to change the 7 LSB of the address port. The1869 * MSB (busy flag) should be clear initially, set after the write.1870 */1871 save = inb_p(address + W83781D_ADDR_REG_OFFSET);1872 if (save & 0x80) {1873 pr_debug("Detection failed at step %d\n", 2);1874 goto release;1875 }1876 val = ~save & 0x7f;1877 outb_p(val, address + W83781D_ADDR_REG_OFFSET);1878 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {1879 outb_p(save, address + W83781D_ADDR_REG_OFFSET);1880 pr_debug("Detection failed at step %d\n", 3);1881 goto release;1882 }1883 1884 /* We found a device, now see if it could be a W83781D */1885 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);1886 val = inb_p(address + W83781D_DATA_REG_OFFSET);1887 if (val & 0x80) {1888 pr_debug("Detection failed at step %d\n", 4);1889 goto release;1890 }1891 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);1892 save = inb_p(address + W83781D_DATA_REG_OFFSET);1893 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);1894 val = inb_p(address + W83781D_DATA_REG_OFFSET);1895 if ((!(save & 0x80) && (val != 0xa3))1896 || ((save & 0x80) && (val != 0x5c))) {1897 pr_debug("Detection failed at step %d\n", 5);1898 goto release;1899 }1900 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);1901 val = inb_p(address + W83781D_DATA_REG_OFFSET);1902 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */1903 pr_debug("Detection failed at step %d\n", 6);1904 goto release;1905 }1906 1907 /* The busy flag should be clear again */1908 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {1909 pr_debug("Detection failed at step %d\n", 7);1910 goto release;1911 }1912 1913 /* Determine the chip type */1914 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);1915 save = inb_p(address + W83781D_DATA_REG_OFFSET);1916 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);1917 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);1918 val = inb_p(address + W83781D_DATA_REG_OFFSET);1919 if ((val & 0xfe) == 0x10 /* W83781D */1920 || val == 0x30) /* W83782D */1921 found = 1;1922 1923 if (found)1924 pr_info("Found a %s chip at %#x\n",1925 val == 0x30 ? "W83782D" : "W83781D", (int)address);1926 1927 release:1928 for (port--; port >= address; port--)1929 release_region(port, 1);1930 return found;1931}1932 1933static int __init1934w83781d_isa_device_add(unsigned short address)1935{1936 struct resource res = {1937 .start = address,1938 .end = address + W83781D_EXTENT - 1,1939 .name = "w83781d",1940 .flags = IORESOURCE_IO,1941 };1942 int err;1943 1944 pdev = platform_device_alloc("w83781d", address);1945 if (!pdev) {1946 err = -ENOMEM;1947 pr_err("Device allocation failed\n");1948 goto exit;1949 }1950 1951 err = platform_device_add_resources(pdev, &res, 1);1952 if (err) {1953 pr_err("Device resource addition failed (%d)\n", err);1954 goto exit_device_put;1955 }1956 1957 err = platform_device_add(pdev);1958 if (err) {1959 pr_err("Device addition failed (%d)\n", err);1960 goto exit_device_put;1961 }1962 1963 return 0;1964 1965 exit_device_put:1966 platform_device_put(pdev);1967 exit:1968 pdev = NULL;1969 return err;1970}1971 1972static int __init1973w83781d_isa_register(void)1974{1975 int res;1976 1977 if (w83781d_isa_found(isa_address)) {1978 res = platform_driver_register(&w83781d_isa_driver);1979 if (res)1980 goto exit;1981 1982 /* Sets global pdev as a side effect */1983 res = w83781d_isa_device_add(isa_address);1984 if (res)1985 goto exit_unreg_isa_driver;1986 }1987 1988 return 0;1989 1990exit_unreg_isa_driver:1991 platform_driver_unregister(&w83781d_isa_driver);1992exit:1993 return res;1994}1995 1996static void1997w83781d_isa_unregister(void)1998{1999 if (pdev) {2000 platform_device_unregister(pdev);2001 platform_driver_unregister(&w83781d_isa_driver);2002 }2003}2004#else /* !CONFIG_ISA */2005 2006static struct w83781d_data *w83781d_data_if_isa(void)2007{2008 return NULL;2009}2010 2011static int2012w83781d_alias_detect(struct i2c_client *client, u8 chipid)2013{2014 return 0;2015}2016 2017static int2018w83781d_read_value(struct w83781d_data *data, u16 reg)2019{2020 int res;2021 2022 mutex_lock(&data->lock);2023 res = w83781d_read_value_i2c(data, reg);2024 mutex_unlock(&data->lock);2025 2026 return res;2027}2028 2029static int2030w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)2031{2032 mutex_lock(&data->lock);2033 w83781d_write_value_i2c(data, reg, value);2034 mutex_unlock(&data->lock);2035 2036 return 0;2037}2038 2039static int __init2040w83781d_isa_register(void)2041{2042 return 0;2043}2044 2045static void2046w83781d_isa_unregister(void)2047{2048}2049#endif /* CONFIG_ISA */2050 2051static int __init2052sensors_w83781d_init(void)2053{2054 int res;2055 2056 /*2057 * We register the ISA device first, so that we can skip the2058 * registration of an I2C interface to the same device.2059 */2060 res = w83781d_isa_register();2061 if (res)2062 goto exit;2063 2064 res = i2c_add_driver(&w83781d_driver);2065 if (res)2066 goto exit_unreg_isa;2067 2068 return 0;2069 2070 exit_unreg_isa:2071 w83781d_isa_unregister();2072 exit:2073 return res;2074}2075 2076static void __exit2077sensors_w83781d_exit(void)2078{2079 w83781d_isa_unregister();2080 i2c_del_driver(&w83781d_driver);2081}2082 2083MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "2084 "Philip Edelbrock <phil@netroedge.com>, "2085 "and Mark Studebaker <mdsxyz123@yahoo.com>");2086MODULE_DESCRIPTION("W83781D driver");2087MODULE_LICENSE("GPL");2088 2089module_init(sensors_w83781d_init);2090module_exit(sensors_w83781d_exit);2091