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1// SPDX-License-Identifier: GPL-2.0+2/*3 * i2c-algo-bit.c: i2c driver algorithms for bit-shift adapters4 *5 *   Copyright (C) 1995-2000 Simon G. Vogl6 *7 * With some changes from Frodo Looijaard <frodol@dds.nl>, Kyösti Mälkki8 * <kmalkki@cc.hut.fi> and Jean Delvare <jdelvare@suse.de>9 */10 11#include <linux/kernel.h>12#include <linux/module.h>13#include <linux/delay.h>14#include <linux/errno.h>15#include <linux/sched.h>16#include <linux/i2c.h>17#include <linux/i2c-algo-bit.h>18 19 20/* ----- global defines ----------------------------------------------- */21 22#ifdef DEBUG23#define bit_dbg(level, dev, format, args...) \24	do { \25		if (i2c_debug >= level) \26			dev_dbg(dev, format, ##args); \27	} while (0)28#else29#define bit_dbg(level, dev, format, args...) \30	do {} while (0)31#endif /* DEBUG */32 33/* ----- global variables ---------------------------------------------	*/34 35static int bit_test;	/* see if the line-setting functions work	*/36module_param(bit_test, int, S_IRUGO);37MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck");38 39#ifdef DEBUG40static int i2c_debug = 1;41module_param(i2c_debug, int, S_IRUGO | S_IWUSR);42MODULE_PARM_DESC(i2c_debug,43		 "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose");44#endif45 46/* --- setting states on the bus with the right timing: ---------------	*/47 48#define setsda(adap, val)	adap->setsda(adap->data, val)49#define setscl(adap, val)	adap->setscl(adap->data, val)50#define getsda(adap)		adap->getsda(adap->data)51#define getscl(adap)		adap->getscl(adap->data)52 53static inline void sdalo(struct i2c_algo_bit_data *adap)54{55	setsda(adap, 0);56	udelay((adap->udelay + 1) / 2);57}58 59static inline void sdahi(struct i2c_algo_bit_data *adap)60{61	setsda(adap, 1);62	udelay((adap->udelay + 1) / 2);63}64 65static inline void scllo(struct i2c_algo_bit_data *adap)66{67	setscl(adap, 0);68	udelay(adap->udelay / 2);69}70 71/*72 * Raise scl line, and do checking for delays. This is necessary for slower73 * devices.74 */75static int sclhi(struct i2c_algo_bit_data *adap)76{77	unsigned long start;78 79	setscl(adap, 1);80 81	/* Not all adapters have scl sense line... */82	if (!adap->getscl)83		goto done;84 85	start = jiffies;86	while (!getscl(adap)) {87		/* This hw knows how to read the clock line, so we wait88		 * until it actually gets high.  This is safer as some89		 * chips may hold it low ("clock stretching") while they90		 * are processing data internally.91		 */92		if (time_after(jiffies, start + adap->timeout)) {93			/* Test one last time, as we may have been preempted94			 * between last check and timeout test.95			 */96			if (getscl(adap))97				break;98			return -ETIMEDOUT;99		}100		cpu_relax();101	}102#ifdef DEBUG103	if (jiffies != start && i2c_debug >= 3)104		pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go high\n",105			 jiffies - start);106#endif107 108done:109	udelay(adap->udelay);110	return 0;111}112 113 114/* --- other auxiliary functions --------------------------------------	*/115static void i2c_start(struct i2c_algo_bit_data *adap)116{117	/* assert: scl, sda are high */118	setsda(adap, 0);119	udelay(adap->udelay);120	scllo(adap);121}122 123static void i2c_repstart(struct i2c_algo_bit_data *adap)124{125	/* assert: scl is low */126	sdahi(adap);127	sclhi(adap);128	setsda(adap, 0);129	udelay(adap->udelay);130	scllo(adap);131}132 133 134static void i2c_stop(struct i2c_algo_bit_data *adap)135{136	/* assert: scl is low */137	sdalo(adap);138	sclhi(adap);139	setsda(adap, 1);140	udelay(adap->udelay);141}142 143 144 145/* send a byte without start cond., look for arbitration,146   check ackn. from slave */147/* returns:148 * 1 if the device acknowledged149 * 0 if the device did not ack150 * -ETIMEDOUT if an error occurred (while raising the scl line)151 */152static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c)153{154	int i;155	int sb;156	int ack;157	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;158 159	/* assert: scl is low */160	for (i = 7; i >= 0; i--) {161		sb = (c >> i) & 1;162		setsda(adap, sb);163		udelay((adap->udelay + 1) / 2);164		if (sclhi(adap) < 0) { /* timed out */165			bit_dbg(1, &i2c_adap->dev,166				"i2c_outb: 0x%02x, timeout at bit #%d\n",167				(int)c, i);168			return -ETIMEDOUT;169		}170		/* FIXME do arbitration here:171		 * if (sb && !getsda(adap)) -> ouch! Get out of here.172		 *173		 * Report a unique code, so higher level code can retry174		 * the whole (combined) message and *NOT* issue STOP.175		 */176		scllo(adap);177	}178	sdahi(adap);179	if (sclhi(adap) < 0) { /* timeout */180		bit_dbg(1, &i2c_adap->dev,181			"i2c_outb: 0x%02x, timeout at ack\n", (int)c);182		return -ETIMEDOUT;183	}184 185	/* read ack: SDA should be pulled down by slave, or it may186	 * NAK (usually to report problems with the data we wrote).187	 * Always report ACK if SDA is write-only.188	 */189	ack = !adap->getsda || !getsda(adap);    /* ack: sda is pulled low -> success */190	bit_dbg(2, &i2c_adap->dev, "i2c_outb: 0x%02x %s\n", (int)c,191		ack ? "A" : "NA");192 193	scllo(adap);194	return ack;195	/* assert: scl is low (sda undef) */196}197 198 199static int i2c_inb(struct i2c_adapter *i2c_adap)200{201	/* read byte via i2c port, without start/stop sequence	*/202	/* acknowledge is sent in i2c_read.			*/203	int i;204	unsigned char indata = 0;205	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;206 207	/* assert: scl is low */208	sdahi(adap);209	for (i = 0; i < 8; i++) {210		if (sclhi(adap) < 0) { /* timeout */211			bit_dbg(1, &i2c_adap->dev,212				"i2c_inb: timeout at bit #%d\n",213				7 - i);214			return -ETIMEDOUT;215		}216		indata *= 2;217		if (getsda(adap))218			indata |= 0x01;219		setscl(adap, 0);220		udelay(i == 7 ? adap->udelay / 2 : adap->udelay);221	}222	/* assert: scl is low */223	return indata;224}225 226/*227 * Sanity check for the adapter hardware - check the reaction of228 * the bus lines only if it seems to be idle.229 */230static int test_bus(struct i2c_adapter *i2c_adap)231{232	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;233	const char *name = i2c_adap->name;234	int scl, sda, ret;235 236	if (adap->pre_xfer) {237		ret = adap->pre_xfer(i2c_adap);238		if (ret < 0)239			return -ENODEV;240	}241 242	if (adap->getsda == NULL)243		pr_info("%s: SDA is write-only, testing not possible\n", name);244	if (adap->getscl == NULL)245		pr_info("%s: SCL is write-only, testing not possible\n", name);246 247	sda = adap->getsda ? getsda(adap) : 1;248	scl = adap->getscl ? getscl(adap) : 1;249	if (!scl || !sda) {250		pr_warn("%s: bus seems to be busy (scl=%d, sda=%d)\n", name, scl, sda);251		goto bailout;252	}253 254	sdalo(adap);255	if (adap->getsda && getsda(adap)) {256		pr_warn("%s: SDA stuck high!\n", name);257		goto bailout;258	}259	if (adap->getscl && !getscl(adap)) {260		pr_warn("%s: SCL unexpected low while pulling SDA low!\n", name);261		goto bailout;262	}263 264	sdahi(adap);265	if (adap->getsda && !getsda(adap)) {266		pr_warn("%s: SDA stuck low!\n", name);267		goto bailout;268	}269	if (adap->getscl && !getscl(adap)) {270		pr_warn("%s: SCL unexpected low while pulling SDA high!\n", name);271		goto bailout;272	}273 274	scllo(adap);275	if (adap->getscl && getscl(adap)) {276		pr_warn("%s: SCL stuck high!\n", name);277		goto bailout;278	}279	if (adap->getsda && !getsda(adap)) {280		pr_warn("%s: SDA unexpected low while pulling SCL low!\n", name);281		goto bailout;282	}283 284	sclhi(adap);285	if (adap->getscl && !getscl(adap)) {286		pr_warn("%s: SCL stuck low!\n", name);287		goto bailout;288	}289	if (adap->getsda && !getsda(adap)) {290		pr_warn("%s: SDA unexpected low while pulling SCL high!\n", name);291		goto bailout;292	}293 294	if (adap->post_xfer)295		adap->post_xfer(i2c_adap);296 297	pr_info("%s: Test OK\n", name);298	return 0;299bailout:300	sdahi(adap);301	sclhi(adap);302 303	if (adap->post_xfer)304		adap->post_xfer(i2c_adap);305 306	return -ENODEV;307}308 309/* ----- Utility functions310 */311 312/* try_address tries to contact a chip for a number of313 * times before it gives up.314 * return values:315 * 1 chip answered316 * 0 chip did not answer317 * -x transmission error318 */319static int try_address(struct i2c_adapter *i2c_adap,320		       unsigned char addr, int retries)321{322	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;323	int i, ret = 0;324 325	for (i = 0; i <= retries; i++) {326		ret = i2c_outb(i2c_adap, addr);327		if (ret == 1 || i == retries)328			break;329		bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");330		i2c_stop(adap);331		udelay(adap->udelay);332		yield();333		bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");334		i2c_start(adap);335	}336	if (i && ret)337		bit_dbg(1, &i2c_adap->dev,338			"Used %d tries to %s client at 0x%02x: %s\n", i + 1,339			addr & 1 ? "read from" : "write to", addr >> 1,340			ret == 1 ? "success" : "failed, timeout?");341	return ret;342}343 344static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)345{346	const unsigned char *temp = msg->buf;347	int count = msg->len;348	unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;349	int retval;350	int wrcount = 0;351 352	while (count > 0) {353		retval = i2c_outb(i2c_adap, *temp);354 355		/* OK/ACK; or ignored NAK */356		if ((retval > 0) || (nak_ok && (retval == 0))) {357			count--;358			temp++;359			wrcount++;360 361		/* A slave NAKing the master means the slave didn't like362		 * something about the data it saw.  For example, maybe363		 * the SMBus PEC was wrong.364		 */365		} else if (retval == 0) {366			dev_err(&i2c_adap->dev, "sendbytes: NAK bailout.\n");367			return -EIO;368 369		/* Timeout; or (someday) lost arbitration370		 *371		 * FIXME Lost ARB implies retrying the transaction from372		 * the first message, after the "winning" master issues373		 * its STOP.  As a rule, upper layer code has no reason374		 * to know or care about this ... it is *NOT* an error.375		 */376		} else {377			dev_err(&i2c_adap->dev, "sendbytes: error %d\n",378					retval);379			return retval;380		}381	}382	return wrcount;383}384 385static int acknak(struct i2c_adapter *i2c_adap, int is_ack)386{387	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;388 389	/* assert: sda is high */390	if (is_ack)		/* send ack */391		setsda(adap, 0);392	udelay((adap->udelay + 1) / 2);393	if (sclhi(adap) < 0) {	/* timeout */394		dev_err(&i2c_adap->dev, "readbytes: ack/nak timeout\n");395		return -ETIMEDOUT;396	}397	scllo(adap);398	return 0;399}400 401static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)402{403	int inval;404	int rdcount = 0;	/* counts bytes read */405	unsigned char *temp = msg->buf;406	int count = msg->len;407	const unsigned flags = msg->flags;408	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;409 410	if (!adap->getsda)411		return -EOPNOTSUPP;412 413	while (count > 0) {414		inval = i2c_inb(i2c_adap);415		if (inval >= 0) {416			*temp = inval;417			rdcount++;418		} else {   /* read timed out */419			break;420		}421 422		temp++;423		count--;424 425		/* Some SMBus transactions require that we receive the426		   transaction length as the first read byte. */427		if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) {428			if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) {429				if (!(flags & I2C_M_NO_RD_ACK))430					acknak(i2c_adap, 0);431				dev_err(&i2c_adap->dev,432					"readbytes: invalid block length (%d)\n",433					inval);434				return -EPROTO;435			}436			/* The original count value accounts for the extra437			   bytes, that is, either 1 for a regular transaction,438			   or 2 for a PEC transaction. */439			count += inval;440			msg->len += inval;441		}442 443		bit_dbg(2, &i2c_adap->dev, "readbytes: 0x%02x %s\n",444			inval,445			(flags & I2C_M_NO_RD_ACK)446				? "(no ack/nak)"447				: (count ? "A" : "NA"));448 449		if (!(flags & I2C_M_NO_RD_ACK)) {450			inval = acknak(i2c_adap, count);451			if (inval < 0)452				return inval;453		}454	}455	return rdcount;456}457 458/* doAddress initiates the transfer by generating the start condition (in459 * try_address) and transmits the address in the necessary format to handle460 * reads, writes as well as 10bit-addresses.461 * returns:462 *  0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set463 * -x an error occurred (like: -ENXIO if the device did not answer, or464 *	-ETIMEDOUT, for example if the lines are stuck...)465 */466static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)467{468	unsigned short flags = msg->flags;469	unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;470	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;471 472	unsigned char addr;473	int ret, retries;474 475	retries = nak_ok ? 0 : i2c_adap->retries;476 477	if (flags & I2C_M_TEN) {478		/* a ten bit address */479		addr = 0xf0 | ((msg->addr >> 7) & 0x06);480		bit_dbg(2, &i2c_adap->dev, "addr0: %d\n", addr);481		/* try extended address code...*/482		ret = try_address(i2c_adap, addr, retries);483		if ((ret != 1) && !nak_ok)  {484			dev_err(&i2c_adap->dev,485				"died at extended address code\n");486			return -ENXIO;487		}488		/* the remaining 8 bit address */489		ret = i2c_outb(i2c_adap, msg->addr & 0xff);490		if ((ret != 1) && !nak_ok) {491			/* the chip did not ack / xmission error occurred */492			dev_err(&i2c_adap->dev, "died at 2nd address code\n");493			return -ENXIO;494		}495		if (flags & I2C_M_RD) {496			bit_dbg(3, &i2c_adap->dev,497				"emitting repeated start condition\n");498			i2c_repstart(adap);499			/* okay, now switch into reading mode */500			addr |= 0x01;501			ret = try_address(i2c_adap, addr, retries);502			if ((ret != 1) && !nak_ok) {503				dev_err(&i2c_adap->dev,504					"died at repeated address code\n");505				return -EIO;506			}507		}508	} else {		/* normal 7bit address	*/509		addr = i2c_8bit_addr_from_msg(msg);510		if (flags & I2C_M_REV_DIR_ADDR)511			addr ^= 1;512		ret = try_address(i2c_adap, addr, retries);513		if ((ret != 1) && !nak_ok)514			return -ENXIO;515	}516 517	return 0;518}519 520static int bit_xfer(struct i2c_adapter *i2c_adap,521		    struct i2c_msg msgs[], int num)522{523	struct i2c_msg *pmsg;524	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;525	int i, ret;526	unsigned short nak_ok;527 528	if (adap->pre_xfer) {529		ret = adap->pre_xfer(i2c_adap);530		if (ret < 0)531			return ret;532	}533 534	bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");535	i2c_start(adap);536	for (i = 0; i < num; i++) {537		pmsg = &msgs[i];538		nak_ok = pmsg->flags & I2C_M_IGNORE_NAK;539		if (!(pmsg->flags & I2C_M_NOSTART)) {540			if (i) {541				if (msgs[i - 1].flags & I2C_M_STOP) {542					bit_dbg(3, &i2c_adap->dev,543						"emitting enforced stop/start condition\n");544					i2c_stop(adap);545					i2c_start(adap);546				} else {547					bit_dbg(3, &i2c_adap->dev,548						"emitting repeated start condition\n");549					i2c_repstart(adap);550				}551			}552			ret = bit_doAddress(i2c_adap, pmsg);553			if ((ret != 0) && !nak_ok) {554				bit_dbg(1, &i2c_adap->dev,555					"NAK from device addr 0x%02x msg #%d\n",556					msgs[i].addr, i);557				goto bailout;558			}559		}560		if (pmsg->flags & I2C_M_RD) {561			/* read bytes into buffer*/562			ret = readbytes(i2c_adap, pmsg);563			if (ret >= 1)564				bit_dbg(2, &i2c_adap->dev, "read %d byte%s\n",565					ret, ret == 1 ? "" : "s");566			if (ret < pmsg->len) {567				if (ret >= 0)568					ret = -EIO;569				goto bailout;570			}571		} else {572			/* write bytes from buffer */573			ret = sendbytes(i2c_adap, pmsg);574			if (ret >= 1)575				bit_dbg(2, &i2c_adap->dev, "wrote %d byte%s\n",576					ret, ret == 1 ? "" : "s");577			if (ret < pmsg->len) {578				if (ret >= 0)579					ret = -EIO;580				goto bailout;581			}582		}583	}584	ret = i;585 586bailout:587	bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");588	i2c_stop(adap);589 590	if (adap->post_xfer)591		adap->post_xfer(i2c_adap);592	return ret;593}594 595/*596 * We print a warning when we are not flagged to support atomic transfers but597 * will try anyhow. That's what the I2C core would do as well. Sadly, we can't598 * modify the algorithm struct at probe time because this struct is exported599 * 'const'.600 */601static int bit_xfer_atomic(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[],602			   int num)603{604	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;605 606	if (!adap->can_do_atomic)607		dev_warn(&i2c_adap->dev, "not flagged for atomic transfers\n");608 609	return bit_xfer(i2c_adap, msgs, num);610}611 612static u32 bit_func(struct i2c_adapter *adap)613{614	return I2C_FUNC_I2C | I2C_FUNC_NOSTART | I2C_FUNC_SMBUS_EMUL_ALL |615	       I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING;616}617 618 619/* -----exported algorithm data: -------------------------------------	*/620 621const struct i2c_algorithm i2c_bit_algo = {622	.master_xfer = bit_xfer,623	.master_xfer_atomic = bit_xfer_atomic,624	.functionality = bit_func,625};626EXPORT_SYMBOL(i2c_bit_algo);627 628static const struct i2c_adapter_quirks i2c_bit_quirk_no_clk_stretch = {629	.flags = I2C_AQ_NO_CLK_STRETCH,630};631 632/*633 * registering functions to load algorithms at runtime634 */635static int __i2c_bit_add_bus(struct i2c_adapter *adap,636			     int (*add_adapter)(struct i2c_adapter *))637{638	struct i2c_algo_bit_data *bit_adap = adap->algo_data;639	int ret;640 641	if (bit_test) {642		ret = test_bus(adap);643		if (bit_test >= 2 && ret < 0)644			return -ENODEV;645	}646 647	/* register new adapter to i2c module... */648	adap->algo = &i2c_bit_algo;649	adap->retries = 3;650	if (bit_adap->getscl == NULL)651		adap->quirks = &i2c_bit_quirk_no_clk_stretch;652 653	/*654	 * We tried forcing SCL/SDA to an initial state here. But that caused a655	 * regression, sadly. Check Bugzilla #200045 for details.656	 */657 658	ret = add_adapter(adap);659	if (ret < 0)660		return ret;661 662	if (bit_adap->getsda == NULL)663		dev_warn(&adap->dev, "Not I2C compliant: can't read SDA\n");664 665	if (bit_adap->getscl == NULL)666		dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n");667 668	if (bit_adap->getsda == NULL || bit_adap->getscl == NULL)669		dev_warn(&adap->dev, "Bus may be unreliable\n");670 671	return 0;672}673 674int i2c_bit_add_bus(struct i2c_adapter *adap)675{676	return __i2c_bit_add_bus(adap, i2c_add_adapter);677}678EXPORT_SYMBOL(i2c_bit_add_bus);679 680int i2c_bit_add_numbered_bus(struct i2c_adapter *adap)681{682	return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter);683}684EXPORT_SYMBOL(i2c_bit_add_numbered_bus);685 686MODULE_AUTHOR("Simon G. Vogl <simon@tk.uni-linz.ac.at>");687MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm");688MODULE_LICENSE("GPL");689