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1/*2 * I2C multiplexer driver for PCA9541 bus master selector3 *4 * Copyright (c) 2010 Ericsson AB.5 *6 * Author: Guenter Roeck <linux@roeck-us.net>7 *8 * Derived from:9 * pca954x.c10 *11 * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>12 * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>13 *14 * This file is licensed under the terms of the GNU General Public15 * License version 2. This program is licensed "as is" without any16 * warranty of any kind, whether express or implied.17 */18 19#include <linux/bitops.h>20#include <linux/delay.h>21#include <linux/device.h>22#include <linux/i2c.h>23#include <linux/i2c-mux.h>24#include <linux/jiffies.h>25#include <linux/module.h>26#include <linux/slab.h>27 28/*29 * The PCA9541 is a bus master selector. It supports two I2C masters connected30 * to a single slave bus.31 *32 * Before each bus transaction, a master has to acquire bus ownership. After the33 * transaction is complete, bus ownership has to be released. This fits well34 * into the I2C multiplexer framework, which provides select and release35 * functions for this purpose. For this reason, this driver is modeled as36 * single-channel I2C bus multiplexer.37 *38 * This driver assumes that the two bus masters are controlled by two different39 * hosts. If a single host controls both masters, platform code has to ensure40 * that only one of the masters is instantiated at any given time.41 */42 43#define PCA9541_CONTROL 0x0144#define PCA9541_ISTAT 0x0245 46#define PCA9541_CTL_MYBUS BIT(0)47#define PCA9541_CTL_NMYBUS BIT(1)48#define PCA9541_CTL_BUSON BIT(2)49#define PCA9541_CTL_NBUSON BIT(3)50#define PCA9541_CTL_BUSINIT BIT(4)51#define PCA9541_CTL_TESTON BIT(6)52#define PCA9541_CTL_NTESTON BIT(7)53 54#define PCA9541_ISTAT_INTIN BIT(0)55#define PCA9541_ISTAT_BUSINIT BIT(1)56#define PCA9541_ISTAT_BUSOK BIT(2)57#define PCA9541_ISTAT_BUSLOST BIT(3)58#define PCA9541_ISTAT_MYTEST BIT(6)59#define PCA9541_ISTAT_NMYTEST BIT(7)60 61#define BUSON (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON)62#define MYBUS (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS)63#define mybus(x) (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS)64#define busoff(x) (!((x) & BUSON) || ((x) & BUSON) == BUSON)65 66/* arbitration timeouts, in jiffies */67#define ARB_TIMEOUT (HZ / 8) /* 125 ms until forcing bus ownership */68#define ARB2_TIMEOUT (HZ / 4) /* 250 ms until acquisition failure */69 70/* arbitration retry delays, in us */71#define SELECT_DELAY_SHORT 5072#define SELECT_DELAY_LONG 100073 74struct pca9541 {75 struct i2c_client *client;76 unsigned long select_timeout;77 unsigned long arb_timeout;78};79 80static const struct i2c_device_id pca9541_id[] = {81 { "pca9541" },82 {}83};84 85MODULE_DEVICE_TABLE(i2c, pca9541_id);86 87#ifdef CONFIG_OF88static const struct of_device_id pca9541_of_match[] = {89 { .compatible = "nxp,pca9541" },90 {}91};92MODULE_DEVICE_TABLE(of, pca9541_of_match);93#endif94 95/*96 * Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer()97 * as they will try to lock the adapter a second time.98 */99static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val)100{101 struct i2c_adapter *adap = client->adapter;102 union i2c_smbus_data data = { .byte = val };103 104 return __i2c_smbus_xfer(adap, client->addr, client->flags,105 I2C_SMBUS_WRITE, command,106 I2C_SMBUS_BYTE_DATA, &data);107}108 109/*110 * Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer()111 * as they will try to lock adapter a second time.112 */113static int pca9541_reg_read(struct i2c_client *client, u8 command)114{115 struct i2c_adapter *adap = client->adapter;116 union i2c_smbus_data data;117 int ret;118 119 ret = __i2c_smbus_xfer(adap, client->addr, client->flags,120 I2C_SMBUS_READ, command,121 I2C_SMBUS_BYTE_DATA, &data);122 123 return ret ?: data.byte;124}125 126/*127 * Arbitration management functions128 */129 130/* Release bus. Also reset NTESTON and BUSINIT if it was set. */131static void pca9541_release_bus(struct i2c_client *client)132{133 int reg;134 135 reg = pca9541_reg_read(client, PCA9541_CONTROL);136 if (reg >= 0 && !busoff(reg) && mybus(reg))137 pca9541_reg_write(client, PCA9541_CONTROL,138 (reg & PCA9541_CTL_NBUSON) >> 1);139}140 141/*142 * Arbitration is defined as a two-step process. A bus master can only activate143 * the slave bus if it owns it; otherwise it has to request ownership first.144 * This multi-step process ensures that access contention is resolved145 * gracefully.146 *147 * Bus Ownership Other master Action148 * state requested access149 * ----------------------------------------------------150 * off - yes wait for arbitration timeout or151 * for other master to drop request152 * off no no take ownership153 * off yes no turn on bus154 * on yes - done155 * on no - wait for arbitration timeout or156 * for other master to release bus157 *158 * The main contention point occurs if the slave bus is off and both masters159 * request ownership at the same time. In this case, one master will turn on160 * the slave bus, believing that it owns it. The other master will request161 * bus ownership. Result is that the bus is turned on, and master which did162 * _not_ own the slave bus before ends up owning it.163 */164 165/* Control commands per PCA9541 datasheet */166static const u8 pca9541_control[16] = {167 4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1168};169 170/*171 * Channel arbitration172 *173 * Return values:174 * <0: error175 * 0 : bus not acquired176 * 1 : bus acquired177 */178static int pca9541_arbitrate(struct i2c_client *client)179{180 struct i2c_mux_core *muxc = i2c_get_clientdata(client);181 struct pca9541 *data = i2c_mux_priv(muxc);182 int reg;183 184 reg = pca9541_reg_read(client, PCA9541_CONTROL);185 if (reg < 0)186 return reg;187 188 if (busoff(reg)) {189 int istat;190 /*191 * Bus is off. Request ownership or turn it on unless192 * other master requested ownership.193 */194 istat = pca9541_reg_read(client, PCA9541_ISTAT);195 if (!(istat & PCA9541_ISTAT_NMYTEST)196 || time_is_before_eq_jiffies(data->arb_timeout)) {197 /*198 * Other master did not request ownership,199 * or arbitration timeout expired. Take the bus.200 */201 pca9541_reg_write(client,202 PCA9541_CONTROL,203 pca9541_control[reg & 0x0f]204 | PCA9541_CTL_NTESTON);205 data->select_timeout = SELECT_DELAY_SHORT;206 } else {207 /*208 * Other master requested ownership.209 * Set extra long timeout to give it time to acquire it.210 */211 data->select_timeout = SELECT_DELAY_LONG * 2;212 }213 } else if (mybus(reg)) {214 /*215 * Bus is on, and we own it. We are done with acquisition.216 * Reset NTESTON and BUSINIT, then return success.217 */218 if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT))219 pca9541_reg_write(client,220 PCA9541_CONTROL,221 reg & ~(PCA9541_CTL_NTESTON222 | PCA9541_CTL_BUSINIT));223 return 1;224 } else {225 /*226 * Other master owns the bus.227 * If arbitration timeout has expired, force ownership.228 * Otherwise request it.229 */230 data->select_timeout = SELECT_DELAY_LONG;231 if (time_is_before_eq_jiffies(data->arb_timeout)) {232 /* Time is up, take the bus and reset it. */233 pca9541_reg_write(client,234 PCA9541_CONTROL,235 pca9541_control[reg & 0x0f]236 | PCA9541_CTL_BUSINIT237 | PCA9541_CTL_NTESTON);238 } else {239 /* Request bus ownership if needed */240 if (!(reg & PCA9541_CTL_NTESTON))241 pca9541_reg_write(client,242 PCA9541_CONTROL,243 reg | PCA9541_CTL_NTESTON);244 }245 }246 return 0;247}248 249static int pca9541_select_chan(struct i2c_mux_core *muxc, u32 chan)250{251 struct pca9541 *data = i2c_mux_priv(muxc);252 struct i2c_client *client = data->client;253 int ret;254 unsigned long timeout = jiffies + ARB2_TIMEOUT;255 /* give up after this time */256 257 data->arb_timeout = jiffies + ARB_TIMEOUT;258 /* force bus ownership after this time */259 260 do {261 ret = pca9541_arbitrate(client);262 if (ret)263 return ret < 0 ? ret : 0;264 265 if (data->select_timeout == SELECT_DELAY_SHORT)266 udelay(data->select_timeout);267 else268 msleep(data->select_timeout / 1000);269 } while (time_is_after_eq_jiffies(timeout));270 271 return -ETIMEDOUT;272}273 274static int pca9541_release_chan(struct i2c_mux_core *muxc, u32 chan)275{276 struct pca9541 *data = i2c_mux_priv(muxc);277 struct i2c_client *client = data->client;278 279 pca9541_release_bus(client);280 return 0;281}282 283/*284 * I2C init/probing/exit functions285 */286static int pca9541_probe(struct i2c_client *client)287{288 struct i2c_adapter *adap = client->adapter;289 struct i2c_mux_core *muxc;290 struct pca9541 *data;291 int ret;292 293 if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA))294 return -ENODEV;295 296 /*297 * I2C accesses are unprotected here.298 * We have to lock the I2C segment before releasing the bus.299 */300 i2c_lock_bus(adap, I2C_LOCK_SEGMENT);301 pca9541_release_bus(client);302 i2c_unlock_bus(adap, I2C_LOCK_SEGMENT);303 304 /* Create mux adapter */305 306 muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data),307 I2C_MUX_ARBITRATOR,308 pca9541_select_chan, pca9541_release_chan);309 if (!muxc)310 return -ENOMEM;311 312 data = i2c_mux_priv(muxc);313 data->client = client;314 315 i2c_set_clientdata(client, muxc);316 317 ret = i2c_mux_add_adapter(muxc, 0, 0);318 if (ret)319 return ret;320 321 dev_info(&client->dev, "registered master selector for I2C %s\n",322 client->name);323 324 return 0;325}326 327static void pca9541_remove(struct i2c_client *client)328{329 struct i2c_mux_core *muxc = i2c_get_clientdata(client);330 331 i2c_mux_del_adapters(muxc);332}333 334static struct i2c_driver pca9541_driver = {335 .driver = {336 .name = "pca9541",337 .of_match_table = of_match_ptr(pca9541_of_match),338 },339 .probe = pca9541_probe,340 .remove = pca9541_remove,341 .id_table = pca9541_id,342};343 344module_i2c_driver(pca9541_driver);345 346MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");347MODULE_DESCRIPTION("PCA9541 I2C master selector driver");348MODULE_LICENSE("GPL v2");349